Skip to content

Commit a58f8dd

Browse files
authored
Merge pull request #15232 from jeromecoutant/PR_H753
STM32H7: add MCU_STM32H753xI support
2 parents 3b86e1f + 90cbc89 commit a58f8dd

File tree

11 files changed

+2785
-864
lines changed

11 files changed

+2785
-864
lines changed

targets/TARGET_STM/TARGET_STM32H7/CMakeLists.txt

+1
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@ add_subdirectory(TARGET_STM32H743xI EXCLUDE_FROM_ALL)
88
add_subdirectory(TARGET_STM32H745xI EXCLUDE_FROM_ALL)
99
add_subdirectory(TARGET_STM32H747xI EXCLUDE_FROM_ALL)
1010
add_subdirectory(TARGET_STM32H750xB EXCLUDE_FROM_ALL)
11+
add_subdirectory(TARGET_STM32H753xI EXCLUDE_FROM_ALL)
1112
add_subdirectory(TARGET_STM32H7A3xIQ EXCLUDE_FROM_ALL)
1213
add_subdirectory(TARGET_STM32H7B3xIQ EXCLUDE_FROM_ALL)
1314
add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
# Copyright (c) 2020 ARM Limited. All rights reserved.
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
5+
set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h753xx.S)
6+
set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h753xi.ld)
7+
elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
8+
set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h753xx.S)
9+
set(LINKER_FILE TOOLCHAIN_ARM/stm32h753xi.sct)
10+
endif()
11+
12+
add_library(mbed-stm32h753xi INTERFACE)
13+
14+
target_include_directories(mbed-stm32h753xi
15+
INTERFACE
16+
.
17+
)
18+
19+
target_sources(mbed-stm32h753xi
20+
INTERFACE
21+
${STARTUP_FILE}
22+
)
23+
24+
mbed_set_linker_script(mbed-stm32h753xi ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
25+
26+
target_link_libraries(mbed-stm32h753xi INTERFACE mbed-stm32h7)

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/TOOLCHAIN_ARM/startup_stm32h753xx.S

+566
Large diffs are not rendered by default.
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,71 @@
1+
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m7
2+
; Scatter-Loading Description File
3+
;
4+
; SPDX-License-Identifier: BSD-3-Clause
5+
;******************************************************************************
6+
;* @attention
7+
;*
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
9+
;* All rights reserved.
10+
;*
11+
;* This software component is licensed by ST under BSD 3-Clause license,
12+
;* the "License"; You may not use this file except in compliance with the
13+
;* License. You may obtain a copy of the License at:
14+
;* opensource.org/licenses/BSD-3-Clause
15+
;*
16+
;******************************************************************************
17+
18+
#include "../cmsis_nvic.h"
19+
20+
#if !defined(MBED_APP_START)
21+
#define MBED_APP_START MBED_ROM_START
22+
#endif
23+
24+
#if !defined(MBED_APP_SIZE)
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
26+
#endif
27+
28+
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#if defined(MBED_BOOT_STACK_SIZE)
31+
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
32+
#else
33+
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
34+
#endif
35+
#endif
36+
37+
/* Round up VECTORS_SIZE to 8 bytes */
38+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
39+
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
41+
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
43+
*.o (RESET, +First)
44+
*(InRoot$$Sections)
45+
.ANY (+RO)
46+
}
47+
48+
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
49+
.ANY (+RW +ZI)
50+
}
51+
52+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
53+
}
54+
55+
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
56+
}
57+
58+
RW_DMARxDscrTab 0x30040000 0x60 {
59+
*(.RxDecripSection)
60+
}
61+
RW_DMATxDscrTab 0x30040100 0x140 {
62+
*(.TxDecripSection)
63+
}
64+
RW_Rx_Buffb 0x30040400 0x1800 {
65+
*(.RxArraySection)
66+
}
67+
RW_Eth_Ram 0x30044000 0x4000 {
68+
*(.ethusbram)
69+
}
70+
71+
}

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/TOOLCHAIN_GCC_ARM/startup_stm32h753xx.S

+750
Large diffs are not rendered by default.
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,220 @@
1+
/* Linker script to configure memory regions. */
2+
/*
3+
* SPDX-License-Identifier: BSD-3-Clause
4+
******************************************************************************
5+
* @attention
6+
*
7+
* Copyright (c) 2016-2020 STMicroelectronics.
8+
* All rights reserved.
9+
*
10+
* This software component is licensed by ST under BSD 3-Clause license,
11+
* the "License"; You may not use this file except in compliance with the
12+
* License. You may obtain a copy of the License at:
13+
* opensource.org/licenses/BSD-3-Clause
14+
*
15+
******************************************************************************
16+
*/
17+
18+
#include "../cmsis_nvic.h"
19+
20+
21+
#if !defined(MBED_APP_START)
22+
#define MBED_APP_START MBED_ROM_START
23+
#endif
24+
25+
#if !defined(MBED_APP_SIZE)
26+
#define MBED_APP_SIZE MBED_ROM_SIZE
27+
#endif
28+
29+
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
30+
/* This value is normally defined by the tools
31+
to 0x1000 for bare metal and 0x400 for RTOS */
32+
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
33+
#endif
34+
35+
/* Round up VECTORS_SIZE to 8 bytes */
36+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
37+
38+
MEMORY
39+
{
40+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
41+
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
42+
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
43+
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
44+
}
45+
46+
/* Linker script to place sections and symbol values. Should be used together
47+
* with other linker script that defines memory regions FLASH and RAM.
48+
* It references following symbols, which must be defined in code:
49+
* Reset_Handler : Entry of reset handler
50+
*
51+
* It defines following symbols, which code can use without definition:
52+
* __exidx_start
53+
* __exidx_end
54+
* __etext
55+
* __data_start__
56+
* __preinit_array_start
57+
* __preinit_array_end
58+
* __init_array_start
59+
* __init_array_end
60+
* __fini_array_start
61+
* __fini_array_end
62+
* __data_end__
63+
* __bss_start__
64+
* __bss_end__
65+
* __end__
66+
* end
67+
* __HeapLimit
68+
* __StackLimit
69+
* __StackTop
70+
* __stack
71+
* _estack
72+
*/
73+
ENTRY(Reset_Handler)
74+
75+
SECTIONS
76+
{
77+
.text :
78+
{
79+
KEEP(*(.isr_vector))
80+
*(.text*)
81+
82+
KEEP(*(.init))
83+
KEEP(*(.fini))
84+
85+
/* .ctors */
86+
*crtbegin.o(.ctors)
87+
*crtbegin?.o(.ctors)
88+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
89+
*(SORT(.ctors.*))
90+
*(.ctors)
91+
92+
/* .dtors */
93+
*crtbegin.o(.dtors)
94+
*crtbegin?.o(.dtors)
95+
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
96+
*(SORT(.dtors.*))
97+
*(.dtors)
98+
99+
*(.rodata*)
100+
101+
KEEP(*(.eh_frame*))
102+
} > FLASH
103+
104+
.ARM.extab :
105+
{
106+
*(.ARM.extab* .gnu.linkonce.armextab.*)
107+
} > FLASH
108+
109+
__exidx_start = .;
110+
.ARM.exidx :
111+
{
112+
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
113+
} > FLASH
114+
__exidx_end = .;
115+
116+
__etext = .;
117+
_sidata = .;
118+
119+
.data : AT (__etext)
120+
{
121+
__data_start__ = .;
122+
_sdata = .;
123+
*(vtable)
124+
*(.data*)
125+
126+
. = ALIGN(8);
127+
/* preinit data */
128+
PROVIDE_HIDDEN (__preinit_array_start = .);
129+
KEEP(*(.preinit_array))
130+
PROVIDE_HIDDEN (__preinit_array_end = .);
131+
132+
. = ALIGN(8);
133+
/* init data */
134+
PROVIDE_HIDDEN (__init_array_start = .);
135+
KEEP(*(SORT(.init_array.*)))
136+
KEEP(*(.init_array))
137+
PROVIDE_HIDDEN (__init_array_end = .);
138+
139+
. = ALIGN(8);
140+
/* finit data */
141+
PROVIDE_HIDDEN (__fini_array_start = .);
142+
KEEP(*(SORT(.fini_array.*)))
143+
KEEP(*(.fini_array))
144+
PROVIDE_HIDDEN (__fini_array_end = .);
145+
146+
KEEP(*(.jcr*))
147+
. = ALIGN(8);
148+
/* All data end */
149+
__data_end__ = .;
150+
_edata = .;
151+
152+
} > RAM
153+
154+
/* Uninitialized data section
155+
* This region is not initialized by the C/C++ library and can be used to
156+
* store state across soft reboots. */
157+
.uninitialized (NOLOAD):
158+
{
159+
. = ALIGN(32);
160+
__uninitialized_start = .;
161+
*(.uninitialized)
162+
KEEP(*(.keep.uninitialized))
163+
. = ALIGN(32);
164+
__uninitialized_end = .;
165+
} > RAM
166+
167+
.bss :
168+
{
169+
. = ALIGN(8);
170+
__bss_start__ = .;
171+
_sbss = .;
172+
*(.bss*)
173+
*(COMMON)
174+
. = ALIGN(8);
175+
__bss_end__ = .;
176+
_ebss = .;
177+
} > RAM
178+
179+
.heap (COPY):
180+
{
181+
__end__ = .;
182+
PROVIDE(end = .);
183+
*(.heap*)
184+
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE;
185+
__HeapLimit = .;
186+
} > RAM
187+
188+
/* .stack_dummy section doesn't contains any symbols. It is only
189+
* used for linker to calculate size of stack sections, and assign
190+
* values to stack symbols later */
191+
.stack_dummy (COPY):
192+
{
193+
*(.stack*)
194+
} > RAM
195+
196+
/* Set stack top to end of RAM, and stack limit move down by
197+
* size of stack_dummy section */
198+
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
199+
_estack = __StackTop;
200+
__StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE;
201+
PROVIDE(__stack = __StackTop);
202+
203+
/* Check if data + heap + stack exceeds RAM limit */
204+
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
205+
206+
.lwip_sec (NOLOAD) : {
207+
. = ABSOLUTE(0x30040000);
208+
*(.RxDecripSection)
209+
210+
. = ABSOLUTE(0x30040100);
211+
*(.TxDecripSection)
212+
213+
. = ABSOLUTE(0x30040400);
214+
*(.RxArraySection)
215+
216+
. = ABSOLUTE(0x30044000);
217+
*(.ethusbram)
218+
219+
} >RAM_D2 AT> FLASH
220+
}

0 commit comments

Comments
 (0)