[Arch/RISC-V] Next RISC-V

1. ISA manager interface.
2. Merge 32E/32I/64I.
3. Cache by CBOM ISA.
4. MMU support Sv32/Sv39/Sv48/Sv57/Sv64, SVPBMT ISA.
5. Merge M-mode, S-mode CSR ops.
6. Support SMP.
7. Support APLIC & IMSIC (AIA), CLIC, ACLINT/CLINT, INTC, PLIC.
8. Support DM (only by OFW) or not DM.
9. Merge T-HEAD vendor.

Signed-off-by: GuEe-GUI <[email protected]>

Author: GuEe-GUI

components/drivers/cputime/Kconfig

@@ -1,4 +1,4 @@
-config RT_USING_CPUTIME
+menuconfig RT_USING_CPUTIME
     bool "Enable CPU time for high resolution clock counter"
     default n
     help
@@ -25,9 +25,9 @@ if RT_USING_CPUTIME
     config RT_USING_CPUTIME_RISCV
         bool "Use rdtime instructions for CPU time"
         default y
-        depends on ARCH_RISCV64
+        depends on ARCH_RISCV
         help
-            Some RISCV64 MCU Use rdtime instructions read CPU time.
+            Some RISC-V MCU Use rdtime instructions read CPU time.
     config CPUTIME_TIMER_FREQ
         int "CPUTIME timer freq"
         default 0

components/drivers/cputime/cputime_riscv.c

@@ -3,24 +3,21 @@
 #include <rtthread.h>
 
 #include <board.h>
+#include <riscv_timer.h>
 
 /* Use Cycle counter of Data Watchpoint and Trace Register for CPU time */
 
 static uint64_t riscv_cputime_getres(void)
 {
     uint64_t ret = 1000UL * 1000 * 1000;
 
-    ret = (ret * (1000UL * 1000)) / CPUTIME_TIMER_FREQ;
+    ret = (ret * (1000UL * 1000)) / riscv_timer_get_frequency();
     return ret;
 }
 
 static uint64_t riscv_cputime_gettime(void)
 {
-    uint64_t time_elapsed;
-    __asm__ __volatile__(
-        "rdtime %0"
-        : "=r"(time_elapsed));
-    return time_elapsed;
+    return riscv_timer_rdtime();
 }
 
 const static struct rt_clock_cputime_ops _riscv_ops =

components/drivers/ktime/src/risc-v/virt64/cputimer.c renamed to components/drivers/ktime/src/risc-v/cputimer.c

@@ -1,32 +1,32 @@
 /*
- * Copyright (c) 2006-2023, RT-Thread Development Team
+ * Copyright (c) 2006-2025, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
  * 2023-07-10     xqyjlj       The first version.
+ * 2025-04-20     GuEe-GUI     Port to the DM
  */
 
 #include "ktime.h"
+#include "riscv_timer.h"
 
 static volatile unsigned long _init_cnt = 0;
 
 rt_uint64_t rt_ktime_cputimer_getres(void)
 {
-    return ((1000ULL * 1000 * 1000) * RT_KTIME_RESMUL) / CPUTIME_TIMER_FREQ;
+    return ((1000ULL * 1000 * 1000) * RT_KTIME_RESMUL) / riscv_timer_get_frequency();
 }
 
 unsigned long rt_ktime_cputimer_getfrq(void)
 {
-    return CPUTIME_TIMER_FREQ;
+    return riscv_timer_get_frequency();
 }
 
 unsigned long rt_ktime_cputimer_getcnt(void)
 {
-    unsigned long time_elapsed;
-    __asm__ __volatile__("rdtime %0" : "=r"(time_elapsed));
-    return time_elapsed - _init_cnt;
+    return riscv_timer_rdtime() - _init_cnt;
 }
 
 unsigned long rt_ktime_cputimer_getstep(void)
@@ -36,5 +36,5 @@ unsigned long rt_ktime_cputimer_getstep(void)
 
 void rt_ktime_cputimer_init(void)
 {
-    __asm__ __volatile__("rdtime %0" : "=r"(_init_cnt));
+    _init_cnt = riscv_timer_rdtime();
 }

components/lwp/arch/risc-v/rv64/lwp_arch.c

@@ -34,9 +34,9 @@
 #include <page.h>
 
 #include <cpuport.h>
-#include <encoding.h>
 #include <stack.h>
 #include <cache.h>
+#include <csr.h>
 
 extern rt_ubase_t MMUTable[];
 
@@ -113,7 +113,11 @@ int arch_user_space_init(struct rt_lwp *lwp)
 
 void *arch_kernel_mmu_table_get(void)
 {
+#if defined(RT_USING_SMP) && RT_CPUS_NR > 1
+    return (void *)((char *)MMUTable + rt_hw_cpu_id() * ARCH_PAGE_SIZE);
+#else
     return (void *)((char *)MMUTable);
+#endif
 }
 
 void arch_user_space_free(struct rt_lwp *lwp)
@@ -166,13 +170,14 @@ int arch_set_thread_context(void (*exit)(void), void *new_thread_stack,
     RT_ASSERT(thread_sp != RT_NULL);
     struct rt_hw_stack_frame *syscall_frame;
     struct rt_hw_stack_frame *thread_frame;
+    struct rt_hw_switch_frame *frame;
 
     rt_uint8_t *stk;
     rt_uint8_t *syscall_stk;
 
     stk = (rt_uint8_t *)new_thread_stack;
     /* reserve syscall context, all the registers are copyed from parent */
-    stk -= CTX_REG_NR * REGBYTES;
+    stk -= CTX_ALL_REG_NR * sizeof(void *);
     syscall_stk = stk;
 
     syscall_frame = (struct rt_hw_stack_frame *)stk;
@@ -192,12 +197,17 @@ int arch_set_thread_context(void (*exit)(void), void *new_thread_stack,
     syscall_frame->tp = (rt_ubase_t)thread->thread_idr;
 
 #ifdef ARCH_USING_NEW_CTX_SWITCH
-    extern void *_rt_hw_stack_init(rt_ubase_t *sp, rt_ubase_t ra, rt_ubase_t sstatus);
-    rt_ubase_t sstatus = read_csr(sstatus) | SSTATUS_SPP;
-    sstatus &= ~SSTATUS_SIE;
+    RT_UNUSED(syscall_stk);
+    RT_UNUSED(thread_frame);
+
+    frame = (struct rt_hw_switch_frame *)((rt_ubase_t)stk - sizeof(*frame));
+    rt_memset(frame, 0, sizeof(*frame));
+
+    frame->regs[RT_HW_SWITCH_CONTEXT_RA] = (rt_ubase_t)exit;
+    frame->regs[RT_HW_SWITCH_CONTEXT_XSTATUS] = (csr_read(CSR_STATUS) | SR_PP) & ~SR_IE;
 
     /* compatible to RESTORE_CONTEXT */
-    stk = (void *)_rt_hw_stack_init((rt_ubase_t *)stk, (rt_ubase_t)exit, sstatus);
+    stk = (void *)frame;
 #else
     /* build temp thread context */
     stk -= sizeof(struct rt_hw_stack_frame);
@@ -214,8 +224,8 @@ int arch_set_thread_context(void (*exit)(void), void *new_thread_stack,
     thread_frame->epc     = (rt_ubase_t)exit;
 
     /* set old exception mode as supervisor, because in kernel */
-    thread_frame->sstatus = read_csr(sstatus) | SSTATUS_SPP;
-    thread_frame->sstatus &= ~SSTATUS_SIE; /* must disable interrupt */
+    thread_frame->xstatus = read_csr(CSR_STATUS) | SR_PP;
+    thread_frame->xstatus &= ~SR_IE; /* must disable interrupt */
 
     /* set stack as syscall stack */
     thread_frame->user_sp_exc_stack = (rt_ubase_t)syscall_stk;

components/lwp/arch/risc-v/rv64/lwp_arch.h

@@ -16,6 +16,8 @@
 
 #ifdef ARCH_MM_MMU
 
+#include <cache.h>
+
 #ifdef ARCH_MM_MMU_32BIT_LIMIT
 #define USER_HEAP_VADDR     0xF0000000UL
 #define USER_HEAP_VEND      0xFE000000UL
@@ -77,6 +79,6 @@ void *arch_signal_ucontext_save(int signo, siginfo_t *psiginfo,
 }
 #endif
 
-#endif
+#endif /* ARCH_MM_MMU */
 
 #endif  /*LWP_ARCH_H__*/

components/lwp/arch/risc-v/rv64/lwp_gcc.S

@@ -19,10 +19,8 @@
 #define __ASSEMBLY__
 #endif /* __ASSEMBLY__ */
 
-#include "cpuport.h"
-#include "encoding.h"
-#include "stackframe.h"
-#include "asm-generic.h"
+#include "asm.h"
+#include "csr.h"
 
 .section      .text.lwp
 
@@ -33,13 +31,13 @@
 .type arch_start_umode, % function
 arch_start_umode:
     // load kstack for user process
-    csrw sscratch, a3
-    li t0, SSTATUS_SPP | SSTATUS_SIE    // set as user mode, close interrupt
-    csrc sstatus, t0
-    li t0, SSTATUS_SPIE // enable interrupt when return to user mode
-    csrs sstatus, t0
+    csrw CSR_SCRATCH, a3
+    li t0, SR_PP | SR_IE    // set as user mode, close interrupt
+    csrc CSR_STATUS, t0
+    li t0, SR_PIE // enable interrupt when return to user mode
+    csrs CSR_STATUS, t0
 
-    csrw sepc, a1
+    csrw CSR_EPC, a1
     mv sp, a2
     sret//enter user mode
 
@@ -49,12 +47,12 @@ arch_start_umode:
 .global arch_crt_start_umode
 .type arch_crt_start_umode, % function
 arch_crt_start_umode:
-    li t0, SSTATUS_SPP | SSTATUS_SIE    // set as user mode, close interrupt
-    csrc sstatus, t0
-    li t0, SSTATUS_SPIE // enable interrupt when return to user mode
-    csrs sstatus, t0
+    li t0, SR_PP | SR_IE    // set as user mode, close interrupt
+    csrc CSR_STATUS, t0
+    li t0, SR_PIE // enable interrupt when return to user mode
+    csrs CSR_STATUS, t0
 
-    csrw sepc, a1
+    csrw CSR_EPC, a1
     mv s0, a0
     mv s1, a1
     mv s2, a2
@@ -67,7 +65,7 @@ arch_crt_start_umode:
     mv ra, a0//return address
     mv a0, s0//args
 
-    csrw sscratch, s3
+    csrw CSR_SCRATCH, s3
     sret//enter user mode
 
 /**
@@ -95,26 +93,26 @@ arch_ret_to_user:
 
 ret_to_user_exit:
     RESTORE_ALL
-    // `RESTORE_ALL` also reset sp to user sp, and setup sscratch
+    // `RESTORE_ALL` also reset sp to user sp, and setup xscratch
     sret
 
 /**
  * Restore user context from exception frame stroraged in ustack
  * And handle pending signals;
  */
 arch_signal_quit:
-    LOAD a0, FRAME_OFF_SP(sp)
+    REG_L a0, FRAME_OFF_SP(sp)
     call arch_signal_ucontext_restore
 
     /* reset kernel sp to the stack */
-    addi sp, sp, CTX_REG_NR * REGBYTES
-    STORE sp, FRAME_OFF_SP(a0)
+    addi sp, sp, CTX_ALL_REG_NR * SZREG
+    REG_S sp, FRAME_OFF_SP(a0)
     /* return value is user sp */
     mv sp, a0
 
     /* restore user sp before enter trap */
-    addi a0, sp, CTX_REG_NR * REGBYTES
-    csrw sscratch, a0
+    addi a0, sp, CTX_ALL_REG_NR * SZREG
+    csrw CSR_SCRATCH, a0
 
 
     RESTORE_ALL
@@ -137,19 +135,19 @@ arch_thread_signal_enter:
     mv s2, a0
     mv s1, a3
 
-    LOAD t0, FRAME_OFF_SP(a2)
+    REG_L t0, FRAME_OFF_SP(a2)
     mv a3, t0
     call arch_signal_ucontext_save
 
     /** restore kernel sp */
-    addi sp, s3, CTX_REG_NR * REGBYTES
+    addi sp, s3, CTX_ALL_REG_NR * SZREG
 
     /**
      * set regiter RA to user signal handler
-     * set sp to user sp & save kernel sp in sscratch
+     * set sp to user sp & save kernel sp in xscratch
      */
     mv ra, a0
-    csrw sscratch, sp
+    csrw CSR_SCRATCH, sp
     mv sp, a0
 
     /**
@@ -161,13 +159,13 @@ arch_thread_signal_enter:
 
 1:
     /* enter user mode and enable interrupt when return to user mode */
-    li t0, SSTATUS_SPP
-    csrc sstatus, t0
-    li t0, SSTATUS_SPIE
-    csrs sstatus, t0
+    li t0, SR_PP
+    csrc CSR_STATUS, t0
+    li t0, SR_PIE
+    csrs CSR_STATUS, t0
 
-    /* sepc <- signal_handler */
-    csrw sepc, s1
+    /* xepc <- signal_handler */
+    csrw CSR_EPC, s1
     /* a0 <- signal id */
     mv a0, s2
     /* a1 <- siginfo */
@@ -176,7 +174,7 @@ arch_thread_signal_enter:
     mv a2, a1
 
     /* restore user GP */
-    LOAD gp, FRAME_OFF_GP(s3)
+    REG_L gp, FRAME_OFF_GP(s3)
 
     /**
      * handler(signo, psi, ucontext);
@@ -229,12 +227,12 @@ arch_clone_exit:
 START_POINT(syscall_entry)
 #ifndef ARCH_USING_NEW_CTX_SWITCH
     //swap to thread kernel stack
-    csrr t0, sstatus
+    csrr t0, CSR_STATUS
     andi t0, t0, 0x100
     beqz t0, __restore_sp_from_tcb
 
-__restore_sp_from_sscratch: // from kernel
-    csrr t0, sscratch
+__restore_sp_from_CSR_SCRATCH: // from kernel
+    csrr t0, CSR_SCRATCH
     j __move_stack_context
 
 __restore_sp_from_tcb: // from user
@@ -245,22 +243,22 @@ __restore_sp_from_tcb: // from user
 __move_stack_context:
     mv t1, sp//src
     mv sp, t0//switch stack
-    addi sp, sp, -CTX_REG_NR * REGBYTES
+    addi sp, sp, -CTX_ALL_REG_NR * SZREG
     //copy context
-    li s0, CTX_REG_NR//cnt
+    li s0, CTX_ALL_REG_NR//cnt
     mv t2, sp//dst
 
 copy_context_loop:
-    LOAD t0, 0(t1)
-    STORE t0, 0(t2)
+    REG_L t0, 0(t1)
+    REG_S t0, 0(t2)
     addi s0, s0, -1
     addi t1, t1, 8
     addi t2, t2, 8
     bnez s0, copy_context_loop
 #endif /* ARCH_USING_NEW_CTX_SWITCH */
 
     /* fetch SYSCALL ID */
-    LOAD a7, 17 * REGBYTES(sp)
+    REG_L a7, 17 * SZREG(sp)
     addi a7, a7, -0xfe
     beqz a7, arch_signal_quit
 
@@ -281,7 +279,7 @@ arch_syscall_exit:
     CLOSE_INTERRUPT
 
     #if defined(ARCH_MM_MMU)
-        LOAD s0, FRAME_OFF_SSTATUS(sp)
+        REG_L s0, FRAME_OFF_XSTATUS(sp)
         andi s0, s0, 0x100
         bnez s0, dont_ret_to_user
         j arch_ret_to_user
@@ -294,10 +292,10 @@ dont_ret_to_user:
     call  lwp_user_setting_restore
 
     /* after restore the reg `tp`, need modify context */
-    STORE tp, 4 * REGBYTES(sp)
+    REG_S tp, 4 * SZREG(sp)
 #endif
 
     //restore context
     RESTORE_ALL
-    csrw sscratch, zero
+    csrw CSR_SCRATCH, zero
     sret