diff --git a/bsp/bouffalo_lab/bl61x/board/Kconfig b/bsp/bouffalo_lab/bl61x/board/Kconfig index 1b46f07755c..1f87838e34f 100755 --- a/bsp/bouffalo_lab/bl61x/board/Kconfig +++ b/bsp/bouffalo_lab/bl61x/board/Kconfig @@ -33,14 +33,12 @@ menuconfig BSP_USING_USB default n if BSP_USING_USB config BSP_USING_USB_DEVICE - bool "Enable USB Device, default is msc ramdisk" + bool "Enable USB Device" default n select RT_USING_CHERRYUSB select RT_CHERRYUSB_DEVICE select RT_CHERRYUSB_DEVICE_SPEED_HS select RT_CHERRYUSB_DEVICE_BL - select RT_CHERRYUSB_DEVICE_MSC - select RT_CHERRYUSB_DEVICE_TEMPLATE_MSC config BSP_USING_USB_HOST bool "Enable USB Host" default n @@ -48,8 +46,4 @@ menuconfig BSP_USING_USB select RT_USING_CHERRYUSB select RT_CHERRYUSB_HOST select RT_CHERRYUSB_HOST_EHCI_BL - select RT_CHERRYUSB_HOST_CDC_ACM - select RT_CHERRYUSB_HOST_HID - select RT_CHERRYUSB_HOST_MSC - select RT_CHERRYUSB_HOST_CDC_RNDIS endif diff --git a/bsp/bouffalo_lab/bl61x/board/usb_config.h b/bsp/bouffalo_lab/bl61x/board/usb_config.h index d61ba9fc0d5..bb9332794ed 100644 --- a/bsp/bouffalo_lab/bl61x/board/usb_config.h +++ b/bsp/bouffalo_lab/bl61x/board/usb_config.h @@ -6,11 +6,15 @@ #ifndef CHERRYUSB_CONFIG_H #define CHERRYUSB_CONFIG_H -#include - /* ================ USB common Configuration ================ */ +#ifdef __RTTHREAD__ +#include + #define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__) +#else +#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) +#endif #ifndef CONFIG_USB_DBG_LEVEL #define CONFIG_USB_DBG_LEVEL USB_DBG_INFO @@ -19,14 +23,23 @@ /* Enable print with color */ #define CONFIG_USB_PRINTF_COLOR_ENABLE -/* data align size when use dma */ -#ifndef CONFIG_USB_ALIGN_SIZE +#define CONFIG_USB_DCACHE_ENABLE + +/* data align size when use dma or use dcache */ +#ifdef CONFIG_USB_DCACHE_ENABLE +#define CONFIG_USB_ALIGN_SIZE 32 // 32 or 64 +#else #define CONFIG_USB_ALIGN_SIZE 4 #endif /* attribute data into no cache ram */ #define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) +/* use usb_memcpy default for high performance but cost more flash memory. + * And, arm libc has a bug that memcpy() may cause data misalignment when the size is not a multiple of 4. +*/ +// #define CONFIG_USB_MEMCPY_DISABLE + /* ================= USB Device Stack Configuration ================ */ /* Ep0 in and out transfer buffer */ @@ -48,6 +61,20 @@ /* Enable test mode */ // #define CONFIG_USBDEV_TEST_MODE +/* enable advance desc register api */ +#define CONFIG_USBDEV_ADVANCE_DESC + +/* move ep0 setup handler from isr to thread */ +// #define CONFIG_USBDEV_EP0_THREAD + +#ifndef CONFIG_USBDEV_EP0_PRIO +#define CONFIG_USBDEV_EP0_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_EP0_STACKSIZE +#define CONFIG_USBDEV_EP0_STACKSIZE 2048 +#endif + #ifndef CONFIG_USBDEV_MSC_MAX_LUN #define CONFIG_USBDEV_MSC_MAX_LUN 1 #endif @@ -82,6 +109,28 @@ #define CONFIG_USBDEV_MSC_STACKSIZE 2048 #endif +#ifndef CONFIG_USBDEV_MTP_MAX_BUFSIZE +#define CONFIG_USBDEV_MTP_MAX_BUFSIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_OBJECTS +#define CONFIG_USBDEV_MTP_MAX_OBJECTS 256 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_PATHNAME +#define CONFIG_USBDEV_MTP_MAX_PATHNAME 256 +#endif + +#define CONFIG_USBDEV_MTP_THREAD + +#ifndef CONFIG_USBDEV_MTP_PRIO +#define CONFIG_USBDEV_MTP_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_MTP_STACKSIZE +#define CONFIG_USBDEV_MTP_STACKSIZE 4096 +#endif + #ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE #define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 #endif @@ -100,6 +149,7 @@ #endif #define CONFIG_USBDEV_RNDIS_USING_LWIP +#define CONFIG_USBDEV_CDC_ECM_USING_LWIP /* ================ USB HOST Stack Configuration ================== */ @@ -210,6 +260,11 @@ #define CONFIG_USBDEV_EP_NUM 5 #endif +// #define CONFIG_USBDEV_SOF_ENABLE + +/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */ +#define CONFIG_USB_HS + /* ---------------- FSDEV Configuration ---------------- */ //#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference @@ -220,7 +275,7 @@ // #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4) /* IN Endpoints Max packet Size / 4 */ // #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4) -// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4) +// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (1024 / 4) // #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4) // #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4) // #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4) @@ -229,6 +284,8 @@ // #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4) // #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_DMA_ENABLE + /* ---------------- MUSB Configuration ---------------- */ // #define CONFIG_USB_MUSB_SUNXI @@ -246,15 +303,19 @@ #define CONFIG_USB_EHCI_HCCR_OFFSET (0x0) #define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024 #define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM -#define CONFIG_USB_EHCI_QTD_NUM 3 -#define CONFIG_USB_EHCI_ITD_NUM 20 +#define CONFIG_USB_EHCI_QTD_NUM (CONFIG_USB_EHCI_QH_NUM * 3) +#define CONFIG_USB_EHCI_ITD_NUM 4 #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE // #define CONFIG_USB_EHCI_CONFIGFLAG // #define CONFIG_USB_EHCI_ISO // #define CONFIG_USB_EHCI_WITH_OHCI +// #define CONFIG_USB_EHCI_DESC_DCACHE_ENABLE /* ---------------- OHCI Configuration ---------------- */ #define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) +#define CONFIG_USB_OHCI_ED_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_OHCI_TD_NUM 3 +// #define CONFIG_USB_OHCI_DESC_DCACHE_ENABLE /* ---------------- XHCI Configuration ---------------- */ #define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) @@ -268,9 +329,17 @@ * (largest USB packet used / 4) + 1 for status information + 1 transfer complete + * 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario */ -// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE) / 4) +// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE)) /* ---------------- MUSB Configuration ---------------- */ // #define CONFIG_USB_MUSB_SUNXI +#ifndef usb_phyaddr2ramaddr +#define usb_phyaddr2ramaddr(addr) (addr) +#endif + +#ifndef usb_ramaddr2phyaddr +#define usb_ramaddr2phyaddr(addr) (addr) +#endif + #endif diff --git a/bsp/hpmicro/hpm6750evk2/board/Kconfig b/bsp/hpmicro/hpm6750evk2/board/Kconfig index c1d78ce7c2e..653d57867a2 100644 --- a/bsp/hpmicro/hpm6750evk2/board/Kconfig +++ b/bsp/hpmicro/hpm6750evk2/board/Kconfig @@ -361,14 +361,12 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_USB config BSP_USING_USB_DEVICE - bool "Enable USB Device, default is msc ramdisk" + bool "Enable USB Device" default n select RT_USING_CHERRYUSB select RT_CHERRYUSB_DEVICE select RT_CHERRYUSB_DEVICE_SPEED_HS select RT_CHERRYUSB_DEVICE_HPM - select RT_CHERRYUSB_DEVICE_MSC - select RT_CHERRYUSB_DEVICE_TEMPLATE_MSC config BSP_USING_USB_HOST bool "Enable USB Host" default n @@ -376,10 +374,6 @@ menu "On-chip Peripheral Drivers" select RT_USING_CHERRYUSB select RT_CHERRYUSB_HOST select RT_CHERRYUSB_HOST_EHCI_HPM - select RT_CHERRYUSB_HOST_CDC_ACM - select RT_CHERRYUSB_HOST_HID - select RT_CHERRYUSB_HOST_MSC - select RT_CHERRYUSB_HOST_CDC_RNDIS endif diff --git a/bsp/hpmicro/hpm6750evk2/board/usb_config.h b/bsp/hpmicro/hpm6750evk2/board/usb_config.h index 666cb68b346..ff5220c9a56 100644 --- a/bsp/hpmicro/hpm6750evk2/board/usb_config.h +++ b/bsp/hpmicro/hpm6750evk2/board/usb_config.h @@ -20,14 +20,23 @@ /* Enable print with color */ #define CONFIG_USB_PRINTF_COLOR_ENABLE -/* data align size when use dma */ -#ifndef CONFIG_USB_ALIGN_SIZE +#define CONFIG_USB_DCACHE_ENABLE + +/* data align size when use dma or use dcache */ +#ifdef CONFIG_USB_DCACHE_ENABLE +#define CONFIG_USB_ALIGN_SIZE HPM_L1C_CACHELINE_SIZE // 32 or 64 +#else #define CONFIG_USB_ALIGN_SIZE 4 #endif /* attribute data into no cache ram */ #define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) +/* use usb_memcpy default for high performance but cost more flash memory. + * And, arm libc has a bug that memcpy() may cause data misalignment when the size is not a multiple of 4. +*/ +// #define CONFIG_USB_MEMCPY_DISABLE + /* ================= USB Device Stack Configuration ================ */ /* Ep0 in and out transfer buffer */ @@ -49,6 +58,20 @@ /* Enable test mode */ // #define CONFIG_USBDEV_TEST_MODE +/* enable advance desc register api */ +#define CONFIG_USBDEV_ADVANCE_DESC + +/* move ep0 setup handler from isr to thread */ +// #define CONFIG_USBDEV_EP0_THREAD + +#ifndef CONFIG_USBDEV_EP0_PRIO +#define CONFIG_USBDEV_EP0_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_EP0_STACKSIZE +#define CONFIG_USBDEV_EP0_STACKSIZE 2048 +#endif + #ifndef CONFIG_USBDEV_MSC_MAX_LUN #define CONFIG_USBDEV_MSC_MAX_LUN 1 #endif @@ -83,6 +106,28 @@ #define CONFIG_USBDEV_MSC_STACKSIZE 2048 #endif +#ifndef CONFIG_USBDEV_MTP_MAX_BUFSIZE +#define CONFIG_USBDEV_MTP_MAX_BUFSIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_OBJECTS +#define CONFIG_USBDEV_MTP_MAX_OBJECTS 256 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_PATHNAME +#define CONFIG_USBDEV_MTP_MAX_PATHNAME 256 +#endif + +#define CONFIG_USBDEV_MTP_THREAD + +#ifndef CONFIG_USBDEV_MTP_PRIO +#define CONFIG_USBDEV_MTP_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_MTP_STACKSIZE +#define CONFIG_USBDEV_MTP_STACKSIZE 4096 +#endif + #ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE #define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 #endif @@ -101,6 +146,7 @@ #endif #define CONFIG_USBDEV_RNDIS_USING_LWIP +#define CONFIG_USBDEV_CDC_ECM_USING_LWIP /* ================ USB HOST Stack Configuration ================== */ @@ -211,6 +257,11 @@ #define CONFIG_USBDEV_EP_NUM USB_SOC_DCD_MAX_ENDPOINT_COUNT #endif +// #define CONFIG_USBDEV_SOF_ENABLE + +/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */ +#define CONFIG_USB_HS + /* ---------------- FSDEV Configuration ---------------- */ //#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference @@ -221,7 +272,7 @@ // #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4) /* IN Endpoints Max packet Size / 4 */ // #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4) -// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4) +// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (1024 / 4) // #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4) // #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4) // #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4) @@ -230,6 +281,8 @@ // #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4) // #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_DMA_ENABLE + /* ---------------- MUSB Configuration ---------------- */ // #define CONFIG_USB_MUSB_SUNXI @@ -247,15 +300,19 @@ #define CONFIG_USB_EHCI_HCCR_OFFSET (0x100) #define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024 #define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM -#define CONFIG_USB_EHCI_QTD_NUM 3 -#define CONFIG_USB_EHCI_ITD_NUM 20 +#define CONFIG_USB_EHCI_QTD_NUM (CONFIG_USB_EHCI_QH_NUM * 3) +#define CONFIG_USB_EHCI_ITD_NUM 4 // #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE // #define CONFIG_USB_EHCI_CONFIGFLAG // #define CONFIG_USB_EHCI_ISO // #define CONFIG_USB_EHCI_WITH_OHCI +// #define CONFIG_USB_EHCI_DESC_DCACHE_ENABLE /* ---------------- OHCI Configuration ---------------- */ #define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) +#define CONFIG_USB_OHCI_ED_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_OHCI_TD_NUM 3 +// #define CONFIG_USB_OHCI_DESC_DCACHE_ENABLE /* ---------------- XHCI Configuration ---------------- */ #define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) @@ -269,11 +326,19 @@ * (largest USB packet used / 4) + 1 for status information + 1 transfer complete + * 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario */ -// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE) / 4) +// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE)) /* ---------------- MUSB Configuration ---------------- */ // #define CONFIG_USB_MUSB_SUNXI -#define CONFIG_USB_EHCI_HPMICRO (1) +#ifndef usb_phyaddr2ramaddr +#define usb_phyaddr2ramaddr(addr) (addr) +#endif + +#ifndef usb_ramaddr2phyaddr +#define usb_ramaddr2phyaddr(addr) (addr) +#endif + +#define CONFIG_USB_EHCI_HPMICRO 1 #endif diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig index 7e78f83fd09..3457ec51b19 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig @@ -189,24 +189,18 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_USB config BSP_USING_USB_DEVICE - bool "Enable USB Device, default is msc ramdisk" + bool "Enable USB Device" default n select RT_USING_CHERRYUSB select RT_CHERRYUSB_DEVICE select RT_CHERRYUSB_DEVICE_SPEED_HS select RT_CHERRYUSB_DEVICE_CHIPIDEA_MCX - select RT_CHERRYUSB_DEVICE_MSC - select RT_CHERRYUSB_DEVICE_TEMPLATE_MSC config BSP_USING_USB_HOST bool "Enable USB Host" default n select RT_USING_CHERRYUSB select RT_CHERRYUSB_HOST select RT_CHERRYUSB_HOST_EHCI_MCX - select RT_CHERRYUSB_HOST_CDC_ACM - select RT_CHERRYUSB_HOST_HID - select RT_CHERRYUSB_HOST_MSC - select RT_CHERRYUSB_HOST_CDC_RNDIS endif diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/SConscript b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/SConscript index 6cf18427a88..277739d361f 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/SConscript +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/SConscript @@ -6,7 +6,6 @@ cwd = GetCurrentDir() src = Split(""" board.c cherryusb_port.c -usb_phy.c MCUX_Config/board/clock_config.c MCUX_Config/board/pin_mux.c """) diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb.h b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb.h deleted file mode 100644 index 80036769d7a..00000000000 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Copyright (c) 2015, Freescale Semiconductor, Inc. - * Copyright 2016 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __USB_H__ -#define __USB_H__ - -#include -#include - -/*! - * @addtogroup usb_drv - * @{ - */ - -/******************************************************************************* - * Definitions - ******************************************************************************/ -/*! @brief Defines USB stack major version */ -#define USB_STACK_VERSION_MAJOR (2UL) -/*! @brief Defines USB stack minor version */ -#define USB_STACK_VERSION_MINOR (10UL) -/*! @brief Defines USB stack bugfix version */ -#define USB_STACK_VERSION_BUGFIX (0U) - -/*! @brief USB stack version definition */ -#define USB_MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) - -/*! @brief USB stack component version definition, changed with component in yaml together */ -#define USB_STACK_COMPONENT_VERSION \ - MAKE_VERSION(USB_STACK_VERSION_MAJOR, USB_STACK_VERSION_MINOR, USB_STACK_VERSION_BUGFIX) - -/* - * Component ID used by tools - * - * FSL_COMPONENT_ID "middleware.usb.stack_common" - */ - -/*! @brief USB error code */ -typedef enum _usb_status -{ - kStatus_USB_Success = 0x00U, /*!< Success */ - kStatus_USB_Error, /*!< Failed */ - - kStatus_USB_Busy, /*!< Busy */ - kStatus_USB_InvalidHandle, /*!< Invalid handle */ - kStatus_USB_InvalidParameter, /*!< Invalid parameter */ - kStatus_USB_InvalidRequest, /*!< Invalid request */ - kStatus_USB_ControllerNotFound, /*!< Controller cannot be found */ - kStatus_USB_InvalidControllerInterface, /*!< Invalid controller interface */ - - kStatus_USB_NotSupported, /*!< Configuration is not supported */ - kStatus_USB_Retry, /*!< Enumeration get configuration retry */ - kStatus_USB_TransferStall, /*!< Transfer stalled */ - kStatus_USB_TransferFailed, /*!< Transfer failed */ - kStatus_USB_AllocFail, /*!< Allocation failed */ - kStatus_USB_LackSwapBuffer, /*!< Insufficient swap buffer for KHCI */ - kStatus_USB_TransferCancel, /*!< The transfer cancelled */ - kStatus_USB_BandwidthFail, /*!< Allocate bandwidth failed */ - kStatus_USB_MSDStatusFail, /*!< For MSD, the CSW status means fail */ - kStatus_USB_EHCIAttached, - kStatus_USB_EHCIDetached, - kStatus_USB_DataOverRun, /*!< The amount of data returned by the endpoint exceeded - either the size of the maximum data packet allowed - from the endpoint or the remaining buffer size. */ -} usb_status_t; - -/*! @brief USB host handle type define */ -typedef void *usb_host_handle; - -/*! @brief USB device handle type define. For device stack it is the whole device handle; for host stack it is the - * attached device instance handle*/ -typedef void *usb_device_handle; - -/*! @brief USB OTG handle type define */ -typedef void *usb_otg_handle; - -/*! @brief USB controller ID */ -typedef enum _usb_controller_index -{ - kUSB_ControllerKhci0 = 0U, /*!< KHCI 0U */ - kUSB_ControllerKhci1 = 1U, /*!< KHCI 1U, Currently, there are no platforms which have two KHCI IPs, this is reserved - to be used in the future. */ - kUSB_ControllerEhci0 = 2U, /*!< EHCI 0U */ - kUSB_ControllerEhci1 = 3U, /*!< EHCI 1U */ - - kUSB_ControllerLpcIp3511Fs0 = 4U, /*!< LPC USB IP3511 FS controller 0 */ - kUSB_ControllerLpcIp3511Fs1 = 5U, /*!< LPC USB IP3511 FS controller 1, there are no platforms which have two IP3511 - IPs, this is reserved to be used in the future. */ - - kUSB_ControllerLpcIp3511Hs0 = 6U, /*!< LPC USB IP3511 HS controller 0 */ - kUSB_ControllerLpcIp3511Hs1 = 7U, /*!< LPC USB IP3511 HS controller 1, there are no platforms which have two IP3511 - IPs, this is reserved to be used in the future. */ - - kUSB_ControllerOhci0 = 8U, /*!< OHCI 0U */ - kUSB_ControllerOhci1 = 9U, /*!< OHCI 1U, Currently, there are no platforms which have two OHCI IPs, this is reserved - to be used in the future. */ - - kUSB_ControllerIp3516Hs0 = 10U, /*!< IP3516HS 0U */ - kUSB_ControllerIp3516Hs1 = 11U, /*!< IP3516HS 1U, Currently, there are no platforms which have two IP3516HS IPs, - this is reserved to be used in the future. */ - kUSB_ControllerDwc30 = 12U, /*!< DWC3 0U */ - kUSB_ControllerDwc31 = 13U, /*!< DWC3 1U Currently, there are no platforms which have two Dwc IPs, this is reserved - to be used in the future.*/ -} usb_controller_index_t; - -/** - * @brief USB stack version fields - */ -typedef struct _usb_version -{ - uint8_t major; /*!< Major */ - uint8_t minor; /*!< Minor */ - uint8_t bugfix; /*!< Bug fix */ -} usb_version_t; - -/******************************************************************************* - * API - ******************************************************************************/ - -/*! @} */ - -#endif /* __USB_H__ */ diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_config.h b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_config.h index b4fc11176d6..6a772b7bebb 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_config.h +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_config.h @@ -19,13 +19,21 @@ /* Enable print with color */ #define CONFIG_USB_PRINTF_COLOR_ENABLE -/* data align size when use dma */ -#ifndef CONFIG_USB_ALIGN_SIZE +// #define CONFIG_USB_DCACHE_ENABLE + +/* data align size when use dma or use dcache */ +#ifdef CONFIG_USB_DCACHE_ENABLE +#define CONFIG_USB_ALIGN_SIZE 32 // 32 or 64 +#else #define CONFIG_USB_ALIGN_SIZE 4 #endif /* attribute data into no cache ram */ #define USB_NOCACHE_RAM_SECTION __attribute__((section(".NonCacheable"))) +/* use usb_memcpy default for high performance but cost more flash memory. + * And, arm libc has a bug that memcpy() may cause data misalignment when the size is not a multiple of 4. +*/ +// #define CONFIG_USB_MEMCPY_DISABLE /* ================= USB Device Stack Configuration ================ */ @@ -48,6 +56,20 @@ /* Enable test mode */ // #define CONFIG_USBDEV_TEST_MODE +/* enable advance desc register api */ +#define CONFIG_USBDEV_ADVANCE_DESC + +/* move ep0 setup handler from isr to thread */ +// #define CONFIG_USBDEV_EP0_THREAD + +#ifndef CONFIG_USBDEV_EP0_PRIO +#define CONFIG_USBDEV_EP0_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_EP0_STACKSIZE +#define CONFIG_USBDEV_EP0_STACKSIZE 2048 +#endif + #ifndef CONFIG_USBDEV_MSC_MAX_LUN #define CONFIG_USBDEV_MSC_MAX_LUN 1 #endif @@ -82,6 +104,28 @@ #define CONFIG_USBDEV_MSC_STACKSIZE 2048 #endif +#ifndef CONFIG_USBDEV_MTP_MAX_BUFSIZE +#define CONFIG_USBDEV_MTP_MAX_BUFSIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_OBJECTS +#define CONFIG_USBDEV_MTP_MAX_OBJECTS 256 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_PATHNAME +#define CONFIG_USBDEV_MTP_MAX_PATHNAME 256 +#endif + +#define CONFIG_USBDEV_MTP_THREAD + +#ifndef CONFIG_USBDEV_MTP_PRIO +#define CONFIG_USBDEV_MTP_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_MTP_STACKSIZE +#define CONFIG_USBDEV_MTP_STACKSIZE 4096 +#endif + #ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE #define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 #endif @@ -100,6 +144,7 @@ #endif #define CONFIG_USBDEV_RNDIS_USING_LWIP +#define CONFIG_USBDEV_CDC_ECM_USING_LWIP /* ================ USB HOST Stack Configuration ================== */ @@ -210,6 +255,10 @@ #define CONFIG_USBDEV_EP_NUM 6 #endif +// #define CONFIG_USBDEV_SOF_ENABLE + +/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */ +#define CONFIG_USB_HS /* ---------------- FSDEV Configuration ---------------- */ //#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference @@ -220,7 +269,7 @@ // #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4) /* IN Endpoints Max packet Size / 4 */ // #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4) -// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4) +// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (1024 / 4) // #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4) // #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4) // #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4) @@ -229,6 +278,8 @@ // #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4) // #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_DMA_ENABLE + /* ---------------- MUSB Configuration ---------------- */ // #define CONFIG_USB_MUSB_SUNXI @@ -246,15 +297,19 @@ #define CONFIG_USB_EHCI_HCCR_OFFSET (0x100) #define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024 #define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM -#define CONFIG_USB_EHCI_QTD_NUM 3 -#define CONFIG_USB_EHCI_ITD_NUM 20 +#define CONFIG_USB_EHCI_QTD_NUM (CONFIG_USB_EHCI_QH_NUM * 3) +#define CONFIG_USB_EHCI_ITD_NUM 4 // #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE // #define CONFIG_USB_EHCI_CONFIGFLAG // #define CONFIG_USB_EHCI_ISO // #define CONFIG_USB_EHCI_WITH_OHCI +// #define CONFIG_USB_EHCI_DESC_DCACHE_ENABLE /* ---------------- OHCI Configuration ---------------- */ #define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) +#define CONFIG_USB_OHCI_ED_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_OHCI_TD_NUM 3 +// #define CONFIG_USB_OHCI_DESC_DCACHE_ENABLE /* ---------------- XHCI Configuration ---------------- */ #define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) @@ -268,11 +323,19 @@ * (largest USB packet used / 4) + 1 for status information + 1 transfer complete + * 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario */ -// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE) / 4) +// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE)) /* ---------------- MUSB Configuration ---------------- */ // #define CONFIG_USB_MUSB_SUNXI -#define CONFIG_USB_EHCI_NXP (1) +#ifndef usb_phyaddr2ramaddr +#define usb_phyaddr2ramaddr(addr) (addr) +#endif + +#ifndef usb_ramaddr2phyaddr +#define usb_ramaddr2phyaddr(addr) (addr) +#endif + +#define CONFIG_USB_EHCI_NXP 1 #endif diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_phy.h b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_phy.h deleted file mode 100644 index 01474071146..00000000000 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_phy.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2015, Freescale Semiconductor, Inc. - * Copyright 2016 - 2017 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef __USB_PHY_H__ -#define __USB_PHY_H__ - -/******************************************************************************* - * Definitions - ******************************************************************************/ -typedef struct _usb_phy_config_struct -{ - uint8_t D_CAL; /* Decode to trim the nominal 17.78mA current source */ - uint8_t TXCAL45DP; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DP output pin */ - uint8_t TXCAL45DM; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DM output pin */ -} usb_phy_config_struct_t; - -#if defined(__cplusplus) -extern "C" { -#endif - -/******************************************************************************* - * API - ******************************************************************************/ -/*! - * @brief EHCI PHY get USB phy bass address. - * - * This function is used to get USB phy bass address. - * - * @param[in] controllerId EHCI controller ID; See the #usb_controller_index_t. - * - * @retval USB phy bass address. - */ -extern void *USB_EhciPhyGetBase(uint8_t controllerId); - -/*! - * @brief EHCI PHY initialization. - * - * This function initializes the EHCI PHY IP. - * - * @param[in] controllerId EHCI controller ID; See the #usb_controller_index_t. - * @param[in] freq The external input clock. - * - * @retval kStatus_USB_Success Cancel successfully. - * @retval kStatus_USB_Error The freq value is incorrect. - */ -extern uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig); - -/*! - * @brief ehci phy initialization for suspend and resume. - * - * This function initialize ehci phy IP for suspend and resume. - * - * @param[in] controllerId ehci controller id, please reference to #usb_controller_index_t. - * @param[in] freq the external input clock. - * for example: if the external input clock is 16M, the parameter freq should be 16000000. - * - * @retval kStatus_USB_Success cancel successfully. - * @retval kStatus_USB_Error the freq value is incorrect. - */ -extern uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig); - -/*! - * @brief EHCI PHY deinitialization. - * - * This function deinitializes the EHCI PHY IP. - * - * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t. - */ -extern void USB_EhciPhyDeinit(uint8_t controllerId); - -/*! - * @brief EHCI PHY disconnect detection enable or disable. - * - * This function enable/disable the host EHCI disconnect detection. - * - * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t. - * @param[in] enable - * 1U - enable; - * 0U - disable; - */ -extern void USB_EhcihostPhyDisconnectDetectCmd(uint8_t controllerId, uint8_t enable); -#if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U)) -#if ((defined FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE) && (FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE > 0U)) -/*! - * @brief Force the PHY enter FS Mode - * - * on RT500 and RT600, the device doesn't enter FS Mode after vbus is invalide and the controller works as HS. - * - * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t. - * @param[in] enable - * 1U - enable; - * 0U - disable; - */ -extern void USB_PhyDeviceForceEnterFSMode(uint8_t controllerId, uint8_t enable); -#endif -#endif -#if defined(__cplusplus) -} -#endif - -#endif /* __USB_PHY_H__ */ diff --git a/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c index 208b1d382f9..9530ec33aaa 100644 --- a/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c +++ b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c @@ -9,19 +9,6 @@ */ #include "board.h" #include "rtthread.h" -#include "drv_config.h" - -static PCD_HandleTypeDef hpcd_USB_OTG_FS; -void usb_dc_low_level_init(uint8_t busid) -{ - hpcd_USB_OTG_FS.Instance = USB_OTG_FS; - HAL_PCD_MspInit(&hpcd_USB_OTG_FS); -} - -void usb_dc_low_level_deinit(uint8_t busid) -{ - HAL_PCD_MspDeInit(&hpcd_USB_OTG_FS); -} #ifdef RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM /* Register the EMAC device */ @@ -42,13 +29,3 @@ static int cherry_usb_cdc_send(int argc, char **argv) MSH_CMD_EXPORT(cherry_usb_cdc_send, send the cdc data for test) #endif -#ifdef USBD_IRQ_HANDLER - void USBD_IRQ_HANDLER(void) -{ - extern void USBD_IRQHandler(uint8_t busid); - USBD_IRQHandler(0); -} -#else -#error USBD_IRQ_HANDLER need to USB IRQ like #define USBD_IRQ_HANDLER OTG_HS_IRQHandler -#endif - diff --git a/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h index 23b6e865863..ad3632f481a 100644 --- a/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h +++ b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h @@ -11,8 +11,9 @@ #define CHERRYUSB_CONFIG_H /* ================ USB common Configuration ================ */ +#include "rtthread.h" -#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) +#define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__) #ifndef CONFIG_USB_DBG_LEVEL #define CONFIG_USB_DBG_LEVEL USB_DBG_INFO diff --git a/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/cherryusb.c b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/cherryusb.c index 208b1d382f9..0d4322b613d 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/cherryusb.c +++ b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/cherryusb.c @@ -11,18 +11,6 @@ #include "rtthread.h" #include "drv_config.h" -static PCD_HandleTypeDef hpcd_USB_OTG_FS; -void usb_dc_low_level_init(uint8_t busid) -{ - hpcd_USB_OTG_FS.Instance = USB_OTG_FS; - HAL_PCD_MspInit(&hpcd_USB_OTG_FS); -} - -void usb_dc_low_level_deinit(uint8_t busid) -{ - HAL_PCD_MspDeInit(&hpcd_USB_OTG_FS); -} - #ifdef RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM /* Register the EMAC device */ static int rt_hw_stm32_cherryusb_cdc_init(void) @@ -42,13 +30,3 @@ static int cherry_usb_cdc_send(int argc, char **argv) MSH_CMD_EXPORT(cherry_usb_cdc_send, send the cdc data for test) #endif -#ifdef USBD_IRQ_HANDLER - void USBD_IRQ_HANDLER(void) -{ - extern void USBD_IRQHandler(uint8_t busid); - USBD_IRQHandler(0); -} -#else -#error USBD_IRQ_HANDLER need to USB IRQ like #define USBD_IRQ_HANDLER OTG_HS_IRQHandler -#endif - diff --git a/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/usb_config.h b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/usb_config.h index 8918959bf72..4f782cbe6d5 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/usb_config.h +++ b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/usb_config.h @@ -11,8 +11,9 @@ #define CHERRYUSB_CONFIG_H /* ================ USB common Configuration ================ */ +#include "rtthread.h" -#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) +#define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__) #ifndef CONFIG_USB_DBG_LEVEL #define CONFIG_USB_DBG_LEVEL USB_DBG_INFO diff --git a/components/drivers/usb/Kconfig b/components/drivers/usb/Kconfig index cd8e4ebf869..3af62ab03e2 100644 --- a/components/drivers/usb/Kconfig +++ b/components/drivers/usb/Kconfig @@ -1 +1 @@ -rsource "cherryusb/Kconfig" +rsource "cherryusb/Kconfig.rtt" diff --git a/components/drivers/usb/cherryusb/.cmake-format.json b/components/drivers/usb/cherryusb/.cmake-format.json new file mode 100644 index 00000000000..a2f9b5ef352 --- /dev/null +++ b/components/drivers/usb/cherryusb/.cmake-format.json @@ -0,0 +1,311 @@ +{ + "_help_parse": "Options affecting listfile parsing", + "parse": { + "_help_additional_commands": [ + "Specify structure for custom cmake functions" + ], + "additional_commands": { + "foo": { + "flags": [ + "BAR", + "BAZ" + ], + "kwargs": { + "HEADERS": "*", + "SOURCES": "*", + "DEPENDS": "*" + } + } + }, + "_help_override_spec": [ + "Override configurations per-command where available" + ], + "override_spec": {}, + "_help_vartags": [ + "Specify variable tags." + ], + "vartags": [], + "_help_proptags": [ + "Specify property tags." + ], + "proptags": [] + }, + "_help_format": "Options affecting formatting.", + "format": { + "_help_disable": [ + "Disable formatting entirely, making cmake-format a no-op" + ], + "disable": false, + "_help_line_width": [ + "How wide to allow formatted cmake files" + ], + "line_width": 120, + "_help_tab_size": [ + "How many spaces to tab for indent" + ], + "tab_size": 4, + "_help_use_tabchars": [ + "If true, lines are indented using tab characters (utf-8", + "0x09) instead of space characters (utf-8 0x20).", + "In cases where the layout would require a fractional tab", + "character, the behavior of the fractional indentation is", + "governed by " + ], + "use_tabchars": false, + "_help_fractional_tab_policy": [ + "If is True, then the value of this variable", + "indicates how fractional indentions are handled during", + "whitespace replacement. If set to 'use-space', fractional", + "indentation is left as spaces (utf-8 0x20). If set to", + "`round-up` fractional indentation is replaced with a single", + "tab character (utf-8 0x09) effectively shifting the column", + "to the next tabstop" + ], + "fractional_tab_policy": "use-space", + "_help_max_subgroups_hwrap": [ + "If an argument group contains more than this many sub-groups", + "(parg or kwarg groups) then force it to a vertical layout." + ], + "max_subgroups_hwrap": 2, + "_help_max_pargs_hwrap": [ + "If a positional argument group contains more than this many", + "arguments, then force it to a vertical layout." + ], + "max_pargs_hwrap": 6, + "_help_max_rows_cmdline": [ + "If a cmdline positional group consumes more than this many", + "lines without nesting, then invalidate the layout (and nest)" + ], + "max_rows_cmdline": 2, + "_help_separate_ctrl_name_with_space": [ + "If true, separate flow control names from their parentheses", + "with a space" + ], + "separate_ctrl_name_with_space": false, + "_help_separate_fn_name_with_space": [ + "If true, separate function names from parentheses with a", + "space" + ], + "separate_fn_name_with_space": false, + "_help_dangle_parens": [ + "If a statement is wrapped to more than one line, than dangle", + "the closing parenthesis on its own line." + ], + "dangle_parens": true, + "_help_dangle_align": [ + "If the trailing parenthesis must be 'dangled' on its on", + "line, then align it to this reference: `prefix`: the start", + "of the statement, `prefix-indent`: the start of the", + "statement, plus one indentation level, `child`: align to", + "the column of the arguments" + ], + "dangle_align": "prefix", + "_help_min_prefix_chars": [ + "If the statement spelling length (including space and", + "parenthesis) is smaller than this amount, then force reject", + "nested layouts." + ], + "min_prefix_chars": 4, + "_help_max_prefix_chars": [ + "If the statement spelling length (including space and", + "parenthesis) is larger than the tab width by more than this", + "amount, then force reject un-nested layouts." + ], + "max_prefix_chars": 10, + "_help_max_lines_hwrap": [ + "If a candidate layout is wrapped horizontally but it exceeds", + "this many lines, then reject the layout." + ], + "max_lines_hwrap": 2, + "_help_line_ending": [ + "What style line endings to use in the output." + ], + "line_ending": "unix", + "_help_command_case": [ + "Format command names consistently as 'lower' or 'upper' case" + ], + "command_case": "canonical", + "_help_keyword_case": [ + "Format keywords consistently as 'lower' or 'upper' case" + ], + "keyword_case": "unchanged", + "_help_always_wrap": [ + "A list of command names which should always be wrapped" + ], + "always_wrap": [], + "_help_enable_sort": [ + "If true, the argument lists which are known to be sortable", + "will be sorted lexicographicall" + ], + "enable_sort": true, + "_help_autosort": [ + "If true, the parsers may infer whether or not an argument", + "list is sortable (without annotation)." + ], + "autosort": false, + "_help_require_valid_layout": [ + "By default, if cmake-format cannot successfully fit", + "everything into the desired linewidth it will apply the", + "last, most agressive attempt that it made. If this flag is", + "True, however, cmake-format will print error, exit with non-", + "zero status code, and write-out nothing" + ], + "require_valid_layout": false, + "_help_layout_passes": [ + "A dictionary mapping layout nodes to a list of wrap", + "decisions. See the documentation for more information." + ], + "layout_passes": {} + }, + "_help_markup": "Options affecting comment reflow and formatting.", + "markup": { + "_help_bullet_char": [ + "What character to use for bulleted lists" + ], + "bullet_char": "*", + "_help_enum_char": [ + "What character to use as punctuation after numerals in an", + "enumerated list" + ], + "enum_char": ".", + "_help_first_comment_is_literal": [ + "If comment markup is enabled, don't reflow the first comment", + "block in each listfile. Use this to preserve formatting of", + "your copyright/license statements." + ], + "first_comment_is_literal": true, + "_help_literal_comment_pattern": [ + "If comment markup is enabled, don't reflow any comment block", + "which matches this (regex) pattern. Default is `None`", + "(disabled)." + ], + "literal_comment_pattern": null, + "_help_fence_pattern": [ + "Regular expression to match preformat fences in comments", + "default= ``r'^\\s*([`~]{3}[`~]*)(.*)$'``" + ], + "fence_pattern": "^\\s*([`~]{3}[`~]*)(.*)$", + "_help_ruler_pattern": [ + "Regular expression to match rulers in comments default=", + "``r'^\\s*[^\\w\\s]{3}.*[^\\w\\s]{3}$'``" + ], + "ruler_pattern": "^\\s*[^\\w\\s]{3}.*[^\\w\\s]{3}$", + "_help_explicit_trailing_pattern": [ + "If a comment line matches starts with this pattern then it", + "is explicitly a trailing comment for the preceeding", + "argument. Default is '#<'" + ], + "explicit_trailing_pattern": "#<", + "_help_hashruler_min_length": [ + "If a comment line starts with at least this many consecutive", + "hash characters, then don't lstrip() them off. This allows", + "for lazy hash rulers where the first hash char is not", + "separated by space" + ], + "hashruler_min_length": 10, + "_help_canonicalize_hashrulers": [ + "If true, then insert a space between the first hash char and", + "remaining hash chars in a hash ruler, and normalize its", + "length to fill the column" + ], + "canonicalize_hashrulers": true, + "_help_enable_markup": [ + "enable comment markup parsing and reflow" + ], + "enable_markup": true + }, + "_help_lint": "Options affecting the linter", + "lint": { + "_help_disabled_codes": [ + "a list of lint codes to disable" + ], + "disabled_codes": [], + "_help_function_pattern": [ + "regular expression pattern describing valid function names" + ], + "function_pattern": "[0-9a-z_]+", + "_help_macro_pattern": [ + "regular expression pattern describing valid macro names" + ], + "macro_pattern": "[0-9A-Z_]+", + "_help_global_var_pattern": [ + "regular expression pattern describing valid names for", + "variables with global (cache) scope" + ], + "global_var_pattern": "[A-Z][0-9A-Z_]+", + "_help_internal_var_pattern": [ + "regular expression pattern describing valid names for", + "variables with global scope (but internal semantic)" + ], + "internal_var_pattern": "_[A-Z][0-9A-Z_]+", + "_help_local_var_pattern": [ + "regular expression pattern describing valid names for", + "variables with local scope" + ], + "local_var_pattern": "[a-z][a-z0-9_]+", + "_help_private_var_pattern": [ + "regular expression pattern describing valid names for", + "privatedirectory variables" + ], + "private_var_pattern": "_[0-9a-z_]+", + "_help_public_var_pattern": [ + "regular expression pattern describing valid names for public", + "directory variables" + ], + "public_var_pattern": "[A-Z][0-9A-Z_]+", + "_help_argument_var_pattern": [ + "regular expression pattern describing valid names for", + "function/macro arguments and loop variables." + ], + "argument_var_pattern": "[a-z][a-z0-9_]+", + "_help_keyword_pattern": [ + "regular expression pattern describing valid names for", + "keywords used in functions or macros" + ], + "keyword_pattern": "[A-Z][0-9A-Z_]+", + "_help_max_conditionals_custom_parser": [ + "In the heuristic for C0201, how many conditionals to match", + "within a loop in before considering the loop a parser." + ], + "max_conditionals_custom_parser": 2, + "_help_min_statement_spacing": [ + "Require at least this many newlines between statements" + ], + "min_statement_spacing": 1, + "_help_max_statement_spacing": [ + "Require no more than this many newlines between statements" + ], + "max_statement_spacing": 2, + "max_returns": 6, + "max_branches": 12, + "max_arguments": 5, + "max_localvars": 15, + "max_statements": 50 + }, + "_help_encode": "Options affecting file encoding", + "encode": { + "_help_emit_byteorder_mark": [ + "If true, emit the unicode byte-order mark (BOM) at the start", + "of the file" + ], + "emit_byteorder_mark": false, + "_help_input_encoding": [ + "Specify the encoding of the input file. Defaults to utf-8" + ], + "input_encoding": "utf-8", + "_help_output_encoding": [ + "Specify the encoding of the output file. Defaults to utf-8.", + "Note that cmake only claims to support utf-8 so be careful", + "when using anything else" + ], + "output_encoding": "utf-8" + }, + "_help_misc": "Miscellaneous configurations options.", + "misc": { + "_help_per_command": [ + "A dictionary containing any per-command configuration", + "overrides. Currently only `command_case` is supported." + ], + "per_command": {} + } +} diff --git a/components/drivers/usb/cherryusb/Kconfig b/components/drivers/usb/cherryusb/Kconfig index 9e0f8ce02ac..ce39f3e713e 100644 --- a/components/drivers/usb/cherryusb/Kconfig +++ b/components/drivers/usb/cherryusb/Kconfig @@ -1,328 +1,345 @@ -# Kconfig file for package CherryUSB -menuconfig RT_USING_CHERRYUSB - bool "Using USB with CherryUSB" +# Kconfig file for CherryUSB +menuconfig CHERRYUSB + bool "CherryUSB Configuration" default n -if RT_USING_CHERRYUSB +if CHERRYUSB - menuconfig RT_CHERRYUSB_DEVICE + menuconfig CHERRYUSB_DEVICE bool "Enable usb device mode" default n - if RT_CHERRYUSB_DEVICE + if CHERRYUSB_DEVICE choice prompt "Select usb device speed" - default RT_CHERRYUSB_DEVICE_SPEED_FS - config RT_CHERRYUSB_DEVICE_SPEED_FS + default CHERRYUSB_DEVICE_SPEED_FS + config CHERRYUSB_DEVICE_SPEED_FS bool "FS" - config RT_CHERRYUSB_DEVICE_SPEED_HS + config CHERRYUSB_DEVICE_SPEED_HS bool "HS" - config RT_CHERRYUSB_DEVICE_SPEED_AUTO + config CHERRYUSB_DEVICE_SPEED_AUTO bool "AUTO" endchoice choice prompt "Select usb device ip, and some ip need config in usb_config.h, please check" - default RT_CHERRYUSB_DEVICE_CUSTOM - config RT_CHERRYUSB_DEVICE_CUSTOM + default CHERRYUSB_DEVICE_CUSTOM + config CHERRYUSB_DEVICE_CUSTOM bool "CUSTOM (Implement it yourself)" - config RT_CHERRYUSB_DEVICE_FSDEV - bool "fsdev" - config RT_CHERRYUSB_DEVICE_DWC2_ST + config CHERRYUSB_DEVICE_FSDEV_ST + bool "fsdev_st" + config CHERRYUSB_DEVICE_FSDEV_CUSTOM + bool "fsdev_custom" + config CHERRYUSB_DEVICE_DWC2_ST bool "dwc2_st" - config RT_CHERRYUSB_DEVICE_DWC2_ESP + config CHERRYUSB_DEVICE_DWC2_ESP bool "dwc2_esp" - config RT_CHERRYUSB_DEVICE_DWC2_AT + config CHERRYUSB_DEVICE_DWC2_KENDRYTE + bool "dwc2_kendryte" + config CHERRYUSB_DEVICE_DWC2_AT bool "dwc2_at" - config RT_CHERRYUSB_DEVICE_DWC2_GD - bool "dwc2_gd" - config RT_CHERRYUSB_DEVICE_DWC2_HC + config CHERRYUSB_DEVICE_DWC2_HC bool "dwc2_hc" - config RT_CHERRYUSB_DEVICE_DWC2_KENDRYTE - bool "dwc2_kendryte" - config RT_CHERRYUSB_DEVICE_DWC2_CUSTOM + config CHERRYUSB_DEVICE_DWC2_NATION + bool "dwc2_nation" + config CHERRYUSB_DEVICE_DWC2_GD + bool "dwc2_gd" + config CHERRYUSB_DEVICE_DWC2_CUSTOM bool "dwc2_custom" - config RT_CHERRYUSB_DEVICE_MUSB_ES + config CHERRYUSB_DEVICE_MUSB_ES bool "musb_es" - config RT_CHERRYUSB_DEVICE_MUSB_SUNXI + config CHERRYUSB_DEVICE_MUSB_SUNXI bool "musb_sunxi" - config RT_CHERRYUSB_DEVICE_MUSB_BK + config CHERRYUSB_DEVICE_MUSB_BK bool "musb_bk" - config RT_CHERRYUSB_DEVICE_MUSB_CUSTOM + config CHERRYUSB_DEVICE_MUSB_CUSTOM bool "musb_custom" - config RT_CHERRYUSB_DEVICE_KINETIS_MCX - bool "kinetis_mcx" - config RT_CHERRYUSB_DEVICE_KINETIS_CUSTOM - bool "kinetis_custom" - config RT_CHERRYUSB_DEVICE_CHIPIDEA_MCX + config CHERRYUSB_DEVICE_CHIPIDEA_MCX bool "chipidea_mcx" - config RT_CHERRYUSB_DEVICE_CHIPIDEA_CUSTOM + config CHERRYUSB_DEVICE_CHIPIDEA_CUSTOM bool "chipidea_custom" - config RT_CHERRYUSB_DEVICE_BL + config CHERRYUSB_DEVICE_KINETIS_MCX + bool "kinetis_mcx" + config CHERRYUSB_DEVICE_KINETIS_MM32 + bool "kinetis_mm32" + config CHERRYUSB_DEVICE_KINETIS_CUSTOM + bool "kinetis_custom" + config CHERRYUSB_DEVICE_BL bool "bouffalo" - config RT_CHERRYUSB_DEVICE_CH32 - bool "ch32" - config RT_CHERRYUSB_DEVICE_HPM + config CHERRYUSB_DEVICE_HPM bool "hpm" - config RT_CHERRYUSB_DEVICE_AIC + config CHERRYUSB_DEVICE_AIC bool "aic" - config RT_CHERRYUSB_DEVICE_PUSB2 + config CHERRYUSB_DEVICE_RP2040 + bool "rp2040" + config CHERRYUSB_DEVICE_CH32 + bool "ch32" + config CHERRYUSB_DEVICE_PUSB2 bool "pusb2" - config RT_CHERRYUSB_DEVICE_NRF5X - bool "nrf5x" endchoice - config RT_CHERRYUSB_DEVICE_CDC_ACM + config CHERRYUSB_DEVICE_CDC_ACM bool prompt "Enable usb cdc acm device" default n - config RT_CHERRYUSB_DEVICE_HID + config CHERRYUSB_DEVICE_HID bool prompt "Enable usb hid device" default n - config RT_CHERRYUSB_DEVICE_MSC + config CHERRYUSB_DEVICE_MSC bool prompt "Enable usb msc device" default n - config RT_CHERRYUSB_DEVICE_AUDIO + config CHERRYUSB_DEVICE_AUDIO bool prompt "Enable usb audio device" default n - config RT_CHERRYUSB_DEVICE_VIDEO + config CHERRYUSB_DEVICE_VIDEO bool prompt "Enable usb video device" default n - config RT_CHERRYUSB_DEVICE_CDC_RNDIS + config CHERRYUSB_DEVICE_CDC_RNDIS bool prompt "Enable usb cdc rndis device" default n - config RT_CHERRYUSB_DEVICE_CDC_ECM + config CHERRYUSB_DEVICE_CDC_ECM bool prompt "Enable usb cdc ecm device" default n - config RT_CHERRYUSB_DEVICE_CDC_NCM + config CHERRYUSB_DEVICE_CDC_NCM bool prompt "Enable usb cdc ncm device" default n - config RT_CHERRYUSB_DEVICE_DFU + config CHERRYUSB_DEVICE_MTP + bool + prompt "Enable usb mtp device, it is commercial charge" + default n + + config CHERRYUSB_DEVICE_DFU bool prompt "Enable usb dfu device" default n + config CHERRYUSB_DEVICE_ADB + bool + prompt "Enable usb adb device" + default n + choice prompt "Select usb device template" - default RT_CHERRYUSB_DEVICE_TEMPLATE_NONE - config RT_CHERRYUSB_DEVICE_TEMPLATE_NONE + default CHERRYUSB_DEVICE_TEMPLATE_NONE + config CHERRYUSB_DEVICE_TEMPLATE_NONE bool "none (Implement it yourself)" - config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM + config CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM bool "cdc_acm" - config RT_CHERRYUSB_DEVICE_TEMPLATE_MSC - bool "msc_ram" - config RT_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV - bool "msc_blkdev" - config RT_CHERRYUSB_DEVICE_TEMPLATE_HID_KEYBOARD + config CHERRYUSB_DEVICE_TEMPLATE_MSC + bool "msc" + config CHERRYUSB_DEVICE_TEMPLATE_HID_KEYBOARD bool "hid_keyboard" - config RT_CHERRYUSB_DEVICE_TEMPLATE_HID_MOUSE + config CHERRYUSB_DEVICE_TEMPLATE_HID_MOUSE bool "hid_mouse" - config RT_CHERRYUSB_DEVICE_TEMPLATE_HID_CUSTOM + config CHERRYUSB_DEVICE_TEMPLATE_HID_CUSTOM bool "hid_custom" - config RT_CHERRYUSB_DEVICE_TEMPLATE_VIDEO + config CHERRYUSB_DEVICE_TEMPLATE_VIDEO bool "video" - config RT_CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V1_MIC_SPEAKER + config CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V1_MIC_SPEAKER bool "audio_v1_mic_speaker_multichan" - config RT_CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V2_MIC_SPEAKER + config CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V2_MIC_SPEAKER bool "audio_v2_mic_speaker_multichan" - config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_RNDIS + config CHERRYUSB_DEVICE_TEMPLATE_CDC_RNDIS bool "cdc_rndis" - config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ECM + config CHERRYUSB_DEVICE_TEMPLATE_CDC_ECM bool "cdc_ecm" - config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_NCM + config CHERRYUSB_DEVICE_TEMPLATE_CDC_NCM bool "cdc_ncm" - config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC + config CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC bool "cdc_acm_msc" - config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC_HID + config CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC_HID bool "cdc_acm_msc_hid" - config RT_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV1 + config CHERRYUSB_DEVICE_TEMPLATE_WINUSBV1 bool "winusbv1" - config RT_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_CDC + config CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_CDC bool "winusbv2_cdc" - config RT_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_HID + config CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_HID bool "winusbv2_hid" endchoice endif - menuconfig RT_CHERRYUSB_HOST + menuconfig CHERRYUSB_HOST bool "Enable usb host mode" default n - if RT_CHERRYUSB_HOST + if CHERRYUSB_HOST choice prompt "Select usb host ip, and some ip need config in usb_config.h, please check" - default RT_CHERRYUSB_HOST_CUSTOM - config RT_CHERRYUSB_HOST_CUSTOM + default CHERRYUSB_HOST_CUSTOM + config CHERRYUSB_HOST_CUSTOM bool "CUSTOM (Implement it yourself)" - config RT_CHERRYUSB_HOST_EHCI_BL + config CHERRYUSB_HOST_EHCI_BL bool "ehci_bouffalo" - config RT_CHERRYUSB_HOST_EHCI_HPM + config CHERRYUSB_HOST_EHCI_HPM bool "ehci_hpm" - config RT_CHERRYUSB_HOST_EHCI_AIC + config CHERRYUSB_HOST_EHCI_AIC bool "ehci_aic" - config RT_CHERRYUSB_HOST_EHCI_MCX + config CHERRYUSB_HOST_EHCI_MCX bool "ehci_mcx" - config RT_CHERRYUSB_HOST_EHCI_NUC980 + config CHERRYUSB_HOST_EHCI_NUC980 bool "ehci_nuc980" - config RT_CHERRYUSB_HOST_EHCI_MA35D0 + config CHERRYUSB_HOST_EHCI_MA35D0 bool "ehci_ma35d0" - config RT_CHERRYUSB_HOST_EHCI_CUSTOM + config CHERRYUSB_HOST_EHCI_CUSTOM bool "ehci_custom" - config RT_CHERRYUSB_HOST_DWC2_ST + config CHERRYUSB_HOST_DWC2_ST bool "dwc2_st" - config RT_CHERRYUSB_HOST_DWC2_ESP + config CHERRYUSB_HOST_DWC2_ESP bool "dwc2_esp" - config RT_CHERRYUSB_HOST_DWC2_KENDRYTE + config CHERRYUSB_HOST_DWC2_KENDRYTE bool "dwc2_kendryte" - config RT_CHERRYUSB_HOST_DWC2_CUSTOM + config CHERRYUSB_HOST_DWC2_HC + bool "dwc2_hc" + config CHERRYUSB_HOST_DWC2_NATION + bool "dwc2_nation" + config CHERRYUSB_HOST_DWC2_CUSTOM bool "dwc2_custom" - config RT_CHERRYUSB_HOST_MUSB_ES + config CHERRYUSB_HOST_MUSB_ES bool "musb_es" - config RT_CHERRYUSB_HOST_MUSB_SUNXI + config CHERRYUSB_HOST_MUSB_SUNXI bool "musb_sunxi" - config RT_CHERRYUSB_HOST_MUSB_BK + config CHERRYUSB_HOST_MUSB_BK bool "musb_bk" - config RT_CHERRYUSB_HOST_MUSB_CUSTOM + config CHERRYUSB_HOST_MUSB_CUSTOM bool "musb_custom" - config RT_CHERRYUSB_HOST_PUSB2 + config CHERRYUSB_HOST_PUSB2 bool "pusb2" - config RT_CHERRYUSB_HOST_XHCI + config CHERRYUSB_HOST_XHCI_PHYTIUM + bool "xhci_phytium" + config CHERRYUSB_HOST_XHCI_CUSTOM bool "xhci" - config RT_CHERRYUSB_HOST_KINETIS_MCX + config CHERRYUSB_HOST_KINETIS_MCX bool "kinetis_mcx" - config RT_CHERRYUSB_HOST_KINETIS_CUSTOM + config CHERRYUSB_HOST_KINETIS_MM32 + bool "kinetis_mm32" + config CHERRYUSB_HOST_KINETIS_CUSTOM bool "kinetis_custom" + config CHERRYUSB_HOST_RP2040 + bool "rp2040" endchoice - config RT_CHERRYUSB_HOST_CDC_ACM + config CHERRYUSB_HOST_CDC_ACM bool prompt "Enable usb cdc acm driver" default n - config RT_CHERRYUSB_HOST_HID + config CHERRYUSB_HOST_HID bool prompt "Enable usb hid driver" default n - config RT_CHERRYUSB_HOST_MSC + config CHERRYUSB_HOST_MSC bool prompt "Enable usb msc driver" default n - select RT_USING_DFS - select RT_USING_DFS_ELMFAT - config RT_CHERRYUSB_HOST_CDC_ECM + config CHERRYUSB_HOST_CDC_ECM bool prompt "Enable usb cdc ecm driver" - select RT_USING_LWIP - select CONFIG_USBHOST_PLATFORM_CDC_ECM + select USBHOST_PLATFORM_CDC_ECM default n - config RT_CHERRYUSB_HOST_CDC_RNDIS + config CHERRYUSB_HOST_CDC_RNDIS bool prompt "Enable usb rndis driver" - select RT_USING_LWIP - select CONFIG_USBHOST_PLATFORM_CDC_RNDIS + select USBHOST_PLATFORM_CDC_RNDIS default n - config RT_CHERRYUSB_HOST_CDC_NCM + config CHERRYUSB_HOST_CDC_NCM bool prompt "Enable usb cdc ncm driver" - select RT_USING_LWIP - select CONFIG_USBHOST_PLATFORM_CDC_NCM + select USBHOST_PLATFORM_CDC_NCM default n - config RT_CHERRYUSB_HOST_VIDEO + config CHERRYUSB_HOST_VIDEO bool prompt "Enable usb video driver, it is commercial charge" default n - config RT_CHERRYUSB_HOST_AUDIO + config CHERRYUSB_HOST_AUDIO bool prompt "Enable usb audio driver, it is commercial charge" default n - config RT_CHERRYUSB_HOST_BLUETOOTH + config CHERRYUSB_HOST_BLUETOOTH bool prompt "Enable usb bluetooth driver" default n - config RT_CHERRYUSB_HOST_ASIX + config CHERRYUSB_HOST_ASIX bool prompt "Enable usb asix driver" - select RT_USING_LWIP - select CONFIG_USBHOST_PLATFORM_ASIX + select USBHOST_PLATFORM_ASIX default n - config RT_CHERRYUSB_HOST_RTL8152 + config CHERRYUSB_HOST_RTL8152 bool prompt "Enable usb rtl8152 driver" - select RT_USING_LWIP - select CONFIG_USBHOST_PLATFORM_RTL8152 + select USBHOST_PLATFORM_RTL8152 default n - config RT_CHERRYUSB_HOST_FTDI + config CHERRYUSB_HOST_FTDI bool prompt "Enable usb ftdi driver" default n - config RT_CHERRYUSB_HOST_CH34X + config CHERRYUSB_HOST_CH34X bool prompt "Enable usb ch34x driver" default n - config RT_CHERRYUSB_HOST_CP210X + config CHERRYUSB_HOST_CP210X bool prompt "Enable usb cp210x driver" default n - config RT_CHERRYUSB_HOST_PL2303 + config CHERRYUSB_HOST_PL2303 bool prompt "Enable usb pl2303 driver" default n - config CONFIG_USBHOST_PLATFORM_CDC_ECM + config CHERRYUSB_HOST_AOA bool + prompt "Enable usb aoa driver" + default n - config CONFIG_USBHOST_PLATFORM_CDC_RNDIS + config USBHOST_PLATFORM_CDC_ECM bool - config CONFIG_USBHOST_PLATFORM_CDC_NCM + config USBHOST_PLATFORM_CDC_RNDIS bool - config CONFIG_USBHOST_PLATFORM_ASIX + config USBHOST_PLATFORM_CDC_NCM bool - config CONFIG_USBHOST_PLATFORM_RTL8152 + config USBHOST_PLATFORM_ASIX bool - config RT_LWIP_PBUF_POOL_BUFSIZE - int "The size of each pbuf in the pbuf pool" - range 1500 2000 - default 1600 + config USBHOST_PLATFORM_RTL8152 + bool - config RT_CHERRYUSB_HOST_TEMPLATE + config CHERRYUSB_HOST_TEMPLATE bool prompt "Use usb host template" default n - if RT_CHERRYUSB_HOST_TEMPLATE + if CHERRYUSB_HOST_TEMPLATE config TEST_USBH_CDC_ACM int prompt "demo for test cdc acm" @@ -333,6 +350,11 @@ if RT_USING_CHERRYUSB prompt "demo for test hid" default 0 depends on CHERRYUSB_HOST_HID + config TEST_USBH_MSC + int + prompt "demo for test msc" + default 0 + depends on CHERRYUSB_HOST_MSC endif endif diff --git a/components/drivers/usb/cherryusb/Kconfig.rtt b/components/drivers/usb/cherryusb/Kconfig.rtt new file mode 100644 index 00000000000..209332f5e6e --- /dev/null +++ b/components/drivers/usb/cherryusb/Kconfig.rtt @@ -0,0 +1,364 @@ +# Kconfig file for package CherryUSB +menuconfig RT_USING_CHERRYUSB + bool "Using USB with CherryUSB" + default n + +if RT_USING_CHERRYUSB + + menuconfig RT_CHERRYUSB_DEVICE + bool "Enable usb device mode" + default n + + if RT_CHERRYUSB_DEVICE + choice + prompt "Select usb device speed" + default RT_CHERRYUSB_DEVICE_SPEED_FS + config RT_CHERRYUSB_DEVICE_SPEED_FS + bool "FS" + config RT_CHERRYUSB_DEVICE_SPEED_HS + bool "HS" + config RT_CHERRYUSB_DEVICE_SPEED_AUTO + bool "AUTO" + endchoice + + choice + prompt "Select usb device ip, and some ip need config in usb_config.h, please check" + default RT_CHERRYUSB_DEVICE_CUSTOM + config RT_CHERRYUSB_DEVICE_CUSTOM + bool "CUSTOM (Implement it yourself)" + config RT_CHERRYUSB_DEVICE_FSDEV_ST + bool "fsdev_st" + config RT_CHERRYUSB_DEVICE_FSDEV_CUSTOM + bool "fsdev_custom" + config RT_CHERRYUSB_DEVICE_DWC2_ST + bool "dwc2_st" + config RT_CHERRYUSB_DEVICE_DWC2_ESP + bool "dwc2_esp" + config RT_CHERRYUSB_DEVICE_DWC2_KENDRYTE + bool "dwc2_kendryte" + config RT_CHERRYUSB_DEVICE_DWC2_AT + bool "dwc2_at" + config RT_CHERRYUSB_DEVICE_DWC2_HC + bool "dwc2_hc" + config RT_CHERRYUSB_DEVICE_DWC2_NATION + bool "dwc2_nation" + config RT_CHERRYUSB_DEVICE_DWC2_GD + bool "dwc2_gd" + config RT_CHERRYUSB_DEVICE_DWC2_CUSTOM + bool "dwc2_custom" + config RT_CHERRYUSB_DEVICE_MUSB_ES + bool "musb_es" + config RT_CHERRYUSB_DEVICE_MUSB_SUNXI + bool "musb_sunxi" + config RT_CHERRYUSB_DEVICE_MUSB_BK + bool "musb_bk" + config RT_CHERRYUSB_DEVICE_MUSB_CUSTOM + bool "musb_custom" + config RT_CHERRYUSB_DEVICE_CHIPIDEA_MCX + bool "chipidea_mcx" + config RT_CHERRYUSB_DEVICE_CHIPIDEA_CUSTOM + bool "chipidea_custom" + config RT_CHERRYUSB_DEVICE_KINETIS_MCX + bool "kinetis_mcx" + config RT_CHERRYUSB_DEVICE_KINETIS_MM32 + bool "kinetis_mm32" + config RT_CHERRYUSB_DEVICE_KINETIS_CUSTOM + bool "kinetis_custom" + config RT_CHERRYUSB_DEVICE_BL + bool "bouffalo" + config RT_CHERRYUSB_DEVICE_HPM + bool "hpm" + config RT_CHERRYUSB_DEVICE_AIC + bool "aic" + config RT_CHERRYUSB_DEVICE_RP2040 + bool "rp2040" + config RT_CHERRYUSB_DEVICE_CH32 + bool "ch32" + config RT_CHERRYUSB_DEVICE_PUSB2 + bool "pusb2" + config RT_CHERRYUSB_DEVICE_NRF5X + bool "nrf5x" + endchoice + + config RT_CHERRYUSB_DEVICE_CDC_ACM + bool + prompt "Enable usb cdc acm device" + default n + + config RT_CHERRYUSB_DEVICE_HID + bool + prompt "Enable usb hid device" + default n + + config RT_CHERRYUSB_DEVICE_MSC + bool + prompt "Enable usb msc device" + default n + + config RT_CHERRYUSB_DEVICE_AUDIO + bool + prompt "Enable usb audio device" + default n + + config RT_CHERRYUSB_DEVICE_VIDEO + bool + prompt "Enable usb video device" + default n + + config RT_CHERRYUSB_DEVICE_CDC_RNDIS + bool + prompt "Enable usb cdc rndis device" + default n + + config RT_CHERRYUSB_DEVICE_CDC_ECM + bool + prompt "Enable usb cdc ecm device" + default n + + config RT_CHERRYUSB_DEVICE_CDC_NCM + bool + prompt "Enable usb cdc ncm device" + default n + + config RT_CHERRYUSB_DEVICE_MTP + bool + prompt "Enable usb mtp device, it is commercial charge" + default n + + config RT_CHERRYUSB_DEVICE_DFU + bool + prompt "Enable usb dfu device" + default n + + choice + prompt "Select usb device template" + default RT_CHERRYUSB_DEVICE_TEMPLATE_NONE + config RT_CHERRYUSB_DEVICE_TEMPLATE_NONE + bool "none (Implement it yourself)" + config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM + bool "cdc_acm" + config RT_CHERRYUSB_DEVICE_TEMPLATE_MSC + bool "msc_ram" + config RT_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV + bool "msc_blkdev" + config RT_CHERRYUSB_DEVICE_TEMPLATE_HID_KEYBOARD + bool "hid_keyboard" + config RT_CHERRYUSB_DEVICE_TEMPLATE_HID_MOUSE + bool "hid_mouse" + config RT_CHERRYUSB_DEVICE_TEMPLATE_HID_CUSTOM + bool "hid_custom" + config RT_CHERRYUSB_DEVICE_TEMPLATE_VIDEO + bool "video" + config RT_CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V1_MIC_SPEAKER + bool "audio_v1_mic_speaker_multichan" + config RT_CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V2_MIC_SPEAKER + bool "audio_v2_mic_speaker_multichan" + config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_RNDIS + bool "cdc_rndis" + config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ECM + bool "cdc_ecm" + config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_NCM + bool "cdc_ncm" + config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC + bool "cdc_acm_msc" + config RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC_HID + bool "cdc_acm_msc_hid" + config RT_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV1 + bool "winusbv1" + config RT_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_CDC + bool "winusbv2_cdc" + config RT_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_HID + bool "winusbv2_hid" + endchoice + + config CONFIG_USBDEV_MSC_BLOCK_DEV_NAME + string "usb device msc block device name" + depends on RT_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV + default "sd0" + + endif + + menuconfig RT_CHERRYUSB_HOST + bool "Enable usb host mode" + default n + + if RT_CHERRYUSB_HOST + choice + prompt "Select usb host ip, and some ip need config in usb_config.h, please check" + default RT_CHERRYUSB_HOST_CUSTOM + config RT_CHERRYUSB_HOST_CUSTOM + bool "CUSTOM (Implement it yourself)" + config RT_CHERRYUSB_HOST_EHCI_BL + bool "ehci_bouffalo" + config RT_CHERRYUSB_HOST_EHCI_HPM + bool "ehci_hpm" + config RT_CHERRYUSB_HOST_EHCI_AIC + bool "ehci_aic" + config RT_CHERRYUSB_HOST_EHCI_MCX + bool "ehci_mcx" + config RT_CHERRYUSB_HOST_EHCI_NUC980 + bool "ehci_nuc980" + config RT_CHERRYUSB_HOST_EHCI_MA35D0 + bool "ehci_ma35d0" + config RT_CHERRYUSB_HOST_EHCI_CUSTOM + bool "ehci_custom" + config RT_CHERRYUSB_HOST_DWC2_ST + bool "dwc2_st" + config RT_CHERRYUSB_HOST_DWC2_ESP + bool "dwc2_esp" + config RT_CHERRYUSB_HOST_DWC2_KENDRYTE + bool "dwc2_kendryte" + config RT_CHERRYUSB_HOST_DWC2_HC + bool "dwc2_hc" + config RT_CHERRYUSB_HOST_DWC2_NATION + bool "dwc2_nation" + config RT_CHERRYUSB_HOST_DWC2_CUSTOM + bool "dwc2_custom" + config RT_CHERRYUSB_HOST_MUSB_ES + bool "musb_es" + config RT_CHERRYUSB_HOST_MUSB_SUNXI + bool "musb_sunxi" + config RT_CHERRYUSB_HOST_MUSB_BK + bool "musb_bk" + config RT_CHERRYUSB_HOST_MUSB_CUSTOM + bool "musb_custom" + config RT_CHERRYUSB_HOST_PUSB2 + bool "pusb2" + config RT_CHERRYUSB_HOST_XHCI + bool "xhci" + config RT_CHERRYUSB_HOST_RP2040 + bool "rp2040" + endchoice + + config RT_CHERRYUSB_HOST_CDC_ACM + bool + prompt "Enable usb cdc acm driver" + default n + + config RT_CHERRYUSB_HOST_HID + bool + prompt "Enable usb hid driver" + default n + + config RT_CHERRYUSB_HOST_MSC + bool + prompt "Enable usb msc driver" + default n + select RT_USING_DFS + select RT_USING_DFS_ELMFAT + + config RT_CHERRYUSB_HOST_CDC_ECM + bool + prompt "Enable usb cdc ecm driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_CDC_ECM + default n + + config RT_CHERRYUSB_HOST_CDC_RNDIS + bool + prompt "Enable usb rndis driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_CDC_RNDIS + default n + + config RT_CHERRYUSB_HOST_CDC_NCM + bool + prompt "Enable usb cdc ncm driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_CDC_NCM + default n + + config RT_CHERRYUSB_HOST_VIDEO + bool + prompt "Enable usb video driver, it is commercial charge" + default n + + config RT_CHERRYUSB_HOST_AUDIO + bool + prompt "Enable usb audio driver, it is commercial charge" + default n + + config RT_CHERRYUSB_HOST_BLUETOOTH + bool + prompt "Enable usb bluetooth driver" + default n + + config RT_CHERRYUSB_HOST_ASIX + bool + prompt "Enable usb asix driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_ASIX + default n + + config RT_CHERRYUSB_HOST_RTL8152 + bool + prompt "Enable usb rtl8152 driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_RTL8152 + default n + + config RT_CHERRYUSB_HOST_FTDI + bool + prompt "Enable usb ftdi driver" + default n + + config RT_CHERRYUSB_HOST_CH34X + bool + prompt "Enable usb ch34x driver" + default n + + config RT_CHERRYUSB_HOST_CP210X + bool + prompt "Enable usb cp210x driver" + default n + + config RT_CHERRYUSB_HOST_PL2303 + bool + prompt "Enable usb pl2303 driver" + default n + + config CONFIG_USBHOST_PLATFORM_CDC_ECM + bool + + config CONFIG_USBHOST_PLATFORM_CDC_RNDIS + bool + + config CONFIG_USBHOST_PLATFORM_CDC_NCM + bool + + config CONFIG_USBHOST_PLATFORM_ASIX + bool + + config CONFIG_USBHOST_PLATFORM_RTL8152 + bool + + config RT_LWIP_PBUF_POOL_BUFSIZE + int "The size of each pbuf in the pbuf pool" + range 1500 2000 + default 1600 + + config CONFIG_USB_DFS_MOUNT_POINT + string "usb host dfs mount point" + depends on RT_CHERRYUSB_HOST_MSC + default "/" + + config RT_CHERRYUSB_HOST_TEMPLATE + bool + prompt "Use usb host template" + default n + + if RT_CHERRYUSB_HOST_TEMPLATE + config TEST_USBH_CDC_ACM + int + prompt "demo for test cdc acm" + default 0 + depends on CHERRYUSB_HOST_CDC_ACM + config TEST_USBH_HID + int + prompt "demo for test hid" + default 0 + depends on CHERRYUSB_HOST_HID + endif + endif + +endif diff --git a/components/drivers/usb/cherryusb/Kconfig.rttpkg b/components/drivers/usb/cherryusb/Kconfig.rttpkg new file mode 100644 index 00000000000..73d5f3b2b44 --- /dev/null +++ b/components/drivers/usb/cherryusb/Kconfig.rttpkg @@ -0,0 +1,404 @@ +# Kconfig file for package CherryUSB +menuconfig PKG_USING_CHERRYUSB + depends on RT_VER_NUM < 0x50200 + bool "CherryUSB: tiny and portable USB host/device stack for embedded system with USB IP" + default n + +if PKG_USING_CHERRYUSB + + menuconfig PKG_CHERRYUSB_DEVICE + bool "Enable usb device mode" + default n + + if PKG_CHERRYUSB_DEVICE + choice + prompt "Select usb device speed" + default PKG_CHERRYUSB_DEVICE_SPEED_FS + config PKG_CHERRYUSB_DEVICE_SPEED_FS + bool "FS" + config PKG_CHERRYUSB_DEVICE_SPEED_HS + bool "HS" + config PKG_CHERRYUSB_DEVICE_SPEED_AUTO + bool "AUTO" + endchoice + + choice + prompt "Select usb device ip, and some ip need config in usb_config.h, please check" + default PKG_CHERRYUSB_DEVICE_CUSTOM + config PKG_CHERRYUSB_DEVICE_CUSTOM + bool "CUSTOM (Implement it yourself)" + config PKG_CHERRYUSB_DEVICE_FSDEV_ST + bool "fsdev_st" + config PKG_CHERRYUSB_DEVICE_FSDEV_CUSTOM + bool "fsdev_custom" + config PKG_CHERRYUSB_DEVICE_DWC2_ST + bool "dwc2_st" + config PKG_CHERRYUSB_DEVICE_DWC2_ESP + bool "dwc2_esp" + config PKG_CHERRYUSB_DEVICE_DWC2_KENDRYTE + bool "dwc2_kendryte" + config PKG_CHERRYUSB_DEVICE_DWC2_AT + bool "dwc2_at" + config PKG_CHERRYUSB_DEVICE_DWC2_HC + bool "dwc2_hc" + config PKG_CHERRYUSB_DEVICE_DWC2_NATION + bool "dwc2_nation" + config PKG_CHERRYUSB_DEVICE_DWC2_GD + bool "dwc2_gd" + config PKG_CHERRYUSB_DEVICE_DWC2_CUSTOM + bool "dwc2_custom" + config PKG_CHERRYUSB_DEVICE_MUSB_ES + bool "musb_es" + config PKG_CHERRYUSB_DEVICE_MUSB_SUNXI + bool "musb_sunxi" + config PKG_CHERRYUSB_DEVICE_MUSB_BK + bool "musb_bk" + config PKG_CHERRYUSB_DEVICE_MUSB_CUSTOM + bool "musb_custom" + config PKG_CHERRYUSB_DEVICE_CHIPIDEA_MCX + bool "chipidea_mcx" + config PKG_CHERRYUSB_DEVICE_CHIPIDEA_CUSTOM + bool "chipidea_custom" + config PKG_CHERRYUSB_DEVICE_KINETIS_MCX + bool "kinetis_mcx" + config PKG_CHERRYUSB_DEVICE_KINETIS_MM32 + bool "kinetis_mm32" + config PKG_CHERRYUSB_DEVICE_KINETIS_CUSTOM + bool "kinetis_custom" + config PKG_CHERRYUSB_DEVICE_BL + bool "bouffalo" + config PKG_CHERRYUSB_DEVICE_HPM + bool "hpm" + config PKG_CHERRYUSB_DEVICE_AIC + bool "aic" + config PKG_CHERRYUSB_DEVICE_RP2040 + bool "rp2040" + config PKG_CHERRYUSB_DEVICE_CH32 + bool "ch32" + config PKG_CHERRYUSB_DEVICE_PUSB2 + bool "pusb2" + endchoice + + config PKG_CHERRYUSB_DEVICE_CDC_ACM + bool + prompt "Enable usb cdc acm device" + default n + + config PKG_CHERRYUSB_DEVICE_HID + bool + prompt "Enable usb hid device" + default n + + config PKG_CHERRYUSB_DEVICE_MSC + bool + prompt "Enable usb msc device" + default n + + config PKG_CHERRYUSB_DEVICE_AUDIO + bool + prompt "Enable usb audio device" + default n + + config PKG_CHERRYUSB_DEVICE_VIDEO + bool + prompt "Enable usb video device" + default n + + config PKG_CHERRYUSB_DEVICE_CDC_RNDIS + bool + prompt "Enable usb cdc rndis device" + default n + + config PKG_CHERRYUSB_DEVICE_CDC_ECM + bool + prompt "Enable usb cdc ecm device" + default n + + config PKG_CHERRYUSB_DEVICE_CDC_NCM + bool + prompt "Enable usb cdc ncm device" + default n + + config PKG_CHERRYUSB_DEVICE_MTP + bool + prompt "Enable usb mtp device, it is commercial charge" + default n + + config PKG_CHERRYUSB_DEVICE_DFU + bool + prompt "Enable usb dfu device" + default n + + choice + prompt "Select usb device template" + default PKG_CHERRYUSB_DEVICE_TEMPLATE_NONE + config PKG_CHERRYUSB_DEVICE_TEMPLATE_NONE + bool "none (Implement it yourself)" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM + bool "cdc_acm" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_MSC + bool "msc_ram" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV + bool "msc_blkdev" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_HID_KEYBOARD + bool "hid_keyboard" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_HID_MOUSE + bool "hid_mouse" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_HID_CUSTOM + bool "hid_custom" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_VIDEO + bool "video" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V1_MIC_SPEAKER + bool "audio_v1_mic_speaker_multichan" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V2_MIC_SPEAKER + bool "audio_v2_mic_speaker_multichan" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_CDC_RNDIS + bool "cdc_rndis" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_CDC_ECM + bool "cdc_ecm" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_CDC_NCM + bool "cdc_ncm" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC + bool "cdc_acm_msc" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC_HID + bool "cdc_acm_msc_hid" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV1 + bool "winusbv1" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_CDC + bool "winusbv2_cdc" + config PKG_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_HID + bool "winusbv2_hid" + endchoice + + config CONFIG_USBDEV_MSC_BLOCK_DEV_NAME + string "usb device msc block device name" + depends on PKG_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV + default "sd0" + + endif + + menuconfig PKG_CHERRYUSB_HOST + bool "Enable usb host mode" + default n + + if PKG_CHERRYUSB_HOST + choice + prompt "Select usb host ip, and some ip need config in usb_config.h, please check" + default PKG_CHERRYUSB_HOST_CUSTOM + config PKG_CHERRYUSB_HOST_CUSTOM + bool "CUSTOM (Implement it yourself)" + config PKG_CHERRYUSB_HOST_EHCI_BL + bool "ehci_bouffalo" + config PKG_CHERRYUSB_HOST_EHCI_HPM + bool "ehci_hpm" + config PKG_CHERRYUSB_HOST_EHCI_AIC + bool "ehci_aic" + config PKG_CHERRYUSB_HOST_EHCI_MCX + bool "ehci_mcx" + config PKG_CHERRYUSB_HOST_EHCI_NUC980 + bool "ehci_nuc980" + config PKG_CHERRYUSB_HOST_EHCI_MA35D0 + bool "ehci_ma35d0" + config PKG_CHERRYUSB_HOST_EHCI_CUSTOM + bool "ehci_custom" + config PKG_CHERRYUSB_HOST_DWC2_ST + bool "dwc2_st" + config PKG_CHERRYUSB_HOST_DWC2_ESP + bool "dwc2_esp" + config PKG_CHERRYUSB_HOST_DWC2_KENDRYTE + bool "dwc2_kendryte" + config PKG_CHERRYUSB_HOST_DWC2_HC + bool "dwc2_hc" + config PKG_CHERRYUSB_HOST_DWC2_NATION + bool "dwc2_nation" + config PKG_CHERRYUSB_HOST_DWC2_CUSTOM + bool "dwc2_custom" + config PKG_CHERRYUSB_HOST_MUSB_ES + bool "musb_es" + config PKG_CHERRYUSB_HOST_MUSB_SUNXI + bool "musb_sunxi" + config PKG_CHERRYUSB_HOST_MUSB_BK + bool "musb_bk" + config PKG_CHERRYUSB_HOST_MUSB_CUSTOM + bool "musb_custom" + config PKG_CHERRYUSB_HOST_PUSB2 + bool "pusb2" + config PKG_CHERRYUSB_HOST_XHCI + bool "xhci" + config PKG_CHERRYUSB_HOST_RP2040 + bool "rp2040" + endchoice + + config PKG_CHERRYUSB_HOST_CDC_ACM + bool + prompt "Enable usb cdc acm driver" + default n + + config PKG_CHERRYUSB_HOST_HID + bool + prompt "Enable usb hid driver" + default n + + config PKG_CHERRYUSB_HOST_MSC + bool + prompt "Enable usb msc driver" + default n + select RT_USING_DFS + select RT_USING_DFS_ELMFAT + + config PKG_CHERRYUSB_HOST_CDC_ECM + bool + prompt "Enable usb cdc ecm driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_CDC_ECM + default n + + config PKG_CHERRYUSB_HOST_CDC_RNDIS + bool + prompt "Enable usb rndis driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_CDC_RNDIS + default n + + config PKG_CHERRYUSB_HOST_CDC_NCM + bool + prompt "Enable usb cdc ncm driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_CDC_NCM + default n + + config PKG_CHERRYUSB_HOST_VIDEO + bool + prompt "Enable usb video driver, it is commercial charge" + default n + + config PKG_CHERRYUSB_HOST_AUDIO + bool + prompt "Enable usb audio driver, it is commercial charge" + default n + + config PKG_CHERRYUSB_HOST_BLUETOOTH + bool + prompt "Enable usb bluetooth driver" + default n + + config PKG_CHERRYUSB_HOST_ASIX + bool + prompt "Enable usb asix driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_ASIX + default n + + config PKG_CHERRYUSB_HOST_RTL8152 + bool + prompt "Enable usb rtl8152 driver" + select RT_USING_LWIP + select CONFIG_USBHOST_PLATFORM_RTL8152 + default n + + config PKG_CHERRYUSB_HOST_FTDI + bool + prompt "Enable usb ftdi driver" + default n + + config PKG_CHERRYUSB_HOST_CH34X + bool + prompt "Enable usb ch34x driver" + default n + + config PKG_CHERRYUSB_HOST_CP210X + bool + prompt "Enable usb cp210x driver" + default n + + config PKG_CHERRYUSB_HOST_PL2303 + bool + prompt "Enable usb pl2303 driver" + default n + + config CONFIG_USBHOST_PLATFORM_CDC_ECM + bool + + config CONFIG_USBHOST_PLATFORM_CDC_RNDIS + bool + + config CONFIG_USBHOST_PLATFORM_CDC_NCM + bool + + config CONFIG_USBHOST_PLATFORM_ASIX + bool + + config CONFIG_USBHOST_PLATFORM_RTL8152 + bool + + config RT_LWIP_PBUF_POOL_BUFSIZE + int "The size of each pbuf in the pbuf pool" + range 1500 2000 + default 1600 + + config CONFIG_USB_DFS_MOUNT_POINT + string "usb host dfs mount point" + depends on RT_CHERRYUSB_HOST_MSC + default "/" + + config PKG_CHERRYUSB_HOST_TEMPLATE + bool + prompt "Use usb host template" + default n + + if PKG_CHERRYUSB_HOST_TEMPLATE + config TEST_USBH_CDC_ACM + int + prompt "demo for test cdc acm" + default 0 + depends on PKG_CHERRYUSB_HOST_CDC_ACM + config TEST_USBH_HID + int + prompt "demo for test hid" + default 0 + depends on PKG_CHERRYUSB_HOST_HID + endif + endif + + config PKG_CHERRYUSB_PATH + string + default "/packages/system/CherryUSB" + + choice + prompt "Version" + default PKG_USING_CHERRYUSB_V010500 + help + Select the package version + + config PKG_USING_CHERRYUSB_LATEST_VERSION + bool "latest" + config PKG_USING_CHERRYUSB_V010500 + bool "v1.5.0" + config PKG_USING_CHERRYUSB_V010403 + bool "v1.4.3" + config PKG_USING_CHERRYUSB_V010402 + bool "v1.4.2" + config PKG_USING_CHERRYUSB_V010400 + bool "v1.4.0" + config PKG_USING_CHERRYUSB_V010301 + bool "v1.3.1" + config PKG_USING_CHERRYUSB_V010300 + bool "v1.3.0" + config PKG_USING_CHERRYUSB_V010200 + bool "v1.2.0" + config PKG_USING_CHERRYUSB_V001002 + bool "v0.10.2" + endchoice + + config PKG_CHERRYUSB_VER + string + default "latest" if PKG_USING_CHERRYUSB_LATEST_VERSION + default "v1.5.0" if PKG_USING_CHERRYUSB_V010500 + default "v1.4.3" if PKG_USING_CHERRYUSB_V010403 + default "v1.4.2" if PKG_USING_CHERRYUSB_V010402 + default "v1.4.0" if PKG_USING_CHERRYUSB_V010400 + default "v1.3.1" if PKG_USING_CHERRYUSB_V010301 + default "v1.3.0" if PKG_USING_CHERRYUSB_V010300 + default "v1.2.0" if PKG_USING_CHERRYUSB_V010200 + default "v0.10.2" if PKG_USING_CHERRYUSB_V001002 +endif diff --git a/components/drivers/usb/cherryusb/README.md b/components/drivers/usb/cherryusb/README.md index 25e7f0b6248..fcb6f13c96f 100644 --- a/components/drivers/usb/cherryusb/README.md +++ b/components/drivers/usb/cherryusb/README.md @@ -1,22 +1,18 @@ +**English | [简体中文](README_zh.md)** +

CherryUSB

- +

-

- 中文 - | - English -

- CherryUSB is a tiny and beautiful, high performance and portable USB host and device stack for embedded system with USB IP. ![CherryUSB](CherryUSB.svg) -## Why choose +## Why choose CherryUSB ### Easy to study USB @@ -62,42 +58,45 @@ Taking into account USB performance issues and trying to achieve the theoretical CherryUSB Device Stack provides a unified framework of functions for standard device requests, CLASS requests, VENDOR requests and custom special requests. The object-oriented and chained approach allows the user to quickly get started with composite devices without having to worry about the underlying logic. At the same time, a standard dcd porting interface has been standardised for adapting different USB IPs to achieve ip-oriented programming. -CherryUSB Device Stack has the following functions： +CherryUSB Device Stack has the following functions: -- Support USB2.0 full and high speed, USB3.0 super speed +- Support USB2.0 full and high speed(USB3.0 super speed TODO) - Support endpoint irq callback register by users, let users do whatever they wants in endpoint irq callback. - Support Composite Device - Support Communication Device Class (CDC_ACM, CDC_ECM) - Support Human Interface Device (HID) - Support Mass Storage Class (MSC) -- Support USB VIDEO CLASS (UVC1.0、UVC1.5) -- Support USB AUDIO CLASS (UAC1.0、UAC2.0) +- Support USB VIDEO CLASS (UVC1.0, UVC1.5) +- Support USB AUDIO CLASS (UAC1.0, UAC2.0) - Support Device Firmware Upgrade CLASS (DFU) - Support USB MIDI CLASS (MIDI) - Support Remote NDIS (RNDIS) -- Support WINUSB1.0、WINUSB2.0、WEBUSB、BOS +- Support Media Transfer Protocol (MTP) +- Support WINUSB1.0, WINUSB2.0, WEBUSB, BOS - Support Vendor class - Support UF2 - Support Android Debug Bridge (Only support shell) - Support multi device with the same USB IP -CherryUSB Device Stack resource usage (GCC 10.2 with -O2): +CherryUSB Device Stack resource usage (GCC 10.2 with -O2, disable log): | file | FLASH (Byte) | No Cache RAM (Byte) | RAM (Byte) | Heap (Byte) | |:-------------:|:--------------:|:-------------------------:|:-------------:|:----------------:| -|usbd_core.c | ~4400 | 512(default) + 320 | 0 | 0 | -|usbd_cdc_acm.c | ~400 | 0 | 0 | 0 | -|usbd_msc.c | ~3800 | 128 + 512(default) | 16 | 0 | -|usbd_hid.c | ~360 | 0 | 0 | 0 | -|usbd_audio.c | ~1500 | 0 | 0 | 0 | -|usbd_video.c | ~2600 | 0 | 84 | 0 | -|usbd_rndis.c | ~2100 | 2 * 1580(default)+156+8 | 76 | 0 | +|usbd_core.c | ~4500 | (512(default) + 320) * bus | 0 | 0 | +|usbd_cdc_acm.c | ~900 | 0 | 0 | 0 | +|usbd_msc.c | ~5000 | (128 + 512(default)) * bus | 16 * bus | 0 | +|usbd_hid.c | ~300 | 0 | 0 | 0 | +|usbd_audio.c | ~4000 | 0 | 0 | 0 | +|usbd_video.c | ~7000 | 0 | 132 * bus | 0 | +|usbd_rndis.c | ~2500 | 2 * 1580(default)+156+8 | 80 | 0 | +|usbd_cdc_ecm.c | ~900 | 2 * 1514(default)+16 | 42 | 0 | +|usbd_mtp.c | ~9000 | 2048(default)+128 | sizeof(struct mtp_object) * n| 0 | ## Host Stack Overview -The CherryUSB Host Stack has a standard enumeration implementation for devices mounted on roothubs and external hubs, and a standard interface for different Classes to indicate what the Class driver needs to do after enumeration and after disconnection. A standard hcd porting interface has also been standardised for adapting different USB IPs for IP-oriented programming. Finally, the host stack is managed using os, and provides osal to make a adaptation for different os. +The CherryUSB Host Stack has a standard enumeration implementation for devices mounted on root hubs and external hubs, and a standard interface for different Classes to indicate what the Class driver needs to do after enumeration and after disconnection. A standard hcd porting interface has also been standardised for adapting different USB IPs for IP-oriented programming. Finally, the host stack is managed using os, and provides osal to make a adaptation for different os. -CherryUSB Host Stack has the following functions： +CherryUSB Host Stack has the following functions: - Support low speed, full speed, high speed and super speed devices - Automatic loading of supported Class drivers @@ -107,7 +106,7 @@ CherryUSB Host Stack has the following functions： - Support Communication Device Class (CDC_ACM, CDC_ECM) - Support Human Interface Device (HID) - Support Mass Storage Class (MSC) -- Support USB Video CLASS (UVC1.0、UVC1.5) +- Support USB Video CLASS (UVC1.0, UVC1.5) - Support USB Audio CLASS (UAC1.0) - Support Remote NDIS (RNDIS) - Support USB Bluetooth class (support nimble and zephyr bluetooth stack, support **CLASS:0xE0** or vendor class like cdc acm) @@ -118,23 +117,25 @@ CherryUSB Host Stack has the following functions： The CherryUSB Host stack also provides the lsusb function, which allows you to view information about all mounted devices, including those on external hubs, with the help of a shell plugin. -CherryUSB Host Stack resource usage (GCC 10.2 with -O2): +CherryUSB Host Stack resource usage (GCC 10.2 with -O2, disable log): | file | FLASH (Byte) | No Cache RAM (Byte) | RAM (Byte) | Heap (Byte) | |:-------------:|:--------------:|:-------------------------------:|:---------------------------:|:------------:| -|usbh_core.c | ~9000 | 512 + 8 * (1+x) *n | 28 | raw_config_desc | -|usbh_hub.c | ~6000 | 32 + 4 * (1+x) | 12 + sizeof(struct usbh_hub) * (1+x) | 0 | -|usbh_cdc_acm.c | ~900 | 7 | 4 + sizeof(struct usbh_cdc_acm) * x | 0 | -|usbh_msc.c | ~2700 | 64 | 4 + sizeof(struct usbh_msc) * x | 0 | -|usbh_hid.c | ~1400 | 256 | 4 + sizeof(struct usbh_hid) * x | 0 | -|usbh_video.c | ~3800 | 128 | 4 + sizeof(struct usbh_video) * x | 0 | -|usbh_audio.c | ~4100 | 128 | 4 + sizeof(struct usbh_audio) * x | 0 | -|usbh_rndis.c | ~4200 | 512 + 2 * 2048(default)| sizeof(struct usbh_rndis) * 1 | 0 | -|usbh_cdc_ecm.c | ~2200 | 2 * 1514 + 16 | sizeof(struct usbh_cdc_ecm) * 1 | 0 | -|usbh_cdc_ncm.c | ~3300 | 2 * 2048(default) + 16 + 32 | sizeof(struct usbh_cdc_ncm) * 1 | 0 | -|usbh_bluetooth.c | ~1000 | 2 * 2048(default) | sizeof(struct usbh_bluetooth) * 1 | 0 | - -Among them, `sizeof(struct usbh_hub)` and `sizeof(struct usbh_hubport)` are affected by the following macros： +|usbh_core.c | ~4500 | (512(default) + 8 * (1+x) *n) * bus | sizeof(struct usbh_hub) * bus | raw_config_desc | +|usbh_hub.c | ~3500 | (32 + 4 * (1+x)) * bus | 12 + sizeof(struct usbh_hub) * x | 0 | +|usbh_cdc_acm.c | ~600 | 7 * x | 4 + sizeof(struct usbh_cdc_acm) * x | 0 | +|usbh_msc.c | ~2000 | 128 * x | 4 + sizeof(struct usbh_msc) * x | 0 | +|usbh_hid.c | ~800 | 64 * x | 4 + sizeof(struct usbh_hid) * x | 0 | +|usbh_video.c | ~5000 | 128 * x | 4 + sizeof(struct usbh_video) * x | 0 | +|usbh_audio.c | ~4000 | 128 * x | 4 + sizeof(struct usbh_audio) * x | 0 | +|usbh_rndis.c | ~3000 | 512 + 2 * 2048(default)| sizeof(struct usbh_rndis) * 1 | 0 | +|usbh_cdc_ecm.c | ~1500 | 2 * 1514 + 16 | sizeof(struct usbh_cdc_ecm) * 1 | 0 | +|usbh_cdc_ncm.c | ~2000 | 2 * 2048(default) + 16 + 32 | sizeof(struct usbh_cdc_ncm) * 1| 0 | +|usbh_bluetooth.c | ~1000 | 2 * 2048(default) | sizeof(struct usbh_bluetooth) * 1 | 0 | +|usbh_asix.c | ~7000 | 2 * 2048(default) + 16 + 32 | sizeof(struct usbh_asix) * 1 | 0 | +|usbh_rtl8152.c | ~9000 | 16K+ 2K(default) + 2 + 32 | sizeof(struct usbh_rtl8152) * 1 | 0 | + +Among them, `sizeof(struct usbh_hub)` and `sizeof(struct usbh_hubport)` are affected by the following macros: ``` #define CONFIG_USBHOST_MAX_EXTHUBS 1 @@ -144,7 +145,7 @@ Among them, `sizeof(struct usbh_hub)` and `sizeof(struct usbh_hubport)` are affe #define CONFIG_USBHOST_MAX_ENDPOINTS 4 ``` -x is affected by the following macros： +x is affected by the following macros: ``` #define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4 @@ -174,23 +175,22 @@ Only standard and commercial USB IP are listed. ## Documentation Tutorial -Quickly start, USB basic concepts, API manual, Class basic concepts and examples, see [CherryUSB Documentation Tutorial](https://cherryusb.readthedocs.io/) +Quickly start, USB basic concepts, API manual, Class basic concepts and examples, see [CherryUSB Documentation Tutorial](https://cherryusb.readthedocs.io/). ## Video Tutorial -USB basic concepts and how the CherryUSB Device stack is implemented, see [CherryUSB Device Stack Tutorial](https://www.bilibili.com/video/BV1Ef4y1t73d). +CherryUSB Cheese (based V1.4.3): https://www.bilibili.com/cheese/play/ss707687201 . -## Graphical Config Tool +## Descriptor Generator Tool -[chryusb_configurator](https://github.com/Egahp/chryusb_configurator) is written in **electron + vite2 + ts** framework，currently used to automate the generation of descriptor arrays, with additional functionality to be added later. +TODO ## Demo Repo | Manufacturer | CHIP or Series | USB IP| Repo Url | Support version | Support status | |:--------------------:|:------------------:|:-----:|:--------:|:------------------:|:-------------:| |Bouffalolab | BL702/BL616/BL808 | bouffalolab/ehci|[bouffalo_sdk](https://github.com/CherryUSB/bouffalo_sdk)|<= latest | Long-term | -|ST | STM32F1x | fsdev |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | -|ST | STM32F4/STM32H7 | dwc2 |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | +|ST | STM32F1x/STM32F4/STM32H7 | fsdev/dwc2 |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | |HPMicro | HPM6000/HPM5000 | hpm/ehci |[hpm_sdk](https://github.com/CherryUSB/hpm_sdk)|<= latest | Long-term | |Essemi | ES32F36xx | musb |[es32f369_repo](https://github.com/CherryUSB/cherryusb_es32)|<= latest | Long-term | |Phytium | e2000 | pusb2/xhci |[phytium_repo](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk)|>=1.4.0 | Long-term | @@ -198,11 +198,13 @@ USB basic concepts and how the CherryUSB Device stack is implemented, see [Cherr |Espressif | esp32s2/esp32s3/esp32p4 | dwc2 |[esp32_repo](https://github.com/CherryUSB/cherryusb_esp32)|<= latest | Long-term | |NXP | mcx | kinetis/chipidea/ehci |[nxp_mcx_repo](https://github.com/CherryUSB/cherryusb_mcx)|<= latest | Long-term | |Kendryte | k230 | dwc2 |[k230_repo](https://github.com/CherryUSB/k230_sdk)|v1.2.0 | Long-term | +|Actionstech | ATS30xx | dwc2 |[action_zephyr_repo](https://github.com/CherryUSB/lv_port_actions_technology/tree/master/action_technology_sdk)|>=1.4.0 | Long-term | +|Nationstech | n32h4x | dwc2 |[nation_repo](https://github.com/CherryUSB/cherryusb_nation)|>=1.5.0 | Long-term | |Raspberry pi | rp2040/rp2350 | rp2040 |[pico-examples](https://github.com/CherryUSB/pico-examples)|<= latest | Long-term | |AllwinnerTech | F1C100S/F1C200S | musb |[cherryusb_rtt_f1c100s](https://github.com/CherryUSB/cherryusb_rtt_f1c100s)|<= latest | the same with musb | |Bekencorp | bk7256/bk7258 | musb |[bk_idk](https://github.com/CherryUSB/bk_idk)| v0.7.0 | the same with musb | |Sophgo | cv18xx | dwc2 |[cvi_alios_open](https://github.com/CherryUSB/cvi_alios_open)| v0.7.0 | TBD | -|WCH | CH32V307/ch58x | ch32_usbfs/ch32_usbhs/ch58x |[wch_repo](https://github.com/CherryUSB/cherryusb_wch)|<= v0.10.2 | TBD | +|WCH | CH32V307/ch58x | ch32_usbfs/ch32_usbhs/ch58x |[wch_repo](https://github.com/CherryUSB/cherryusb_wch)|<= v0.10.2/>=v1.5.0 | TBD | ## Package Support @@ -222,6 +224,7 @@ CherryUSB discord: https://discord.com/invite/wFfvrSAey8. ## Company Support -Thanks to the following companies for their support (in no particular order). +Thanks to the following companies for their support (in no particular order): + diff --git a/components/drivers/usb/cherryusb/README_zh.md b/components/drivers/usb/cherryusb/README_zh.md index 8a5bb45dd2b..c0ff9133c75 100644 --- a/components/drivers/usb/cherryusb/README_zh.md +++ b/components/drivers/usb/cherryusb/README_zh.md @@ -1,22 +1,18 @@ +**[English](README.md) | 简体中文** +

CherryUSB

- +

-

- 中文 - | - English -

- -CherryUSB 是一个小而美的、可移植性高的、用于嵌入式系统(带 USB IP)的高性能 USB 主从协议栈。 +CherryUSB 是一个小而美的、可移植性高的、用于嵌入式系统（带 USB IP）的高性能 USB 主从协议栈。 ![CherryUSB](CherryUSB.svg) -## 为什么选择 +## 为什么选择 CherryUSB ### 易于学习 USB @@ -64,7 +60,7 @@ CherryUSB Device 协议栈对标准设备请求、CLASS 请求、VENDOR 请求 CherryUSB Device 协议栈当前实现以下功能： -- 支持 USB2.0 全速和高速设备，USB3.0 超速设备 +- 支持 USB2.0 全速和高速设备（USB3.0 超高速 TODO） - 支持端点中断注册功能，porting 给用户自己处理中断里的数据 - 支持复合设备 - 支持 Communication Device Class (CDC_ACM, CDC_ECM) @@ -75,6 +71,7 @@ CherryUSB Device 协议栈当前实现以下功能： - 支持 Device Firmware Upgrade CLASS (DFU) - 支持 USB MIDI CLASS (MIDI) - 支持 Remote NDIS (RNDIS) +- 支持 Media Transfer Protocol (MTP) - 支持 WINUSB1.0、WINUSB2.0、WEBUSB、BOS - 支持 Vendor 类 class - 支持 UF2 @@ -85,25 +82,27 @@ CherryUSB Device 协议栈资源占用说明（GCC 10.2 with -O2）： | file | FLASH (Byte) | No Cache RAM (Byte) | RAM (Byte) | Heap (Byte) | |:-------------:|:--------------:|:-------------------------:|:-------------:|:----------------:| -|usbd_core.c | ~4400 | 512(default) + 320 | 0 | 0 | -|usbd_cdc_acm.c | ~400 | 0 | 0 | 0 | -|usbd_msc.c | ~3800 | 128 + 512(default) | 16 | 0 | -|usbd_hid.c | ~360 | 0 | 0 | 0 | -|usbd_audio.c | ~1500 | 0 | 0 | 0 | -|usbd_video.c | ~2600 | 0 | 84 | 0 | -|usbd_rndis.c | ~2100 | 2 * 1580(default)+156+8 | 76 | 0 | +|usbd_core.c | ~4500 | (512(default) + 320) * bus | 0 | 0 | +|usbd_cdc_acm.c | ~900 | 0 | 0 | 0 | +|usbd_msc.c | ~5000 | (128 + 512(default)) * bus | 16 * bus | 0 | +|usbd_hid.c | ~300 | 0 | 0 | 0 | +|usbd_audio.c | ~4000 | 0 | 0 | 0 | +|usbd_video.c | ~7000 | 0 | 132 * bus | 0 | +|usbd_rndis.c | ~2500 | 2 * 1580(default)+156+8 | 80 | 0 | +|usbd_cdc_ecm.c | ~900 | 2 * 1514(default)+16 | 42 | 0 | +|usbd_mtp.c | ~9000 | 2048(default)+128 | sizeof(struct mtp_object) * n| 0 | ## Host 协议栈简介 -CherryUSB Host 协议栈对挂载在 roothub、外部 hub 上的设备规范了一套标准的枚举实现，对不同的 Class 类也规范了一套标准接口，用来指示在枚举后和断开连接后该 Class 驱动需要做的事情。同时，规范了一套标准的 hcd porting 接口，用于适配不同的 USB IP，达到面向 IP 编程。最后，协议栈使用 OS 管理，并提供了 osal 用来适配不同的 os。 +CherryUSB Host 协议栈对挂载在 root hub、外部 hub 上的设备规范了一套标准的枚举实现，对不同的 Class 类也规范了一套标准接口，用来指示在枚举后和断开连接后该 Class 驱动需要做的事情。同时，规范了一套标准的 hcd porting 接口，用于适配不同的 USB IP，达到面向 IP 编程。最后，协议栈使用 OS 管理，并提供了 osal 用来适配不同的 os。 CherryUSB Host 协议栈当前实现以下功能： -- 支持 low speed, full speed, high speed 和 super speed 设备 +- 支持 low speed，full speed，high speed 和 super speed 设备 - 自动加载支持的Class 驱动 - 支持阻塞式传输和异步传输 - 支持复合设备 -- 支持多级 HUB,最高可拓展到 7 级(目前测试 1拖 10 没有问题，仅支持 dwc2/ehci/xhci/rp2040) +- 支持多级 HUB，最高可拓展到 7 级(目前测试 1拖 10 没有问题，仅支持 dwc2/ehci/xhci/rp2040) - 支持 Communication Device Class (CDC_ACM, CDC_ECM) - 支持 Human Interface Device (HID) - 支持 Mass Storage Class (MSC) @@ -118,21 +117,23 @@ CherryUSB Host 协议栈当前实现以下功能： 同时，CherryUSB Host 协议栈还提供了 lsusb 的功能，借助 shell 插件可以查看所有挂载设备的信息，包括外部 hub 上的设备的信息。 -CherryUSB Host 协议栈资源占用说明（GCC 10.2 with -O2）： +CherryUSB Host 协议栈资源占用说明（GCC 10.2 with -O2，关闭 log）： | file | FLASH (Byte) | No Cache RAM (Byte) | RAM (Byte) | Heap (Byte) | |:-------------:|:--------------:|:-------------------------------:|:---------------------------:|:------------:| -|usbh_core.c | ~9000 | 512 + 8 * (1+x) *n | 28 | raw_config_desc | -|usbh_hub.c | ~6000 | 32 + 4 * (1+x) | 12 + sizeof(struct usbh_hub) * (1+x) | 0 | -|usbh_cdc_acm.c | ~900 | 7 | 4 + sizeof(struct usbh_cdc_acm) * x | 0 | -|usbh_msc.c | ~2700 | 64 | 4 + sizeof(struct usbh_msc) * x | 0 | -|usbh_hid.c | ~1400 | 256 | 4 + sizeof(struct usbh_hid) * x | 0 | -|usbh_video.c | ~3800 | 128 | 4 + sizeof(struct usbh_video) * x | 0 | -|usbh_audio.c | ~4100 | 128 | 4 + sizeof(struct usbh_audio) * x | 0 | -|usbh_rndis.c | ~4200 | 512 + 2 * 2048(default)| sizeof(struct usbh_rndis) * 1 | 0 | -|usbh_cdc_ecm.c | ~2200 | 2 * 1514 + 16 | sizeof(struct usbh_cdc_ecm) * 1 | 0 | -|usbh_cdc_ncm.c | ~3300 | 2 * 2048(default) + 16 + 32 | sizeof(struct usbh_cdc_ncm) * 1 | 0 | -|usbh_bluetooth.c | ~1000 | 2 * 2048(default) | sizeof(struct usbh_bluetooth) * 1 | 0 | +|usbh_core.c | ~4500 | (512(default) + 8 * (1+x) *n) * bus | sizeof(struct usbh_hub) * bus | raw_config_desc | +|usbh_hub.c | ~3500 | (32 + 4 * (1+x)) * bus | 12 + sizeof(struct usbh_hub) * x | 0 | +|usbh_cdc_acm.c | ~600 | 7 * x | 4 + sizeof(struct usbh_cdc_acm) * x | 0 | +|usbh_msc.c | ~2000 | 128 * x | 4 + sizeof(struct usbh_msc) * x | 0 | +|usbh_hid.c | ~800 | 64 * x | 4 + sizeof(struct usbh_hid) * x | 0 | +|usbh_video.c | ~5000 | 128 * x | 4 + sizeof(struct usbh_video) * x | 0 | +|usbh_audio.c | ~4000 | 128 * x | 4 + sizeof(struct usbh_audio) * x | 0 | +|usbh_rndis.c | ~3000 | 512 + 2 * 2048(default)| sizeof(struct usbh_rndis) * 1 | 0 | +|usbh_cdc_ecm.c | ~1500 | 2 * 1514 + 16 | sizeof(struct usbh_cdc_ecm) * 1 | 0 | +|usbh_cdc_ncm.c | ~2000 | 2 * 2048(default) + 16 + 32 | sizeof(struct usbh_cdc_ncm) * 1| 0 | +|usbh_bluetooth.c | ~1000 | 2 * 2048(default) | sizeof(struct usbh_bluetooth) * 1 | 0 | +|usbh_asix.c | ~7000 | 2 * 2048(default) + 16 + 32 | sizeof(struct usbh_asix) * 1 | 0 | +|usbh_rtl8152.c | ~9000 | 16K+ 2K(default) + 2 + 32 | sizeof(struct usbh_rtl8152) * 1 | 0 | 其中，`sizeof(struct usbh_hub)` 和 `sizeof(struct usbh_hubport)` 受以下宏影响： @@ -174,24 +175,22 @@ x 受以下宏影响： ## 文档教程 -CherryUSB 快速入门、USB 基本概念，API 手册，Class 基本概念和例程，参考 [CherryUSB Documentation Tutorial](https://cherryusb.readthedocs.io/) +CherryUSB 快速入门、USB 基本概念、API 手册、Class 基本概念和例程，参考 [CherryUSB Documentation Tutorial](https://cherryusb.readthedocs.io/)。 ## 视频教程 -- USB 基本知识点与 CherryUSB Device 协议栈是如何编写的（使用v0.4.1 版本），参考 https://www.bilibili.com/video/BV1Ef4y1t73d. -- CherryUSB 腾讯会议（使用v1.1.0 版本），参考 https://www.bilibili.com/video/BV16x421y7mM. +CherryUSB 课程（基于 V1.4.3）：https://www.bilibili.com/cheese/play/ss707687201 。 -## 图形化界面配置工具 +## 描述符生成工具 -[chryusb_configurator](https://github.com/Egahp/chryusb_configurator) 采用 **electron + vite2 + ts** 框架编写，当前用于自动化生成描述符数组，后续会增加其他功能。 +TODO ## 示例仓库 | Manufacturer | CHIP or Series | USB IP| Repo Url | Support version | Support status | |:--------------------:|:------------------:|:-----:|:--------:|:------------------:|:-------------:| |Bouffalolab | BL702/BL616/BL808 | bouffalolab/ehci|[bouffalo_sdk](https://github.com/CherryUSB/bouffalo_sdk)|<= latest | Long-term | -|ST | STM32F1x | fsdev |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | -|ST | STM32F4/STM32H7 | dwc2 |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | +|ST | STM32F1x/STM32F4/STM32H7 | fsdev/dwc2 |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | |HPMicro | HPM6000/HPM5000 | hpm/ehci |[hpm_sdk](https://github.com/CherryUSB/hpm_sdk)|<= latest | Long-term | |Essemi | ES32F36xx | musb |[es32f369_repo](https://github.com/CherryUSB/cherryusb_es32)|<= latest | Long-term | |Phytium | e2000 | pusb2/xhci |[phytium_repo](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk)|>=1.4.0 | Long-term | @@ -199,15 +198,17 @@ CherryUSB 快速入门、USB 基本概念，API 手册，Class 基本概念和 |Espressif | esp32s2/esp32s3/esp32p4 | dwc2 |[esp32_repo](https://github.com/CherryUSB/cherryusb_esp32)|<= latest | Long-term | |NXP | mcx | kinetis/chipidea/ehci |[nxp_mcx_repo](https://github.com/CherryUSB/cherryusb_mcx)|<= latest | Long-term | |Kendryte | k230 | dwc2 |[k230_repo](https://github.com/CherryUSB/k230_sdk)|v1.2.0 | Long-term | +|Actionstech | ATS30xx | dwc2 |[action_zephyr_repo](https://github.com/CherryUSB/lv_port_actions_technology/tree/master/action_technology_sdk)|>=1.4.0 | Long-term | +|Nationstech | n32h4x | dwc2 |[nation_repo](https://github.com/CherryUSB/cherryusb_nation)|>=1.5.0 | Long-term | |Raspberry pi | rp2040/rp2350 | rp2040 |[pico-examples](https://github.com/CherryUSB/pico-examples)|<= latest | Long-term | |AllwinnerTech | F1C100S/F1C200S | musb |[cherryusb_rtt_f1c100s](https://github.com/CherryUSB/cherryusb_rtt_f1c100s)|<= latest | the same with musb | |Bekencorp | bk7256/bk7258 | musb |[bk_idk](https://github.com/CherryUSB/bk_idk)| v0.7.0 | the same with musb | |Sophgo | cv18xx | dwc2 |[cvi_alios_open](https://github.com/CherryUSB/cvi_alios_open)| v0.7.0 | TBD | -|WCH | CH32V307/ch58x | ch32_usbfs/ch32_usbhs/ch58x |[wch_repo](https://github.com/CherryUSB/cherryusb_wch)|<= v0.10.2 | TBD | +|WCH | CH32V307/ch58x | ch32_usbfs/ch32_usbhs/ch58x |[wch_repo](https://github.com/CherryUSB/cherryusb_wch)|<= v0.10.2/>=v1.5.0 | TBD | ## 软件包支持 -CherryUSB 软件包可以通过以下方式获取: +CherryUSB 软件包可以通过以下方式获取： - [RT-Thread](https://packages.rt-thread.org/detail.html?package=CherryUSB) - [YOC](https://www.xrvm.cn/document?temp=usb-host-protocol-stack-device-driver-adaptation-instructions&slug=yocbook) @@ -219,11 +220,13 @@ CherryUSB 软件包可以通过以下方式获取: ## 联系 -CherryUSB QQ 群:642693751 +CherryUSB QQ群：642693751 + CherryUSB 微信群：与我联系后邀请加入 ## 支持企业 -感谢以下企业支持（顺序不分先后）。 +感谢以下企业支持（顺序不分先后）： + diff --git a/components/drivers/usb/cherryusb/SConscript b/components/drivers/usb/cherryusb/SConscript index 1263af6e79b..acbddefb4f5 100644 --- a/components/drivers/usb/cherryusb/SConscript +++ b/components/drivers/usb/cherryusb/SConscript @@ -33,9 +33,10 @@ if GetDepend(['RT_CHERRYUSB_DEVICE']): if GetDepend(['RT_CHERRYUSB_DEVICE_SPEED_HS']): CPPDEFINES+=['CONFIG_USB_HS'] - if GetDepend(['RT_CHERRYUSB_DEVICE_NRF5X']): - src += Glob('port/nrf5x/usb_dc_nrf5x.c') - if GetDepend(['RT_CHERRYUSB_DEVICE_FSDEV']): + if GetDepend(['RT_CHERRYUSB_DEVICE_FSDEV_ST']): + src += Glob('port/fsdev/usb_dc_fsdev.c') + src += Glob('port/fsdev/usb_glue_st.c') + if GetDepend(['RT_CHERRYUSB_DEVICE_FSDEV_CUSTOM']): src += Glob('port/fsdev/usb_dc_fsdev.c') if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_ST']): src += Glob('port/dwc2/usb_dc_dwc2.c') @@ -43,18 +44,21 @@ if GetDepend(['RT_CHERRYUSB_DEVICE']): if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_ESP']): src += Glob('port/dwc2/usb_dc_dwc2.c') src += Glob('port/dwc2/usb_glue_esp.c') + if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_KENDRYTE']): + src += Glob('port/dwc2/usb_dc_dwc2.c') + src += Glob('port/dwc2/usb_glue_kendryte.c') if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_AT']): src += Glob('port/dwc2/usb_dc_dwc2.c') src += Glob('port/dwc2/usb_glue_at.c') - if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_GD']): - src += Glob('port/dwc2/usb_dc_dwc2.c') - src += Glob('port/dwc2/usb_glue_gd.c') if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_HC']): src += Glob('port/dwc2/usb_dc_dwc2.c') src += Glob('port/dwc2/usb_glue_hc.c') - if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_KENDRYTE']): + if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_NATION']): src += Glob('port/dwc2/usb_dc_dwc2.c') - src += Glob('port/dwc2/usb_glue_kendryte.c') + src += Glob('port/dwc2/usb_glue_nation.c') + if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_GD']): + src += Glob('port/dwc2/usb_dc_dwc2.c') + src += Glob('port/dwc2/usb_glue_gd.c') if GetDepend(['RT_CHERRYUSB_DEVICE_DWC2_CUSTOM']): src += Glob('port/dwc2/usb_dc_dwc2.c') if GetDepend(['RT_CHERRYUSB_DEVICE_MUSB_ES']): @@ -68,23 +72,28 @@ if GetDepend(['RT_CHERRYUSB_DEVICE']): src += Glob('port/musb/usb_glue_bk.c') if GetDepend(['RT_CHERRYUSB_DEVICE_MUSB_CUSTOM']): src += Glob('port/musb/usb_dc_musb.c') + if GetDepend(['RT_CHERRYUSB_DEVICE_CHIPIDEA_MCX']): + path += [cwd + '/port/chipidea'] + src += Glob('port/chipidea/usb_dc_chipidea.c') + src += Glob('port/nxp/usb_glue_mcx.c') + if GetDepend(['RT_CHERRYUSB_DEVICE_CHIPIDEA_CUSTOM']): + path += [cwd + '/port/chipidea'] + src += Glob('port/chipidea/usb_dc_chipidea.c') if GetDepend(['RT_CHERRYUSB_DEVICE_KINETIS_MCX']): src += Glob('port/kinetis/usb_dc_kinetis.c') src += Glob('port/kinetis/usb_glue_mcx.c') if GetDepend(['RT_CHERRYUSB_DEVICE_KINETIS_CUSTOM']): src += Glob('port/kinetis/usb_dc_kinetis.c') - if GetDepend(['RT_CHERRYUSB_DEVICE_CHIPIDEA_MCX']): - src += Glob('port/chipidea/usb_dc_chipidea.c') - src += Glob('port/chipidea/usb_glue_mcx.c') if GetDepend(['RT_CHERRYUSB_DEVICE_BL']): src += Glob('port/bouffalolab/usb_dc_bl.c') if GetDepend(['RT_CHERRYUSB_DEVICE_HPM']): - src += Glob('port/hpm/usb_dc_hpm.c') + src += Glob('port/hpmicro/usb_dc_hpm.c') + src += Glob('port/hpmicro/usb_glue_hpm.c') if GetDepend(['RT_CHERRYUSB_DEVICE_AIC']): src += Glob('port/aic/usb_dc_aic.c') src += Glob('port/aic/usb_dc_aic_ll.c') if GetDepend(['RT_CHERRYUSB_DEVICE_CH32']): - if GetDepend(['RT_CHERRYUSB_DEVICE_SPEED_HS']): + if GetDepend(['RT_CHERRYUSB_DEVICE_HS']): src += Glob('port/ch32/usb_dc_usbhs.c') else: src += Glob('port/ch32/usb_dc_usbfs.c') @@ -97,6 +106,8 @@ if GetDepend(['RT_CHERRYUSB_DEVICE']): if GetDepend(['ARCH_ARM_CORTEX_A']): LIBPATH = [cwd + '/port/pusb2'] LIBS = ['libpusb2_dc_a32_softfp_neon.a'] + if GetDepend(['RT_CHERRYUSB_DEVICE_NRF5X']): + src += Glob('port/nrf5x/usb_dc_nrf5x.c') if GetDepend(['RT_CHERRYUSB_DEVICE_CDC_ACM']): src += Glob('class/cdc/usbd_cdc_acm.c') @@ -163,7 +174,8 @@ if GetDepend(['RT_CHERRYUSB_HOST']): src += Glob('port/ehci/usb_glue_bouffalo.c') if GetDepend(['RT_CHERRYUSB_HOST_EHCI_HPM']): src += Glob('port/ehci/usb_hc_ehci.c') - src += Glob('port/ehci/usb_glue_hpm.c') + src += Glob('port/hpmicro/usb_hc_hpm.c') + src += Glob('port/hpmicro/usb_glue_hpm.c') if GetDepend(['RT_CHERRYUSB_HOST_EHCI_AIC']): path += [cwd + '/port/ehci'] path += [cwd + '/port/ohci'] @@ -173,7 +185,7 @@ if GetDepend(['RT_CHERRYUSB_HOST']): if GetDepend(['RT_CHERRYUSB_HOST_EHCI_MCX']): path += [cwd + '/port/chipidea'] src += Glob('port/ehci/usb_hc_ehci.c') - src += Glob('port/ehci/usb_glue_mcx.c') + src += Glob('port/nxp/usb_glue_mcx.c') if GetDepend(['RT_CHERRYUSB_HOST_EHCI_NUC980']): src += Glob('port/ehci/usb_hc_ehci.c') src += Glob('port/ehci/usb_glue_nuc980.c') @@ -191,6 +203,12 @@ if GetDepend(['RT_CHERRYUSB_HOST']): if GetDepend(['RT_CHERRYUSB_HOST_DWC2_KENDRYTE']): src += Glob('port/dwc2/usb_hc_dwc2.c') src += Glob('port/dwc2/usb_glue_kendryte.c') + if GetDepend(['RT_CHERRYUSB_HOST_DWC2_HC']): + src += Glob('port/dwc2/usb_hc_dwc2.c') + src += Glob('port/dwc2/usb_glue_hc.c') + if GetDepend(['RT_CHERRYUSB_HOST_DWC2_NATION']): + src += Glob('port/dwc2/usb_hc_dwc2.c') + src += Glob('port/dwc2/usb_glue_nation.c') if GetDepend(['RT_CHERRYUSB_HOST_DWC2_CUSTOM']): src += Glob('port/dwc2/usb_hc_dwc2.c') if GetDepend(['RT_CHERRYUSB_HOST_MUSB_STANDARD']): @@ -264,6 +282,7 @@ if GetDepend(['RT_CHERRYUSB_HOST']): src += Glob('class/vendor/serial/usbh_pl2303.c') if GetDepend(['RT_CHERRYUSB_HOST_TEMPLATE']): + CPPDEFINES+=['TEST_USBH_MSC=0'] src += Glob('demo/usb_host.c') if GetDepend('RT_USING_DFS') and GetDepend(['RT_CHERRYUSB_HOST_MSC']): @@ -274,7 +293,7 @@ if GetDepend(['RT_CHERRYUSB_HOST']): or GetDepend('RT_CHERRYUSB_HOST_CDC_NCM') \ or GetDepend('RT_CHERRYUSB_HOST_ASIX') \ or GetDepend('RT_CHERRYUSB_HOST_RTL8152'): - src += Glob('platform/rtthread/usbh_lwip.c') + src += Glob('platform/rtthread/usbh_lwip.c') src += Glob('platform/rtthread/usb_msh.c') src += Glob('platform/rtthread/usb_check.c') diff --git a/components/drivers/usb/cherryusb/VERSION b/components/drivers/usb/cherryusb/VERSION index ce12c2dbf92..e110767a670 100644 --- a/components/drivers/usb/cherryusb/VERSION +++ b/components/drivers/usb/cherryusb/VERSION @@ -1,5 +1,5 @@ VERSION_MAJOR = 1 -VERSION_MINOR = 4 -PATCHLEVEL = 3 +VERSION_MINOR = 5 +PATCHLEVEL = 0 VERSION_TWEAK = 0 EXTRAVERSION = 0 diff --git a/components/drivers/usb/cherryusb/cherryusb.cmake b/components/drivers/usb/cherryusb/cherryusb.cmake index 0fe2292239c..1175d881dcd 100644 --- a/components/drivers/usb/cherryusb/cherryusb.cmake +++ b/components/drivers/usb/cherryusb/cherryusb.cmake @@ -4,11 +4,15 @@ # SPDX-License-Identifier: Apache-2.0 # +# cmake-format: off + # set(CONFIG_CHERRYUSB_DEVICE 1) # set(CONFIG_CHERRYUSB_DEVICE_CDC 1) # set(CONFIG_CHERRYUSB_DEVICE_HID 1) # set(CONFIG_CHERRYUSB_DEVICE_MSC 1) -# set(CONFIG_CHERRYUSB_DEVICE_DCD "dwc2_st") +# set(CONFIG_CHERRYUSB_DEVICE_AUDIO 1) +# set(CONFIG_CHERRYUSB_DEVICE_VIDEO 1) +# set(CONFIG_CHERRYUSB_DEVICE_DWC2_ST 1) # set(CONFIG_CHERRYUSB_HOST 1) # set(CONFIG_CHERRYUSB_HOST_CDC_ACM 1) @@ -22,291 +26,340 @@ # set(CONFIG_CHERRYUSB_HOST_BLUETOOTH 1) # set(CONFIG_CHERRYUSB_HOST_ASIX 1) # set(CONFIG_CHERRYUSB_HOST_RTL8152 1) +# set(CONFIG_CHERRYUSB_HOST_DWC2_ST 1) + # set(CONFIG_CHERRYUSB_OSAL "freertos") -# set(CONFIG_CHERRYUSB_HOST_HCD "ehci_xxx") +# cmake-format: on -list(APPEND cherryusb_incs -${CMAKE_CURRENT_LIST_DIR} -${CMAKE_CURRENT_LIST_DIR}/common -${CMAKE_CURRENT_LIST_DIR}/core -${CMAKE_CURRENT_LIST_DIR}/class/hub -${CMAKE_CURRENT_LIST_DIR}/class/cdc -${CMAKE_CURRENT_LIST_DIR}/class/hid -${CMAKE_CURRENT_LIST_DIR}/class/msc -${CMAKE_CURRENT_LIST_DIR}/class/audio -${CMAKE_CURRENT_LIST_DIR}/class/video -${CMAKE_CURRENT_LIST_DIR}/class/wireless -${CMAKE_CURRENT_LIST_DIR}/class/midi -${CMAKE_CURRENT_LIST_DIR}/class/adb -${CMAKE_CURRENT_LIST_DIR}/class/dfu -${CMAKE_CURRENT_LIST_DIR}/class/vendor/net -${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial -${CMAKE_CURRENT_LIST_DIR}/class/vendor/wifi -${CMAKE_CURRENT_LIST_DIR}/class/aoa +list( + APPEND + cherryusb_incs + ${CMAKE_CURRENT_LIST_DIR} + ${CMAKE_CURRENT_LIST_DIR}/common + ${CMAKE_CURRENT_LIST_DIR}/core + ${CMAKE_CURRENT_LIST_DIR}/class/hub + ${CMAKE_CURRENT_LIST_DIR}/class/cdc + ${CMAKE_CURRENT_LIST_DIR}/class/hid + ${CMAKE_CURRENT_LIST_DIR}/class/msc + ${CMAKE_CURRENT_LIST_DIR}/class/audio + ${CMAKE_CURRENT_LIST_DIR}/class/video + ${CMAKE_CURRENT_LIST_DIR}/class/wireless + ${CMAKE_CURRENT_LIST_DIR}/class/midi + ${CMAKE_CURRENT_LIST_DIR}/class/adb + ${CMAKE_CURRENT_LIST_DIR}/class/dfu + ${CMAKE_CURRENT_LIST_DIR}/class/vendor/net + ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial + ${CMAKE_CURRENT_LIST_DIR}/class/vendor/wifi + ${CMAKE_CURRENT_LIST_DIR}/class/aoa ) if(CONFIG_CHERRYUSB_DEVICE) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/core/usbd_core.c) if(CONFIG_CHERRYUSB_DEVICE_CDC_ACM) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbd_cdc_acm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbd_cdc_acm.c) endif() if(CONFIG_CHERRYUSB_DEVICE_HID) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/hid/usbd_hid.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/hid/usbd_hid.c) endif() if(CONFIG_CHERRYUSB_DEVICE_MSC) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/msc/usbd_msc.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/msc/usbd_msc.c) endif() if(CONFIG_CHERRYUSB_DEVICE_AUDIO) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/audio/usbd_audio.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/audio/usbd_audio.c) endif() if(CONFIG_CHERRYUSB_DEVICE_VIDEO) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/video/usbd_video.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/video/usbd_video.c) endif() if(CONFIG_CHERRYUSB_DEVICE_CDC_ECM) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbd_cdc_ecm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbd_cdc_ecm.c) endif() if(CONFIG_CHERRYUSB_DEVICE_CDC_NCM) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbd_cdc_ncm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbd_cdc_ncm.c) endif() if(CONFIG_CHERRYUSB_DEVICE_CDC_RNDIS) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/wireless/usbd_rndis.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/wireless/usbd_rndis.c) endif() if(CONFIG_CHERRYUSB_DEVICE_DFU) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/dfu/usbd_dfu.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/dfu/usbd_dfu.c) endif() if(CONFIG_CHERRYUSB_DEVICE_ADB) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/adb/usbd_adb.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/adb/usbd_adb.c) endif() - if(DEFINED CONFIG_CHERRYUSB_DEVICE_DCD) - if("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "fsdev") + if(CONFIG_CHERRYUSB_DEVICE_FSDEV_ST) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/fsdev/usb_dc_fsdev.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "dwc2_st") + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/fsdev/usb_glue_st.c) + elseif(CONFIG_CHERRYUSB_DEVICE_FSDEV_CUSTOM) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/fsdev/usb_dc_fsdev.c) + elseif(CONFIG_CHERRYUSB_DEVICE_DWC2_ST) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_dc_dwc2.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_st.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "dwc2_esp") + elseif(CONFIG_CHERRYUSB_DEVICE_DWC2_ESP) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_dc_dwc2.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_esp.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "dwc2_at") + elseif(CONFIG_CHERRYUSB_DEVICE_DWC2_KENDRYTE) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_dc_dwc2.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_kendryte.c) + elseif(CONFIG_CHERRYUSB_DEVICE_DWC2_AT) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_dc_dwc2.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_at.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "dwc2_gd") + elseif(CONFIG_CHERRYUSB_DEVICE_DWC2_HC) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_dc_dwc2.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_hc.c) + elseif(CONFIG_CHERRYUSB_DEVICE_DWC2_GD) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_dc_dwc2.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_gd.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "dwc2_hc") + elseif(CONFIG_CHERRYUSB_DEVICE_DWC2_CUSTOM) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_dc_dwc2.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_hc.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "musb_es") + elseif(CONFIG_CHERRYUSB_DEVICE_MUSB_ES) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_dc_musb.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_es.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "musb_sunxi") + elseif(CONFIG_CHERRYUSB_DEVICE_MUSB_SUNXI) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_dc_musb.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_sunxi.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "musb_bk") + elseif(CONFIG_CHERRYUSB_DEVICE_MUSB_BK) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_dc_musb.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_bk.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "chipidea_mcx") + elseif(CONFIG_CHERRYUSB_DEVICE_MUSB_CUSTOM) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_dc_musb.c) + elseif(CONFIG_CHERRYUSB_DEVICE_CHIPIDEA_MCX) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/chipidea/usb_dc_chipidea.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/chipidea/usb_glue_mcx.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "kinetis_mcx") + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/nxp/usb_glue_mcx.c) + elseif(CONFIG_CHERRYUSB_DEVICE_KINETIS_MCX) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/kinetis/usb_dc_kinetis.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/kinetis/usb_glue_mcx.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "hpm") - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/hpm/usb_dc_hpm.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "bl") + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/chipidea) + elseif(CONFIG_CHERRYUSB_DEVICE_CHIPIDEA_CUSTOM) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/chipidea/usb_dc_chipidea.c) + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/chipidea) + elseif(CONFIG_CHERRYUSB_DEVICE_HPM) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/hpmicro/usb_dc_hpm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/hpmicro/usb_glue_hpm.c) + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/hpmicro) + elseif(CONFIG_CHERRYUSB_DEVICE_BL) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/bouffalolab/usb_dc_bl.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "aic") + elseif(CONFIG_CHERRYUSB_DEVICE_AIC) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/aic/usb_dc_aic.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/aic/usb_dc_aic_ll.c) - elseif("${CONFIG_CHERRYUSB_DEVICE_DCD}" STREQUAL "rp2040") + elseif(CONFIG_CHERRYUSB_DEVICE_RP2040) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/rp2040/usb_dc_rp2040.c) - endif() endif() endif() if(CONFIG_CHERRYUSB_HOST) - list(APPEND cherryusb_srcs - ${CMAKE_CURRENT_LIST_DIR}/core/usbh_core.c - ${CMAKE_CURRENT_LIST_DIR}/class/hub/usbh_hub.c + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/core/usbh_core.c + ${CMAKE_CURRENT_LIST_DIR}/class/hub/usbh_hub.c ) if(CONFIG_CHERRYUSB_HOST_CDC_ACM) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbh_cdc_acm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbh_cdc_acm.c) endif() if(CONFIG_CHERRYUSB_HOST_CDC_ECM) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbh_cdc_ecm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbh_cdc_ecm.c) endif() if(CONFIG_CHERRYUSB_HOST_CDC_RNDIS) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/wireless/usbh_rndis.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/wireless/usbh_rndis.c) endif() if(CONFIG_CHERRYUSB_HOST_CDC_NCM) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbh_cdc_ncm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/cdc/usbh_cdc_ncm.c) endif() if(CONFIG_CHERRYUSB_HOST_HID) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/hid/usbh_hid.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/hid/usbh_hid.c) endif() if(CONFIG_CHERRYUSB_HOST_MSC) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/msc/usbh_msc.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/msc/usbh_msc.c) - if(CONFIG_CHERRYUSB_HOST_MSC_FATFS) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/port/fatfs_usbh.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/diskio.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/ff.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/ffsystem.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/ffunicode.c) + if(CONFIG_CHERRYUSB_HOST_MSC_FATFS) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/port/fatfs_usbh.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/diskio.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/ff.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/ffsystem.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source/ffunicode.c) - list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source) - endif() + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/third_party/fatfs-0.14/source) + endif() endif() if(CONFIG_CHERRYUSB_HOST_VIDEO) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/video/usbh_video.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/video/usbh_video.c) endif() if(CONFIG_CHERRYUSB_HOST_AUDIO) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/audio/usbh_audio.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/audio/usbh_audio.c) endif() if(CONFIG_CHERRYUSB_HOST_BLUETOOTH) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/wireless/usbh_bluetooth.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/wireless/usbh_bluetooth.c) - set(BLUETOOTH_PATH ${CMAKE_CURRENT_LIST_DIR}/third_party/zephyr_bluetooth-2.7.5) + set(BLUETOOTH_PATH ${CMAKE_CURRENT_LIST_DIR}/third_party/zephyr_bluetooth-2.7.5) - list(APPEND cherryusb_srcs - ${BLUETOOTH_PATH}/ble_hci_usbh.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/beacon/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_hr/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_ht/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_multilink/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_multilink/src/central_multilink.c - # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/handsfree/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/ibeacon/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral/src/cts.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_csc/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_dis/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_esp/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_hids/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_hids/src/hog.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_hr/src/main.c - # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_ht/src/main.c - # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_ht/src/hts.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_identity/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_identity/src/peripheral_identity.c - # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_ots/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_sc_only/src/main.c - ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/scan_adv/src/main.c - ) + list( + APPEND + cherryusb_srcs + ${BLUETOOTH_PATH}/ble_hci_usbh.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/beacon/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_hr/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_ht/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_multilink/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/central_multilink/src/central_multilink.c + # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/handsfree/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/ibeacon/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral/src/cts.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_csc/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_dis/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_esp/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_hids/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_hids/src/hog.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_hr/src/main.c + # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_ht/src/main.c + # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_ht/src/hts.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_identity/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_identity/src/peripheral_identity.c + # ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_ots/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/peripheral_sc_only/src/main.c + ${BLUETOOTH_PATH}/zephyr_bluetooth/examples/scan_adv/src/main.c + ) - include(${BLUETOOTH_PATH}/zephyr_bluetooth/zephyr_bluetooth.cmake) - list(APPEND cherryusb_srcs ${zephyr_bluetooth_srcs}) - list(APPEND cherryusb_incs ${zephyr_bluetooth_incs}) + include(${BLUETOOTH_PATH}/zephyr_bluetooth/zephyr_bluetooth.cmake) + list(APPEND cherryusb_srcs ${zephyr_bluetooth_srcs}) + list(APPEND cherryusb_incs ${zephyr_bluetooth_incs}) endif() if(CONFIG_CHERRYUSB_HOST_ASIX) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/net/usbh_asix.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/net/usbh_asix.c) endif() if(CONFIG_CHERRYUSB_HOST_RTL8152) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/net/usbh_rtl8152.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/net/usbh_rtl8152.c) endif() if(CONFIG_CHERRYUSB_HOST_CH34X) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_ch34x.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_ch34x.c) endif() if(CONFIG_CHERRYUSB_HOST_CP210X) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_cp210x.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_cp210x.c) endif() if(CONFIG_CHERRYUSB_HOST_FTDI) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_ftdi.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_ftdi.c) endif() if(CONFIG_CHERRYUSB_HOST_PL2303) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_pl2303.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/serial/usbh_pl2303.c) endif() if(CONFIG_CHERRYUSB_HOST_BL616) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/wifi/usbh_bl616.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/vendor/wifi/usbh_bl616.c) endif() if(CONFIG_CHERRYUSB_HOST_AOA) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/aoa/usbh_aoa.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/class/aoa/usbh_aoa.c) endif() - if(DEFINED CONFIG_CHERRYUSB_HOST_HCD) - if("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "ehci_bouffalo") + if(CONFIG_CHERRYUSB_HOST_CDC_ECM + OR CONFIG_CHERRYUSB_HOST_CDC_RNDIS + OR CONFIG_CHERRYUSB_HOST_CDC_NCM + OR CONFIG_CHERRYUSB_HOST_ASIX + OR CONFIG_CHERRYUSB_HOST_RTL8152 + OR CONFIG_CHERRYUSB_HOST_BL616 + ) + if("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "idf") + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/platform/idf/usbh_net.c) + else() + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/platform/lwip/usbh_lwip.c) + endif() + endif() + + if(CONFIG_CHERRYUSB_HOST_EHCI_BL) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci.c) - #list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) + # list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_glue_bouffalo.c) list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/ehci) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "ehci_hpm") + elseif(CONFIG_CHERRYUSB_HOST_EHCI_HPM) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci.c) - #list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_glue_hpm.c) + # list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/hpmicro/usb_hc_hpm.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/hpmicro/usb_glue_hpm.c) + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/hpmicro) list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/ehci) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "ehci_aic") + elseif(CONFIG_CHERRYUSB_HOST_EHCI_AIC) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci.c) - #list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ohci/usb_hc_ohci.c) + # list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_glue_aic.c) list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/ehci) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "ehci_mcx") + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/ohci) + elseif(CONFIG_CHERRYUSB_HOST_EHCI_MCX) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci.c) - #list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_glue_mcx.c) + # list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/nxp/usb_glue_mcx.c) list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/ehci) list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/chipidea) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "ehci_nuvoton") + elseif(CONFIG_CHERRYUSB_HOST_EHCI_CUSTOM) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci.c) - #list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_glue_nuvoton.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "dwc2_st") + # list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/ehci/usb_hc_ehci_iso.c) + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/port/ehci) + elseif(CONFIG_CHERRYUSB_HOST_DWC2_ST) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_hc_dwc2.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_st.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "dwc2_esp") + elseif(CONFIG_CHERRYUSB_HOST_DWC2_ESP) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_hc_dwc2.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_esp.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "dwc2_hc") + elseif(CONFIG_CHERRYUSB_HOST_DWC2_KENDRYTE) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_hc_dwc2.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_kendryte.c) + elseif(CONFIG_CHERRYUSB_HOST_DWC2_HC) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_hc_dwc2.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_glue_hc.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "musb_es") + elseif(CONFIG_CHERRYUSB_HOST_DWC2_CUSTOM) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/dwc2/usb_hc_dwc2.c) + elseif(CONFIG_CHERRYUSB_HOST_MUSB_ES) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_hc_musb.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_es.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "musb_sunxi") + elseif(CONFIG_CHERRYUSB_HOST_MUSB_SUNXI) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_hc_musb.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_sunxi.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "musb_bk") + elseif(CONFIG_CHERRYUSB_HOST_MUSB_BK) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_hc_musb.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_bk.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "kinetis_mcx") + elseif(CONFIG_CHERRYUSB_HOST_MUSB_CUSTOM) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_hc_musb.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_bk.c) + elseif(CONFIG_CHERRYUSB_HOST_KINETIS_MCX) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/kinetis/usb_hc_kinetis.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/kinetis/usb_glue_mcx.c) + elseif(CONFIG_CHERRYUSB_HOST_KINETIS_CUSTOM) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/kinetis/usb_hc_kinetis.c) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/kinetis/usb_glue_mcx.c) - elseif("${CONFIG_CHERRYUSB_HOST_HCD}" STREQUAL "rp2040") + elseif(CONFIG_CHERRYUSB_HOST_RP2040) list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/rp2040/usb_hc_rp2040.c) - endif() endif() + if(CHERRYUSB_HOST_TEMPLATE) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/demo/usb_host.c) + endif() endif() if(DEFINED CONFIG_CHERRYUSB_OSAL) if("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "freertos") - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_freertos.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_freertos.c) elseif("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "rtthread") - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_rtthread.c) - elseif("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "yoc") - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_yoc.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_rtthread.c) elseif("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "idf") - list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/osal/idf) - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/idf/usb_osal_idf.c) + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/osal/idf) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/idf/usb_osal_idf.c) elseif("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "threadx") - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_threadx.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_threadx.c) + elseif("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "zephyr") + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/osal/usb_osal_zephyr.c) endif() endif() if(CONFIG_CHERRYRB) -list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherryrb/chry_ringbuffer.c) -list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherryrb) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherryrb/chry_ringbuffer.c) + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherryrb) endif() if(CONFIG_CHERRYMP) -list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp/chry_mempool.c) -list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp/chry_mempool.c) + list(APPEND cherryusb_incs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp) if("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "freertos") - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp/chry_mempool_osal_freertos.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp/chry_mempool_osal_freertos.c) elseif("${CONFIG_CHERRYUSB_OSAL}" STREQUAL "rtthread") - list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp/chry_mempool_osal_rtthread.c) + list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/third_party/cherrymp/chry_mempool_osal_rtthread.c) endif() -endif() \ No newline at end of file +endif() diff --git a/components/drivers/usb/cherryusb/cherryusb_config_template.h b/components/drivers/usb/cherryusb/cherryusb_config_template.h index 41cc246eb1e..8485b894820 100644 --- a/components/drivers/usb/cherryusb/cherryusb_config_template.h +++ b/components/drivers/usb/cherryusb/cherryusb_config_template.h @@ -8,7 +8,13 @@ /* ================ USB common Configuration ================ */ +#ifdef __RTTHREAD__ +#include + +#define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__) +#else #define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) +#endif #ifndef CONFIG_USB_DBG_LEVEL #define CONFIG_USB_DBG_LEVEL USB_DBG_INFO @@ -17,16 +23,23 @@ /* Enable print with color */ #define CONFIG_USB_PRINTF_COLOR_ENABLE +// #define CONFIG_USB_DCACHE_ENABLE + /* data align size when use dma or use dcache */ -#ifndef CONFIG_USB_ALIGN_SIZE +#ifdef CONFIG_USB_DCACHE_ENABLE +#define CONFIG_USB_ALIGN_SIZE 32 // 32 or 64 +#else #define CONFIG_USB_ALIGN_SIZE 4 #endif -//#define CONFIG_USB_DCACHE_ENABLE - /* attribute data into no cache ram */ #define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) +/* use usb_memcpy default for high performance but cost more flash memory. + * And, arm libc has a bug that memcpy() may cause data misalignment when the size is not a multiple of 4. +*/ +// #define CONFIG_USB_MEMCPY_DISABLE + /* ================= USB Device Stack Configuration ================ */ /* Ep0 in and out transfer buffer */ @@ -49,7 +62,7 @@ // #define CONFIG_USBDEV_TEST_MODE /* enable advance desc register api */ -// CONFIG_USBDEV_ADVANCE_DESC +#define CONFIG_USBDEV_ADVANCE_DESC /* move ep0 setup handler from isr to thread */ // #define CONFIG_USBDEV_EP0_THREAD @@ -96,6 +109,28 @@ #define CONFIG_USBDEV_MSC_STACKSIZE 2048 #endif +#ifndef CONFIG_USBDEV_MTP_MAX_BUFSIZE +#define CONFIG_USBDEV_MTP_MAX_BUFSIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_OBJECTS +#define CONFIG_USBDEV_MTP_MAX_OBJECTS 256 +#endif + +#ifndef CONFIG_USBDEV_MTP_MAX_PATHNAME +#define CONFIG_USBDEV_MTP_MAX_PATHNAME 256 +#endif + +#define CONFIG_USBDEV_MTP_THREAD + +#ifndef CONFIG_USBDEV_MTP_PRIO +#define CONFIG_USBDEV_MTP_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_MTP_STACKSIZE +#define CONFIG_USBDEV_MTP_STACKSIZE 4096 +#endif + #ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE #define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 #endif @@ -114,6 +149,7 @@ #endif #define CONFIG_USBDEV_RNDIS_USING_LWIP +#define CONFIG_USBDEV_CDC_ECM_USING_LWIP /* ================ USB HOST Stack Configuration ================== */ @@ -224,6 +260,8 @@ #define CONFIG_USBDEV_EP_NUM 8 #endif +// #define CONFIG_USBDEV_SOF_ENABLE + /* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */ // #define CONFIG_USB_HS @@ -265,15 +303,19 @@ #define CONFIG_USB_EHCI_HCCR_OFFSET (0x0) #define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024 #define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM -#define CONFIG_USB_EHCI_QTD_NUM 3 -#define CONFIG_USB_EHCI_ITD_NUM 20 +#define CONFIG_USB_EHCI_QTD_NUM (CONFIG_USB_EHCI_QH_NUM * 3) +#define CONFIG_USB_EHCI_ITD_NUM 4 // #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE // #define CONFIG_USB_EHCI_CONFIGFLAG // #define CONFIG_USB_EHCI_ISO // #define CONFIG_USB_EHCI_WITH_OHCI +// #define CONFIG_USB_EHCI_DESC_DCACHE_ENABLE /* ---------------- OHCI Configuration ---------------- */ #define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) +#define CONFIG_USB_OHCI_ED_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_OHCI_TD_NUM 3 +// #define CONFIG_USB_OHCI_DESC_DCACHE_ENABLE /* ---------------- XHCI Configuration ---------------- */ #define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) @@ -292,20 +334,6 @@ /* ---------------- MUSB Configuration ---------------- */ // #define CONFIG_USB_MUSB_SUNXI -/* ================ USB Dcache Configuration ==================*/ - -#ifdef CONFIG_USB_DCACHE_ENABLE -/* style 1*/ -// void usb_dcache_clean(uintptr_t addr, uint32_t size); -// void usb_dcache_invalidate(uintptr_t addr, uint32_t size); -// void usb_dcache_flush(uintptr_t addr, uint32_t size); - -/* style 2*/ -// #define usb_dcache_clean(addr, size) -// #define usb_dcache_invalidate(addr, size) -// #define usb_dcache_flush(addr, size) -#endif - #ifndef usb_phyaddr2ramaddr #define usb_phyaddr2ramaddr(addr) (addr) #endif diff --git a/components/drivers/usb/cherryusb/class/adb/usbd_adb.c b/components/drivers/usb/cherryusb/class/adb/usbd_adb.c index 7629ea389b4..417439a87cc 100644 --- a/components/drivers/usb/cherryusb/class/adb/usbd_adb.c +++ b/components/drivers/usb/cherryusb/class/adb/usbd_adb.c @@ -39,8 +39,8 @@ struct adb_msg { }; struct adb_packet { - struct adb_msg msg; - uint8_t payload[MAX_PAYLOAD]; + USB_MEM_ALIGNX struct adb_msg msg; + USB_MEM_ALIGNX uint8_t payload[USB_ALIGN_UP(MAX_PAYLOAD, CONFIG_USB_ALIGN_SIZE)]; }; struct usbd_adb { @@ -115,7 +115,7 @@ void usbd_adb_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) if (adb_client.common_state == ADB_STATE_READ_MSG) { if (nbytes != sizeof(struct adb_msg)) { - USB_LOG_ERR("invalid adb msg size:%d\r\n", nbytes); + USB_LOG_ERR("invalid adb msg size:%d\r\n", (unsigned int)nbytes); return; } diff --git a/components/drivers/usb/cherryusb/class/aoa/usbh_aoa.c b/components/drivers/usb/cherryusb/class/aoa/usbh_aoa.c index 20cef52cf31..ddae9571482 100644 --- a/components/drivers/usb/cherryusb/class/aoa/usbh_aoa.c +++ b/components/drivers/usb/cherryusb/class/aoa/usbh_aoa.c @@ -12,7 +12,7 @@ #define DEV_FORMAT "/dev/aoa" -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_aoa_buffer[128]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_aoa_buffer[USB_ALIGN_UP(128, CONFIG_USB_ALIGN_SIZE)]; static struct usbh_aoa g_aoa_class; diff --git a/components/drivers/usb/cherryusb/class/audio/usbd_audio.c b/components/drivers/usb/cherryusb/class/audio/usbd_audio.c index 458f1c191f7..2f8130e36b4 100644 --- a/components/drivers/usb/cherryusb/class/audio/usbd_audio.c +++ b/components/drivers/usb/cherryusb/class/audio/usbd_audio.c @@ -375,3 +375,15 @@ __WEAK void usbd_audio_get_sampling_freq_table(uint8_t busid, uint8_t ep, uint8_ (void)ep; (void)sampling_freq_table; } + +__WEAK void usbd_audio_open(uint8_t busid, uint8_t intf) +{ + (void)busid; + (void)intf; +} + +__WEAK void usbd_audio_close(uint8_t busid, uint8_t intf) +{ + (void)busid; + (void)intf; +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/class/audio/usbh_audio.c b/components/drivers/usb/cherryusb/class/audio/usbh_audio.c index 6d8b4559e10..4aed30fe876 100644 --- a/components/drivers/usb/cherryusb/class/audio/usbh_audio.c +++ b/components/drivers/usb/cherryusb/class/audio/usbh_audio.c @@ -21,7 +21,7 @@ #define INTF_DESC_bInterfaceNumber 2 /** Interface number offset */ #define INTF_DESC_bAlternateSetting 3 /** Alternate setting offset */ -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_audio_buf[128]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_audio_buf[USB_ALIGN_UP(128, CONFIG_USB_ALIGN_SIZE)]; static struct usbh_audio g_audio_class[CONFIG_USBHOST_MAX_AUDIO_CLASS]; static uint32_t g_devinuse = 0; @@ -283,7 +283,7 @@ int usbh_audio_set_volume(struct usbh_audio *audio_class, const char *name, uint volume_max_db = (audio_class->as_msg_table[intf - audio_class->ctrl_intf - 1].volume_max - 0x10000) / 256; } - USB_LOG_INFO("Get ch:%d dB range: %d dB ~ %d dB\r\n", volume_min_db, volume_max_db); + USB_LOG_INFO("Get ch:%u dB range: %ddB ~ %ddB\r\n", ch, volume_min_db, volume_max_db); if (volume_db >= 0) { volume_hex = volume_db * 256; @@ -594,6 +594,7 @@ static int usbh_audio_ctrl_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister Audio Class:%s\r\n", hport->config.intf[intf].devname); usbh_audio_stop(audio_class); } diff --git a/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_acm.c b/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_acm.c index cf7c3c0dd9a..a2fb87b65fd 100644 --- a/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_acm.c +++ b/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_acm.c @@ -42,7 +42,7 @@ static int cdc_acm_class_interface_request_handler(uint8_t busid, struct usb_set memcpy(&line_coding, *data, setup->wLength); USB_LOG_DBG("Set intf:%d linecoding <%d %d %s %s>\r\n", intf_num, - line_coding.dwDTERate, + (unsigned int)line_coding.dwDTERate, line_coding.bDataBits, parity_name[line_coding.bParityType], stop_name[line_coding.bCharFormat]); @@ -67,7 +67,7 @@ static int cdc_acm_class_interface_request_handler(uint8_t busid, struct usb_set *len = 7; USB_LOG_DBG("Get intf:%d linecoding %d %d %d %d\r\n", intf_num, - line_coding.dwDTERate, + (unsigned int)line_coding.dwDTERate, line_coding.bCharFormat, line_coding.bParityType, line_coding.bDataBits); diff --git a/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.c b/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.c index 5ae10a207c3..2a4b77724c3 100644 --- a/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.c +++ b/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.c @@ -17,10 +17,10 @@ static struct usbd_endpoint cdc_ecm_ep_data[3]; #ifdef CONFIG_USBDEV_CDC_ECM_USING_LWIP -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_rx_buffer[CONFIG_CDC_ECM_ETH_MAX_SEGSZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_tx_buffer[CONFIG_CDC_ECM_ETH_MAX_SEGSZE]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_rx_buffer[USB_ALIGN_UP(CONFIG_CDC_ECM_ETH_MAX_SEGSZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_tx_buffer[USB_ALIGN_UP(CONFIG_CDC_ECM_ETH_MAX_SEGSZE, CONFIG_USB_ALIGN_SIZE)]; #endif -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_notify_buf[16]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_notify_buf[USB_ALIGN_UP(16, CONFIG_USB_ALIGN_SIZE)]; volatile uint32_t g_cdc_ecm_rx_data_length = 0; volatile uint32_t g_cdc_ecm_tx_data_length = 0; @@ -173,7 +173,7 @@ void cdc_ecm_int_in(uint8_t busid, uint8_t ep, uint32_t nbytes) int usbd_cdc_ecm_start_write(uint8_t *buf, uint32_t len) { if (!usb_device_is_configured(0)) { - return -USB_ERR_NODEV; + return -USB_ERR_NOTCONN; } if (g_cdc_ecm_tx_data_length > 0) { @@ -189,7 +189,7 @@ int usbd_cdc_ecm_start_write(uint8_t *buf, uint32_t len) int usbd_cdc_ecm_start_read(uint8_t *buf, uint32_t len) { if (!usb_device_is_configured(0)) { - return -USB_ERR_NODEV; + return -USB_ERR_NOTCONN; } g_cdc_ecm_rx_data_length = 0; @@ -222,6 +222,10 @@ int usbd_cdc_ecm_eth_tx(struct pbuf *p) struct pbuf *q; uint8_t *buffer; + if (!usb_device_is_configured(0)) { + return -USB_ERR_NOTCONN; + } + if (g_cdc_ecm_tx_data_length > 0) { return -USB_ERR_BUSY; } @@ -261,8 +265,12 @@ struct usbd_interface *usbd_cdc_ecm_init_intf(struct usbd_interface *intf, const return intf; } -void usbd_cdc_ecm_set_connect(bool connect, uint32_t speed[2]) +int usbd_cdc_ecm_set_connect(bool connect, uint32_t speed[2]) { + if (!usb_device_is_configured(0)) { + return -USB_ERR_NOTCONN; + } + if (connect) { g_current_net_status = 2; memcpy(g_connect_speed_table, speed, 8); @@ -271,6 +279,8 @@ void usbd_cdc_ecm_set_connect(bool connect, uint32_t speed[2]) g_current_net_status = 1; usbd_cdc_ecm_send_notify(CDC_ECM_NOTIFY_CODE_NETWORK_CONNECTION, CDC_ECM_NET_DISCONNECTED, NULL); } + + return 0; } __WEAK void usbd_cdc_ecm_data_recv_done(uint32_t len) diff --git a/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.h b/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.h index 3e0284e3288..780e7e2bdc3 100644 --- a/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.h +++ b/components/drivers/usb/cherryusb/class/cdc/usbd_cdc_ecm.h @@ -15,7 +15,7 @@ extern "C" { /* Init cdc ecm interface driver */ struct usbd_interface *usbd_cdc_ecm_init_intf(struct usbd_interface *intf, const uint8_t int_ep, const uint8_t out_ep, const uint8_t in_ep); -void usbd_cdc_ecm_set_connect(bool connect, uint32_t speed[2]); +int usbd_cdc_ecm_set_connect(bool connect, uint32_t speed[2]); void usbd_cdc_ecm_data_recv_done(uint32_t len); void usbd_cdc_ecm_data_send_done(uint32_t len); diff --git a/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_acm.c b/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_acm.c index 53666b32f03..2fc54eed6bb 100644 --- a/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_acm.c +++ b/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_acm.c @@ -193,6 +193,7 @@ static int usbh_cdc_acm_disconnect(struct usbh_hubport *hport, uint8_t intf) #endif if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister CDC ACM Class:%s\r\n", hport->config.intf[intf].devname); usbh_cdc_acm_stop(cdc_acm_class); } diff --git a/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ecm.c b/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ecm.c index 5ca1ff33b4e..094ea14f3bd 100644 --- a/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ecm.c +++ b/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ecm.c @@ -24,9 +24,9 @@ #define CONFIG_USBHOST_CDC_ECM_PKT_FILTER 0x000C #define CONFIG_USBHOST_CDC_ECM_ETH_MAX_SIZE 1514U -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_rx_buffer[CONFIG_USBHOST_CDC_ECM_ETH_MAX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_tx_buffer[CONFIG_USBHOST_CDC_ECM_ETH_MAX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_inttx_buffer[16]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_rx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_CDC_ECM_ETH_MAX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_tx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_CDC_ECM_ETH_MAX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ecm_inttx_buffer[USB_ALIGN_UP(16, CONFIG_USB_ALIGN_SIZE)]; static struct usbh_cdc_ecm g_cdc_ecm_class; @@ -221,6 +221,7 @@ static int usbh_cdc_ecm_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister CDC ECM Class:%s\r\n", hport->config.intf[intf].devname); usbh_cdc_ecm_stop(cdc_ecm_class); } diff --git a/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ncm.c b/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ncm.c index 8bffea7ff8f..b7c89f3d6da 100644 --- a/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ncm.c +++ b/components/drivers/usb/cherryusb/class/cdc/usbh_cdc_ncm.c @@ -25,9 +25,9 @@ static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ncm_rx_buffer[CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE]; static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ncm_tx_buffer[CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ncm_inttx_buffer[16]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ncm_inttx_buffer[USB_ALIGN_UP(16, CONFIG_USB_ALIGN_SIZE)]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ncm_buf[32]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cdc_ncm_buf[USB_ALIGN_UP(32, CONFIG_USB_ALIGN_SIZE)]; static struct usbh_cdc_ncm g_cdc_ncm_class; @@ -52,7 +52,7 @@ static int usbh_cdc_ncm_get_ntb_parameters(struct usbh_cdc_ncm *cdc_ncm_class, s return ret; } - memcpy((uint8_t *)param, g_cdc_ncm_buf, ret - 8); + memcpy((uint8_t *)param, g_cdc_ncm_buf, MIN(ret - 8, sizeof(struct cdc_ncm_ntb_parameters))); return 0; } @@ -62,12 +62,12 @@ static void print_ntb_parameters(struct cdc_ncm_ntb_parameters *param) USB_LOG_RAW("wLength: 0x%02x \r\n", param->wLength); USB_LOG_RAW("bmNtbFormatsSupported: %s \r\n", param->bmNtbFormatsSupported ? "NTB16" : "NTB32"); - USB_LOG_RAW("dwNtbInMaxSize: 0x%08lx \r\n", param->dwNtbInMaxSize); + USB_LOG_RAW("dwNtbInMaxSize: 0x%08x \r\n", (unsigned int)param->dwNtbInMaxSize); USB_LOG_RAW("wNdbInDivisor: 0x%02x \r\n", param->wNdbInDivisor); USB_LOG_RAW("wNdbInPayloadRemainder: 0x%02x \r\n", param->wNdbInPayloadRemainder); USB_LOG_RAW("wNdbInAlignment: 0x%02x \r\n", param->wNdbInAlignment); - USB_LOG_RAW("dwNtbOutMaxSize: 0x%08lx \r\n", param->dwNtbOutMaxSize); + USB_LOG_RAW("dwNtbOutMaxSize: 0x%08x \r\n", (unsigned int)param->dwNtbOutMaxSize); USB_LOG_RAW("wNdbOutDivisor: 0x%02x \r\n", param->wNdbOutDivisor); USB_LOG_RAW("wNdbOutPayloadRemainder: 0x%02x \r\n", param->wNdbOutPayloadRemainder); USB_LOG_RAW("wNdbOutAlignment: 0x%02x \r\n", param->wNdbOutAlignment); @@ -239,6 +239,7 @@ static int usbh_cdc_ncm_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister CDC NCM Class:%s\r\n", hport->config.intf[intf].devname); usbh_cdc_ncm_stop(cdc_ncm_class); } diff --git a/components/drivers/usb/cherryusb/class/hid/usb_hid.h b/components/drivers/usb/cherryusb/class/hid/usb_hid.h index 62525a7444e..ea6c0f2556e 100644 --- a/components/drivers/usb/cherryusb/class/hid/usb_hid.h +++ b/components/drivers/usb/cherryusb/class/hid/usb_hid.h @@ -169,14 +169,14 @@ #define HID_LOCAL_ITEM_DELIMITER_PREFIX 0xa8 /* Delimiter */ /* Modifier Keys (HID 8.3) */ -#define HID_MODIFER_LCTRL (1 << 0) /* Left Ctrl */ -#define HID_MODIFER_LSHIFT (1 << 1) /* Left Shift */ -#define HID_MODIFER_LALT (1 << 2) /* Left Alt */ -#define HID_MODIFER_LGUI (1 << 3) /* Left GUI */ -#define HID_MODIFER_RCTRL (1 << 4) /* Right Ctrl */ -#define HID_MODIFER_RSHIFT (1 << 5) /* Right Shift */ -#define HID_MODIFER_RALT (1 << 6) /* Right Alt */ -#define HID_MODIFER_RGUI (1 << 7) /* Right GUI */ +#define HID_MODIFIER_LCTRL (1 << 0) /* Left Ctrl */ +#define HID_MODIFIER_LSHIFT (1 << 1) /* Left Shift */ +#define HID_MODIFIER_LALT (1 << 2) /* Left Alt */ +#define HID_MODIFIER_LGUI (1 << 3) /* Left GUI */ +#define HID_MODIFIER_RCTRL (1 << 4) /* Right Ctrl */ +#define HID_MODIFIER_RSHIFT (1 << 5) /* Right Shift */ +#define HID_MODIFIER_RALT (1 << 6) /* Right Alt */ +#define HID_MODIFIER_RGUI (1 << 7) /* Right GUI */ /* Keyboard output report (1 byte) (HID B.1) */ #define HID_KBD_OUTPUT_REPORT_NUMLOCK (1 << 0) diff --git a/components/drivers/usb/cherryusb/class/hid/usbd_hid.h b/components/drivers/usb/cherryusb/class/hid/usbd_hid.h index d5c3484f2fd..9ab31b900c2 100644 --- a/components/drivers/usb/cherryusb/class/hid/usbd_hid.h +++ b/components/drivers/usb/cherryusb/class/hid/usbd_hid.h @@ -15,10 +15,6 @@ extern "C" { /* Init hid interface driver */ struct usbd_interface *usbd_hid_init_intf(uint8_t busid, struct usbd_interface *intf, const uint8_t *desc, uint32_t desc_len); -/* Register desc api */ -void usbd_hid_descriptor_register(uint8_t busid, uint8_t intf_num, const uint8_t *desc); -void usbd_hid_report_descriptor_register(uint8_t busid, uint8_t intf_num, const uint8_t *desc, uint32_t desc_len); - /* Setup request command callback api */ void usbd_hid_get_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t **data, uint32_t *len); uint8_t usbd_hid_get_idle(uint8_t busid, uint8_t intf, uint8_t report_id); diff --git a/components/drivers/usb/cherryusb/class/hid/usbh_hid.c b/components/drivers/usb/cherryusb/class/hid/usbh_hid.c index 0fd58abb153..5c400c7b173 100644 --- a/components/drivers/usb/cherryusb/class/hid/usbh_hid.c +++ b/components/drivers/usb/cherryusb/class/hid/usbh_hid.c @@ -106,7 +106,7 @@ int usbh_hid_get_idle(struct usbh_hid *hid_class, uint8_t *buffer) if (ret < 8) { return ret; } - memcpy(buffer, g_hid_buf[hid_class->minor], ret - 8); + memcpy(buffer, g_hid_buf[hid_class->minor], MIN(ret - 8, 1)); return ret; } @@ -128,6 +128,30 @@ int usbh_hid_set_protocol(struct usbh_hid *hid_class, uint8_t protocol) return usbh_control_transfer(hid_class->hport, setup, NULL); } +int usbh_hid_get_protocol(struct usbh_hid *hid_class, uint8_t *protocol) +{ + struct usb_setup_packet *setup; + int ret; + + if (!hid_class || !hid_class->hport) { + return -USB_ERR_INVAL; + } + setup = hid_class->hport->setup; + + setup->bmRequestType = USB_REQUEST_DIR_IN | USB_REQUEST_CLASS | USB_REQUEST_RECIPIENT_INTERFACE; + setup->bRequest = HID_REQUEST_GET_PROTOCOL; + setup->wValue = 0; + setup->wIndex = hid_class->intf; + setup->wLength = 1; + + ret = usbh_control_transfer(hid_class->hport, setup, g_hid_buf[hid_class->minor]); + if (ret < 8) { + return ret; + } + memcpy(protocol, g_hid_buf[hid_class->minor], MIN(ret - 8, 1)); + return ret; +} + int usbh_hid_set_report(struct usbh_hid *hid_class, uint8_t report_type, uint8_t report_id, uint8_t *buffer, uint32_t buflen) { struct usb_setup_packet *setup; @@ -166,7 +190,7 @@ int usbh_hid_get_report(struct usbh_hid *hid_class, uint8_t report_type, uint8_t if (ret < 8) { return ret; } - memcpy(buffer, g_hid_buf[hid_class->minor], ret - 8); + memcpy(buffer, g_hid_buf[hid_class->minor], MIN(ret - 8, buflen)); return ret; } @@ -275,6 +299,7 @@ int usbh_hid_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister HID Class:%s\r\n", hport->config.intf[intf].devname); usbh_hid_stop(hid_class); } diff --git a/components/drivers/usb/cherryusb/class/hid/usbh_hid.h b/components/drivers/usb/cherryusb/class/hid/usbh_hid.h index 5e8fce61f74..8b87e0c0b58 100644 --- a/components/drivers/usb/cherryusb/class/hid/usbh_hid.h +++ b/components/drivers/usb/cherryusb/class/hid/usbh_hid.h @@ -31,6 +31,8 @@ extern "C" { int usbh_hid_get_report_descriptor(struct usbh_hid *hid_class, uint8_t *buffer, uint32_t buflen); int usbh_hid_set_idle(struct usbh_hid *hid_class, uint8_t report_id, uint8_t duration); int usbh_hid_get_idle(struct usbh_hid *hid_class, uint8_t *buffer); +int usbh_hid_set_protocol(struct usbh_hid *hid_class, uint8_t protocol); +int usbh_hid_get_protocol(struct usbh_hid *hid_class, uint8_t *protocol); int usbh_hid_set_report(struct usbh_hid *hid_class, uint8_t report_type, uint8_t report_id, uint8_t *buffer, uint32_t buflen); int usbh_hid_get_report(struct usbh_hid *hid_class, uint8_t report_type, uint8_t report_id, uint8_t *buffer, uint32_t buflen); diff --git a/components/drivers/usb/cherryusb/class/hub/usbh_hub.c b/components/drivers/usb/cherryusb/class/hub/usbh_hub.c index 54377a74be5..4aa6be0fef9 100644 --- a/components/drivers/usb/cherryusb/class/hub/usbh_hub.c +++ b/components/drivers/usb/cherryusb/class/hub/usbh_hub.c @@ -152,6 +152,7 @@ static int _usbh_hub_clear_feature(struct usbh_hub *hub, uint8_t port, uint8_t f return usbh_control_transfer(hub->parent, setup, NULL); } +#if CONFIG_USBHOST_MAX_EXTHUBS > 0 static int _usbh_hub_set_depth(struct usbh_hub *hub, uint16_t depth) { struct usb_setup_packet *setup; @@ -167,7 +168,6 @@ static int _usbh_hub_set_depth(struct usbh_hub *hub, uint16_t depth) return usbh_control_transfer(hub->parent, setup, NULL); } -#if CONFIG_USBHOST_MAX_EXTHUBS > 0 static int parse_hub_descriptor(struct usb_hub_descriptor *desc, uint16_t length) { (void)length; @@ -270,6 +270,7 @@ int usbh_hub_clear_feature(struct usbh_hub *hub, uint8_t port, uint8_t feature) } } +#if CONFIG_USBHOST_MAX_EXTHUBS > 0 static int usbh_hub_set_depth(struct usbh_hub *hub, uint16_t depth) { struct usb_setup_packet roothub_setup; @@ -288,7 +289,6 @@ static int usbh_hub_set_depth(struct usbh_hub *hub, uint16_t depth) } } -#if CONFIG_USBHOST_MAX_EXTHUBS > 0 static void hub_int_complete_callback(void *arg, int nbytes) { struct usbh_hub *hub = (struct usbh_hub *)arg; @@ -706,8 +706,6 @@ int usbh_hub_deinitialize(struct usbh_bus *bus) struct usbh_hub *hub; size_t flags; - flags = usb_osal_enter_critical_section(); - hub = &bus->hcd.roothub; for (uint8_t port = 0; port < hub->nports; port++) { hport = &hub->child[port]; @@ -715,6 +713,8 @@ int usbh_hub_deinitialize(struct usbh_bus *bus) usbh_hubport_release(hport); } + flags = usb_osal_enter_critical_section(); + usb_hc_deinit(bus); usb_osal_leave_critical_section(flags); diff --git a/components/drivers/usb/cherryusb/class/msc/usbd_msc.c b/components/drivers/usb/cherryusb/class/msc/usbd_msc.c index 993617abe11..4a7b7524b72 100644 --- a/components/drivers/usb/cherryusb/class/msc/usbd_msc.c +++ b/components/drivers/usb/cherryusb/class/msc/usbd_msc.c @@ -9,8 +9,6 @@ #include "usb_scsi.h" #if defined(CONFIG_USBDEV_MSC_THREAD) #include "usb_osal.h" -#elif defined(CONFIG_USBDEV_MSC_POLLING) -#include "chry_ringbuffer.h" #endif #define MSD_OUT_EP_IDX 0 @@ -35,7 +33,7 @@ USB_NOCACHE_RAM_SECTION struct usbd_msc_priv { USB_MEM_ALIGNX struct CBW cbw; USB_MEM_ALIGNX struct CSW csw; - bool readonly; + USB_MEM_ALIGNX bool readonly; bool popup; uint8_t sKey; /* Sense key */ uint8_t ASC; /* Additional Sense Code */ @@ -53,8 +51,7 @@ USB_NOCACHE_RAM_SECTION struct usbd_msc_priv { usb_osal_thread_t usbd_msc_thread; uint32_t nbytes; #elif defined(CONFIG_USBDEV_MSC_POLLING) - chry_ringbuffer_t msc_rb; - uint8_t msc_rb_pool[2]; + uint32_t event; uint32_t nbytes; #endif } g_usbd_msc[CONFIG_USBDEV_MAX_BUS]; @@ -114,7 +111,7 @@ void msc_storage_notify_handler(uint8_t busid, uint8_t event, void *arg) USB_LOG_ERR("No memory to alloc for g_usbd_msc[busid].usbd_msc_thread\r\n"); } #elif defined(CONFIG_USBDEV_MSC_POLLING) - chry_ringbuffer_init(&g_usbd_msc[busid].msc_rb, g_usbd_msc[busid].msc_rb_pool, sizeof(g_usbd_msc[busid].msc_rb_pool)); + g_usbd_msc[busid].event = 0; #endif break; case USBD_EVENT_DEINIT: @@ -539,7 +536,7 @@ static bool SCSI_read10(uint8_t busid, uint8_t **data, uint32_t *len) usb_osal_mq_send(g_usbd_msc[busid].usbd_msc_mq, MSC_DATA_IN); return true; #elif defined(CONFIG_USBDEV_MSC_POLLING) - chry_ringbuffer_write_byte(&g_usbd_msc[busid].msc_rb, MSC_DATA_IN); + g_usbd_msc[busid].event = MSC_DATA_IN; return true; #else return SCSI_processRead(busid); @@ -577,7 +574,7 @@ static bool SCSI_read12(uint8_t busid, uint8_t **data, uint32_t *len) usb_osal_mq_send(g_usbd_msc[busid].usbd_msc_mq, MSC_DATA_IN); return true; #elif defined(CONFIG_USBDEV_MSC_POLLING) - chry_ringbuffer_write_byte(&g_usbd_msc[busid].msc_rb, MSC_DATA_IN); + g_usbd_msc[busid].event = MSC_DATA_IN; return true; #else return SCSI_processRead(busid); @@ -810,7 +807,9 @@ static bool SCSI_CBWDecode(uint8_t busid, uint32_t nbytes) //ret = SCSI_verify10(NULL, 0); ret = false; break; - + case SCSI_CMD_SYNCHCACHE10: + ret = true; + break; default: SCSI_SetSenseData(busid, SCSI_KCQIR_INVALIDCOMMAND); USB_LOG_WRN("unsupported cmd:0x%02x\r\n", g_usbd_msc[busid].cbw.CB[0]); @@ -852,7 +851,7 @@ void mass_storage_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) usb_osal_mq_send(g_usbd_msc[busid].usbd_msc_mq, MSC_DATA_OUT); #elif defined(CONFIG_USBDEV_MSC_POLLING) g_usbd_msc[busid].nbytes = nbytes; - chry_ringbuffer_write_byte(&g_usbd_msc[busid].msc_rb, MSC_DATA_OUT); + g_usbd_msc[busid].event = MSC_DATA_OUT; #else if (SCSI_processWrite(busid, nbytes) == false) { usbd_msc_send_csw(busid, CSW_STATUS_CMD_FAILED); /* send fail status to host,and the host will retry*/ @@ -881,7 +880,7 @@ void mass_storage_bulk_in(uint8_t busid, uint8_t ep, uint32_t nbytes) #if defined(CONFIG_USBDEV_MSC_THREAD) usb_osal_mq_send(g_usbd_msc[busid].usbd_msc_mq, MSC_DATA_IN); #elif defined(CONFIG_USBDEV_MSC_POLLING) - chry_ringbuffer_write_byte(&g_usbd_msc[busid].msc_rb, MSC_DATA_IN); + g_usbd_msc[busid].event = MSC_DATA_IN; #else if (SCSI_processRead(busid) == false) { usbd_msc_send_csw(busid, CSW_STATUS_CMD_FAILED); /* send fail status to host,and the host will retry*/ @@ -940,7 +939,10 @@ void usbd_msc_polling(uint8_t busid) { uint8_t event; - if (chry_ringbuffer_read_byte(&g_usbd_msc[busid].msc_rb, &event)) { + event = g_usbd_msc[busid].event; + + if (event != 0) { + g_usbd_msc[busid].event = 0; USB_LOG_DBG("event:%d\r\n", event); if (event == MSC_DATA_OUT) { if (SCSI_processWrite(busid, g_usbd_msc[busid].nbytes) == false) { @@ -979,7 +981,8 @@ struct usbd_interface *usbd_msc_init_intf(uint8_t busid, struct usbd_interface * if (CONFIG_USBDEV_MSC_MAX_BUFSIZE % g_usbd_msc[busid].scsi_blk_size[i]) { USB_LOG_ERR("CONFIG_USBDEV_MSC_MAX_BUFSIZE must be a multiple of block size\r\n"); - while(1){} + while (1) { + } } } @@ -995,3 +998,34 @@ bool usbd_msc_get_popup(uint8_t busid) { return g_usbd_msc[busid].popup; } + +__WEAK void usbd_msc_get_cap(uint8_t busid, uint8_t lun, uint32_t *block_num, uint32_t *block_size) +{ + (void)busid; + (void)lun; + + *block_num = 0; + *block_size = 0; +} + +__WEAK int usbd_msc_sector_read(uint8_t busid, uint8_t lun, uint32_t sector, uint8_t *buffer, uint32_t length) +{ + (void)busid; + (void)lun; + (void)sector; + (void)buffer; + (void)length; + + return 0; +} + +__WEAK int usbd_msc_sector_write(uint8_t busid, uint8_t lun, uint32_t sector, uint8_t *buffer, uint32_t length) +{ + (void)busid; + (void)lun; + (void)sector; + (void)buffer; + (void)length; + + return 0; +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/class/msc/usbh_msc.c b/components/drivers/usb/cherryusb/class/msc/usbh_msc.c index 88c90b0b1a1..fe91a5bf892 100644 --- a/components/drivers/usb/cherryusb/class/msc/usbh_msc.c +++ b/components/drivers/usb/cherryusb/class/msc/usbh_msc.c @@ -342,6 +342,7 @@ static int usbh_msc_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister MSC Class:%s\r\n", hport->config.intf[intf].devname); usbh_msc_stop(msc_class); } diff --git a/components/drivers/usb/cherryusb/class/mtp/usb_mtp.h b/components/drivers/usb/cherryusb/class/mtp/usb_mtp.h new file mode 100644 index 00000000000..524abb759b9 --- /dev/null +++ b/components/drivers/usb/cherryusb/class/mtp/usb_mtp.h @@ -0,0 +1,683 @@ +/* + * Copyright (C) 2010 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * Copyright (c) 2025, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_MTP_H +#define USB_MTP_H + +// clang-format off +#define MTP_STANDARD_VERSION 100 + +// Container Types +#define MTP_CONTAINER_TYPE_UNDEFINED 0 +#define MTP_CONTAINER_TYPE_COMMAND 1 +#define MTP_CONTAINER_TYPE_DATA 2 +#define MTP_CONTAINER_TYPE_RESPONSE 3 +#define MTP_CONTAINER_TYPE_EVENT 4 + +// Container Offsets +#define MTP_CONTAINER_LENGTH_OFFSET 0 +#define MTP_CONTAINER_TYPE_OFFSET 4 +#define MTP_CONTAINER_CODE_OFFSET 6 +#define MTP_CONTAINER_TRANSACTION_ID_OFFSET 8 +#define MTP_CONTAINER_PARAMETER_OFFSET 12 +#define MTP_CONTAINER_HEADER_SIZE 12 + +// Maximum buffer size for a MTP packet. +#define MTP_BUFFER_SIZE 16384 + +// MTP Data Types +#define MTP_TYPE_UNDEFINED 0x0000 // Undefined +#define MTP_TYPE_INT8 0x0001 // Signed 8-bit integer +#define MTP_TYPE_UINT8 0x0002 // Unsigned 8-bit integer +#define MTP_TYPE_INT16 0x0003 // Signed 16-bit integer +#define MTP_TYPE_UINT16 0x0004 // Unsigned 16-bit integer +#define MTP_TYPE_INT32 0x0005 // Signed 32-bit integer +#define MTP_TYPE_UINT32 0x0006 // Unsigned 32-bit integer +#define MTP_TYPE_INT64 0x0007 // Signed 64-bit integer +#define MTP_TYPE_UINT64 0x0008 // Unsigned 64-bit integer +#define MTP_TYPE_INT128 0x0009 // Signed 128-bit integer +#define MTP_TYPE_UINT128 0x000A // Unsigned 128-bit integer +#define MTP_TYPE_AINT8 0x4001 // Array of signed 8-bit integers +#define MTP_TYPE_AUINT8 0x4002 // Array of unsigned 8-bit integers +#define MTP_TYPE_AINT16 0x4003 // Array of signed 16-bit integers +#define MTP_TYPE_AUINT16 0x4004 // Array of unsigned 16-bit integers +#define MTP_TYPE_AINT32 0x4005 // Array of signed 32-bit integers +#define MTP_TYPE_AUINT32 0x4006 // Array of unsigned 32-bit integers +#define MTP_TYPE_AINT64 0x4007 // Array of signed 64-bit integers +#define MTP_TYPE_AUINT64 0x4008 // Array of unsigned 64-bit integers +#define MTP_TYPE_AINT128 0x4009 // Array of signed 128-bit integers +#define MTP_TYPE_AUINT128 0x400A // Array of unsigned 128-bit integers +#define MTP_TYPE_STR 0xFFFF // Variable-length Unicode string + +// MTP Format Codes +#define MTP_FORMAT_UNDEFINED 0x3000 // Undefined object +#define MTP_FORMAT_ASSOCIATION 0x3001 // Association (for example, a folder) +#define MTP_FORMAT_SCRIPT 0x3002 // Device model-specific script +#define MTP_FORMAT_EXECUTABLE 0x3003 // Device model-specific binary executable +#define MTP_FORMAT_TEXT 0x3004 // Text file +#define MTP_FORMAT_HTML 0x3005 // Hypertext Markup Language file (text) +#define MTP_FORMAT_DPOF 0x3006 // Digital Print Order Format file (text) +#define MTP_FORMAT_AIFF 0x3007 // Audio clip +#define MTP_FORMAT_WAV 0x3008 // Audio clip +#define MTP_FORMAT_MP3 0x3009 // Audio clip +#define MTP_FORMAT_AVI 0x300A // Video clip +#define MTP_FORMAT_MPEG 0x300B // Video clip +#define MTP_FORMAT_ASF 0x300C // Microsoft Advanced Streaming Format (video) +#define MTP_FORMAT_DEFINED 0x3800 // Unknown image object +#define MTP_FORMAT_EXIF_JPEG 0x3801 // Exchangeable File Format, JEIDA standard +#define MTP_FORMAT_TIFF_EP 0x3802 // Tag Image File Format for Electronic Photography +#define MTP_FORMAT_FLASHPIX 0x3803 // Structured Storage Image Format +#define MTP_FORMAT_BMP 0x3804 // Microsoft Windows Bitmap file +#define MTP_FORMAT_CIFF 0x3805 // Canon Camera Image File Format +#define MTP_FORMAT_GIF 0x3807 // Graphics Interchange Format +#define MTP_FORMAT_JFIF 0x3808 // JPEG File Interchange Format +#define MTP_FORMAT_CD 0x3809 // PhotoCD Image Pac +#define MTP_FORMAT_PICT 0x380A // Quickdraw Image Format +#define MTP_FORMAT_PNG 0x380B // Portable Network Graphics +#define MTP_FORMAT_TIFF 0x380D // Tag Image File Format +#define MTP_FORMAT_TIFF_IT 0x380E // Tag Image File Format for Information Technology (graphic arts) +#define MTP_FORMAT_JP2 0x380F // JPEG2000 Baseline File Format +#define MTP_FORMAT_JPX 0x3810 // JPEG2000 Extended File Format +#define MTP_FORMAT_DNG 0x3811 // Digital Negative +#define MTP_FORMAT_HEIF 0x3812 // HEIF images +#define MTP_FORMAT_UNDEFINED_FIRMWARE 0xB802 +#define MTP_FORMAT_WINDOWS_IMAGE_FORMAT 0xB881 +#define MTP_FORMAT_UNDEFINED_AUDIO 0xB900 +#define MTP_FORMAT_WMA 0xB901 +#define MTP_FORMAT_OGG 0xB902 +#define MTP_FORMAT_AAC 0xB903 +#define MTP_FORMAT_AUDIBLE 0xB904 +#define MTP_FORMAT_FLAC 0xB906 +#define MTP_FORMAT_UNDEFINED_VIDEO 0xB980 +#define MTP_FORMAT_WMV 0xB981 +#define MTP_FORMAT_MP4_CONTAINER 0xB982 // ISO 14496-1 +#define MTP_FORMAT_MP2 0xB983 +#define MTP_FORMAT_3GP_CONTAINER 0xB984 // 3GPP file format. Details: http://www.3gpp.org/ftp/Specs/html-info/26244.htm (page title - \u201cTransparent end-to-end packet switched streaming service, 3GPP file format\u201d). +#define MTP_FORMAT_UNDEFINED_COLLECTION 0xBA00 +#define MTP_FORMAT_ABSTRACT_MULTIMEDIA_ALBUM 0xBA01 +#define MTP_FORMAT_ABSTRACT_IMAGE_ALBUM 0xBA02 +#define MTP_FORMAT_ABSTRACT_AUDIO_ALBUM 0xBA03 +#define MTP_FORMAT_ABSTRACT_VIDEO_ALBUM 0xBA04 +#define MTP_FORMAT_ABSTRACT_AV_PLAYLIST 0xBA05 +#define MTP_FORMAT_ABSTRACT_CONTACT_GROUP 0xBA06 +#define MTP_FORMAT_ABSTRACT_MESSAGE_FOLDER 0xBA07 +#define MTP_FORMAT_ABSTRACT_CHAPTERED_PRODUCTION 0xBA08 +#define MTP_FORMAT_ABSTRACT_AUDIO_PLAYLIST 0xBA09 +#define MTP_FORMAT_ABSTRACT_VIDEO_PLAYLIST 0xBA0A +#define MTP_FORMAT_ABSTRACT_MEDIACAST 0xBA0B // For use with mediacasts; references multimedia enclosures of RSS feeds or episodic content +#define MTP_FORMAT_WPL_PLAYLIST 0xBA10 +#define MTP_FORMAT_M3U_PLAYLIST 0xBA11 +#define MTP_FORMAT_MPL_PLAYLIST 0xBA12 +#define MTP_FORMAT_ASX_PLAYLIST 0xBA13 +#define MTP_FORMAT_PLS_PLAYLIST 0xBA14 +#define MTP_FORMAT_UNDEFINED_DOCUMENT 0xBA80 +#define MTP_FORMAT_ABSTRACT_DOCUMENT 0xBA81 +#define MTP_FORMAT_XML_DOCUMENT 0xBA82 +#define MTP_FORMAT_MS_WORD_DOCUMENT 0xBA83 +#define MTP_FORMAT_MHT_COMPILED_HTML_DOCUMENT 0xBA84 +#define MTP_FORMAT_MS_EXCEL_SPREADSHEET 0xBA85 +#define MTP_FORMAT_MS_POWERPOINT_PRESENTATION 0xBA86 +#define MTP_FORMAT_UNDEFINED_MESSAGE 0xBB00 +#define MTP_FORMAT_ABSTRACT_MESSSAGE 0xBB01 +#define MTP_FORMAT_UNDEFINED_CONTACT 0xBB80 +#define MTP_FORMAT_ABSTRACT_CONTACT 0xBB81 +#define MTP_FORMAT_VCARD_2 0xBB82 + +// MTP Object Property Codes +#define MTP_PROPERTY_STORAGE_ID 0xDC01 +#define MTP_PROPERTY_OBJECT_FORMAT 0xDC02 +#define MTP_PROPERTY_PROTECTION_STATUS 0xDC03 +#define MTP_PROPERTY_OBJECT_SIZE 0xDC04 +#define MTP_PROPERTY_ASSOCIATION_TYPE 0xDC05 +#define MTP_PROPERTY_ASSOCIATION_DESC 0xDC06 +#define MTP_PROPERTY_OBJECT_FILE_NAME 0xDC07 +#define MTP_PROPERTY_DATE_CREATED 0xDC08 +#define MTP_PROPERTY_DATE_MODIFIED 0xDC09 +#define MTP_PROPERTY_KEYWORDS 0xDC0A +#define MTP_PROPERTY_PARENT_OBJECT 0xDC0B +#define MTP_PROPERTY_ALLOWED_FOLDER_CONTENTS 0xDC0C +#define MTP_PROPERTY_HIDDEN 0xDC0D +#define MTP_PROPERTY_SYSTEM_OBJECT 0xDC0E +#define MTP_PROPERTY_PERSISTENT_UID 0xDC41 +#define MTP_PROPERTY_SYNC_ID 0xDC42 +#define MTP_PROPERTY_PROPERTY_BAG 0xDC43 +#define MTP_PROPERTY_NAME 0xDC44 +#define MTP_PROPERTY_CREATED_BY 0xDC45 +#define MTP_PROPERTY_ARTIST 0xDC46 +#define MTP_PROPERTY_DATE_AUTHORED 0xDC47 +#define MTP_PROPERTY_DESCRIPTION 0xDC48 +#define MTP_PROPERTY_URL_REFERENCE 0xDC49 +#define MTP_PROPERTY_LANGUAGE_LOCALE 0xDC4A +#define MTP_PROPERTY_COPYRIGHT_INFORMATION 0xDC4B +#define MTP_PROPERTY_SOURCE 0xDC4C +#define MTP_PROPERTY_ORIGIN_LOCATION 0xDC4D +#define MTP_PROPERTY_DATE_ADDED 0xDC4E +#define MTP_PROPERTY_NON_CONSUMABLE 0xDC4F +#define MTP_PROPERTY_CORRUPT_UNPLAYABLE 0xDC50 +#define MTP_PROPERTY_PRODUCER_SERIAL_NUMBER 0xDC51 +#define MTP_PROPERTY_REPRESENTATIVE_SAMPLE_FORMAT 0xDC81 +#define MTP_PROPERTY_REPRESENTATIVE_SAMPLE_SIZE 0xDC82 +#define MTP_PROPERTY_REPRESENTATIVE_SAMPLE_HEIGHT 0xDC83 +#define MTP_PROPERTY_REPRESENTATIVE_SAMPLE_WIDTH 0xDC84 +#define MTP_PROPERTY_REPRESENTATIVE_SAMPLE_DURATION 0xDC85 +#define MTP_PROPERTY_REPRESENTATIVE_SAMPLE_DATA 0xDC86 +#define MTP_PROPERTY_WIDTH 0xDC87 +#define MTP_PROPERTY_HEIGHT 0xDC88 +#define MTP_PROPERTY_DURATION 0xDC89 +#define MTP_PROPERTY_RATING 0xDC8A +#define MTP_PROPERTY_TRACK 0xDC8B +#define MTP_PROPERTY_GENRE 0xDC8C +#define MTP_PROPERTY_CREDITS 0xDC8D +#define MTP_PROPERTY_LYRICS 0xDC8E +#define MTP_PROPERTY_SUBSCRIPTION_CONTENT_ID 0xDC8F +#define MTP_PROPERTY_PRODUCED_BY 0xDC90 +#define MTP_PROPERTY_USE_COUNT 0xDC91 +#define MTP_PROPERTY_SKIP_COUNT 0xDC92 +#define MTP_PROPERTY_LAST_ACCESSED 0xDC93 +#define MTP_PROPERTY_PARENTAL_RATING 0xDC94 +#define MTP_PROPERTY_META_GENRE 0xDC95 +#define MTP_PROPERTY_COMPOSER 0xDC96 +#define MTP_PROPERTY_EFFECTIVE_RATING 0xDC97 +#define MTP_PROPERTY_SUBTITLE 0xDC98 +#define MTP_PROPERTY_ORIGINAL_RELEASE_DATE 0xDC99 +#define MTP_PROPERTY_ALBUM_NAME 0xDC9A +#define MTP_PROPERTY_ALBUM_ARTIST 0xDC9B +#define MTP_PROPERTY_MOOD 0xDC9C +#define MTP_PROPERTY_DRM_STATUS 0xDC9D +#define MTP_PROPERTY_SUB_DESCRIPTION 0xDC9E +#define MTP_PROPERTY_IS_CROPPED 0xDCD1 +#define MTP_PROPERTY_IS_COLOUR_CORRECTED 0xDCD2 +#define MTP_PROPERTY_IMAGE_BIT_DEPTH 0xDCD3 +#define MTP_PROPERTY_F_NUMBER 0xDCD4 +#define MTP_PROPERTY_EXPOSURE_TIME 0xDCD5 +#define MTP_PROPERTY_EXPOSURE_INDEX 0xDCD6 +#define MTP_PROPERTY_TOTAL_BITRATE 0xDE91 +#define MTP_PROPERTY_BITRATE_TYPE 0xDE92 +#define MTP_PROPERTY_SAMPLE_RATE 0xDE93 +#define MTP_PROPERTY_NUMBER_OF_CHANNELS 0xDE94 +#define MTP_PROPERTY_AUDIO_BIT_DEPTH 0xDE95 +#define MTP_PROPERTY_SCAN_TYPE 0xDE97 +#define MTP_PROPERTY_AUDIO_WAVE_CODEC 0xDE99 +#define MTP_PROPERTY_AUDIO_BITRATE 0xDE9A +#define MTP_PROPERTY_VIDEO_FOURCC_CODEC 0xDE9B +#define MTP_PROPERTY_VIDEO_BITRATE 0xDE9C +#define MTP_PROPERTY_FRAMES_PER_THOUSAND_SECONDS 0xDE9D +#define MTP_PROPERTY_KEYFRAME_DISTANCE 0xDE9E +#define MTP_PROPERTY_BUFFER_SIZE 0xDE9F +#define MTP_PROPERTY_ENCODING_QUALITY 0xDEA0 +#define MTP_PROPERTY_ENCODING_PROFILE 0xDEA1 +#define MTP_PROPERTY_DISPLAY_NAME 0xDCE0 +#define MTP_PROPERTY_BODY_TEXT 0xDCE1 +#define MTP_PROPERTY_SUBJECT 0xDCE2 +#define MTP_PROPERTY_PRIORITY 0xDCE3 +#define MTP_PROPERTY_GIVEN_NAME 0xDD00 +#define MTP_PROPERTY_MIDDLE_NAMES 0xDD01 +#define MTP_PROPERTY_FAMILY_NAME 0xDD02 +#define MTP_PROPERTY_PREFIX 0xDD03 +#define MTP_PROPERTY_SUFFIX 0xDD04 +#define MTP_PROPERTY_PHONETIC_GIVEN_NAME 0xDD05 +#define MTP_PROPERTY_PHONETIC_FAMILY_NAME 0xDD06 +#define MTP_PROPERTY_EMAIL_PRIMARY 0xDD07 +#define MTP_PROPERTY_EMAIL_PERSONAL_1 0xDD08 +#define MTP_PROPERTY_EMAIL_PERSONAL_2 0xDD09 +#define MTP_PROPERTY_EMAIL_BUSINESS_1 0xDD0A +#define MTP_PROPERTY_EMAIL_BUSINESS_2 0xDD0B +#define MTP_PROPERTY_EMAIL_OTHERS 0xDD0C +#define MTP_PROPERTY_PHONE_NUMBER_PRIMARY 0xDD0D +#define MTP_PROPERTY_PHONE_NUMBER_PERSONAL 0xDD0E +#define MTP_PROPERTY_PHONE_NUMBER_PERSONAL_2 0xDD0F +#define MTP_PROPERTY_PHONE_NUMBER_BUSINESS 0xDD10 +#define MTP_PROPERTY_PHONE_NUMBER_BUSINESS_2 0xDD11 +#define MTP_PROPERTY_PHONE_NUMBER_MOBILE 0xDD12 +#define MTP_PROPERTY_PHONE_NUMBER_MOBILE_2 0xDD13 +#define MTP_PROPERTY_FAX_NUMBER_PRIMARY 0xDD14 +#define MTP_PROPERTY_FAX_NUMBER_PERSONAL 0xDD15 +#define MTP_PROPERTY_FAX_NUMBER_BUSINESS 0xDD16 +#define MTP_PROPERTY_PAGER_NUMBER 0xDD17 +#define MTP_PROPERTY_PHONE_NUMBER_OTHERS 0xDD18 +#define MTP_PROPERTY_PRIMARY_WEB_ADDRESS 0xDD19 +#define MTP_PROPERTY_PERSONAL_WEB_ADDRESS 0xDD1A +#define MTP_PROPERTY_BUSINESS_WEB_ADDRESS 0xDD1B +#define MTP_PROPERTY_INSTANT_MESSANGER_ADDRESS 0xDD1C +#define MTP_PROPERTY_INSTANT_MESSANGER_ADDRESS_2 0xDD1D +#define MTP_PROPERTY_INSTANT_MESSANGER_ADDRESS_3 0xDD1E +#define MTP_PROPERTY_POSTAL_ADDRESS_PERSONAL_FULL 0xDD1F +#define MTP_PROPERTY_POSTAL_ADDRESS_PERSONAL_LINE_1 0xDD20 +#define MTP_PROPERTY_POSTAL_ADDRESS_PERSONAL_LINE_2 0xDD21 +#define MTP_PROPERTY_POSTAL_ADDRESS_PERSONAL_CITY 0xDD22 +#define MTP_PROPERTY_POSTAL_ADDRESS_PERSONAL_REGION 0xDD23 +#define MTP_PROPERTY_POSTAL_ADDRESS_PERSONAL_POSTAL_CODE 0xDD24 +#define MTP_PROPERTY_POSTAL_ADDRESS_PERSONAL_COUNTRY 0xDD25 +#define MTP_PROPERTY_POSTAL_ADDRESS_BUSINESS_FULL 0xDD26 +#define MTP_PROPERTY_POSTAL_ADDRESS_BUSINESS_LINE_1 0xDD27 +#define MTP_PROPERTY_POSTAL_ADDRESS_BUSINESS_LINE_2 0xDD28 +#define MTP_PROPERTY_POSTAL_ADDRESS_BUSINESS_CITY 0xDD29 +#define MTP_PROPERTY_POSTAL_ADDRESS_BUSINESS_REGION 0xDD2A +#define MTP_PROPERTY_POSTAL_ADDRESS_BUSINESS_POSTAL_CODE 0xDD2B +#define MTP_PROPERTY_POSTAL_ADDRESS_BUSINESS_COUNTRY 0xDD2C +#define MTP_PROPERTY_POSTAL_ADDRESS_OTHER_FULL 0xDD2D +#define MTP_PROPERTY_POSTAL_ADDRESS_OTHER_LINE_1 0xDD2E +#define MTP_PROPERTY_POSTAL_ADDRESS_OTHER_LINE_2 0xDD2F +#define MTP_PROPERTY_POSTAL_ADDRESS_OTHER_CITY 0xDD30 +#define MTP_PROPERTY_POSTAL_ADDRESS_OTHER_REGION 0xDD31 +#define MTP_PROPERTY_POSTAL_ADDRESS_OTHER_POSTAL_CODE 0xDD32 +#define MTP_PROPERTY_POSTAL_ADDRESS_OTHER_COUNTRY 0xDD33 +#define MTP_PROPERTY_ORGANIZATION_NAME 0xDD34 +#define MTP_PROPERTY_PHONETIC_ORGANIZATION_NAME 0xDD35 +#define MTP_PROPERTY_ROLE 0xDD36 +#define MTP_PROPERTY_BIRTHDATE 0xDD37 +#define MTP_PROPERTY_MESSAGE_TO 0xDD40 +#define MTP_PROPERTY_MESSAGE_CC 0xDD41 +#define MTP_PROPERTY_MESSAGE_BCC 0xDD42 +#define MTP_PROPERTY_MESSAGE_READ 0xDD43 +#define MTP_PROPERTY_MESSAGE_RECEIVED_TIME 0xDD44 +#define MTP_PROPERTY_MESSAGE_SENDER 0xDD45 +#define MTP_PROPERTY_ACTIVITY_BEGIN_TIME 0xDD50 +#define MTP_PROPERTY_ACTIVITY_END_TIME 0xDD51 +#define MTP_PROPERTY_ACTIVITY_LOCATION 0xDD52 +#define MTP_PROPERTY_ACTIVITY_REQUIRED_ATTENDEES 0xDD54 +#define MTP_PROPERTY_ACTIVITY_OPTIONAL_ATTENDEES 0xDD55 +#define MTP_PROPERTY_ACTIVITY_RESOURCES 0xDD56 +#define MTP_PROPERTY_ACTIVITY_ACCEPTED 0xDD57 +#define MTP_PROPERTY_ACTIVITY_TENTATIVE 0xDD58 +#define MTP_PROPERTY_ACTIVITY_DECLINED 0xDD59 +#define MTP_PROPERTY_ACTIVITY_REMAINDER_TIME 0xDD5A +#define MTP_PROPERTY_ACTIVITY_OWNER 0xDD5B +#define MTP_PROPERTY_ACTIVITY_STATUS 0xDD5C +#define MTP_PROPERTY_OWNER 0xDD5D +#define MTP_PROPERTY_EDITOR 0xDD5E +#define MTP_PROPERTY_WEBMASTER 0xDD5F +#define MTP_PROPERTY_URL_SOURCE 0xDD60 +#define MTP_PROPERTY_URL_DESTINATION 0xDD61 +#define MTP_PROPERTY_TIME_BOOKMARK 0xDD62 +#define MTP_PROPERTY_OBJECT_BOOKMARK 0xDD63 +#define MTP_PROPERTY_BYTE_BOOKMARK 0xDD64 +#define MTP_PROPERTY_LAST_BUILD_DATE 0xDD70 +#define MTP_PROPERTY_TIME_TO_LIVE 0xDD71 +#define MTP_PROPERTY_MEDIA_GUID 0xDD72 + +// MTP Device Property Codes +#define MTP_DEVICE_PROPERTY_UNDEFINED 0x5000 +#define MTP_DEVICE_PROPERTY_BATTERY_LEVEL 0x5001 +#define MTP_DEVICE_PROPERTY_FUNCTIONAL_MODE 0x5002 +#define MTP_DEVICE_PROPERTY_IMAGE_SIZE 0x5003 +#define MTP_DEVICE_PROPERTY_COMPRESSION_SETTING 0x5004 +#define MTP_DEVICE_PROPERTY_WHITE_BALANCE 0x5005 +#define MTP_DEVICE_PROPERTY_RGB_GAIN 0x5006 +#define MTP_DEVICE_PROPERTY_F_NUMBER 0x5007 +#define MTP_DEVICE_PROPERTY_FOCAL_LENGTH 0x5008 +#define MTP_DEVICE_PROPERTY_FOCUS_DISTANCE 0x5009 +#define MTP_DEVICE_PROPERTY_FOCUS_MODE 0x500A +#define MTP_DEVICE_PROPERTY_EXPOSURE_METERING_MODE 0x500B +#define MTP_DEVICE_PROPERTY_FLASH_MODE 0x500C +#define MTP_DEVICE_PROPERTY_EXPOSURE_TIME 0x500D +#define MTP_DEVICE_PROPERTY_EXPOSURE_PROGRAM_MODE 0x500E +#define MTP_DEVICE_PROPERTY_EXPOSURE_INDEX 0x500F +#define MTP_DEVICE_PROPERTY_EXPOSURE_BIAS_COMPENSATION 0x5010 +#define MTP_DEVICE_PROPERTY_DATETIME 0x5011 +#define MTP_DEVICE_PROPERTY_CAPTURE_DELAY 0x5012 +#define MTP_DEVICE_PROPERTY_STILL_CAPTURE_MODE 0x5013 +#define MTP_DEVICE_PROPERTY_CONTRAST 0x5014 +#define MTP_DEVICE_PROPERTY_SHARPNESS 0x5015 +#define MTP_DEVICE_PROPERTY_DIGITAL_ZOOM 0x5016 +#define MTP_DEVICE_PROPERTY_EFFECT_MODE 0x5017 +#define MTP_DEVICE_PROPERTY_BURST_NUMBER 0x5018 +#define MTP_DEVICE_PROPERTY_BURST_INTERVAL 0x5019 +#define MTP_DEVICE_PROPERTY_TIMELAPSE_NUMBER 0x501A +#define MTP_DEVICE_PROPERTY_TIMELAPSE_INTERVAL 0x501B +#define MTP_DEVICE_PROPERTY_FOCUS_METERING_MODE 0x501C +#define MTP_DEVICE_PROPERTY_UPLOAD_URL 0x501D +#define MTP_DEVICE_PROPERTY_ARTIST 0x501E +#define MTP_DEVICE_PROPERTY_COPYRIGHT_INFO 0x501F +#define MTP_DEVICE_PROPERTY_SYNCHRONIZATION_PARTNER 0xD401 +#define MTP_DEVICE_PROPERTY_DEVICE_FRIENDLY_NAME 0xD402 +#define MTP_DEVICE_PROPERTY_VOLUME 0xD403 +#define MTP_DEVICE_PROPERTY_SUPPORTED_FORMATS_ORDERED 0xD404 +#define MTP_DEVICE_PROPERTY_DEVICE_ICON 0xD405 +#define MTP_DEVICE_PROPERTY_PLAYBACK_RATE 0xD410 +#define MTP_DEVICE_PROPERTY_PLAYBACK_OBJECT 0xD411 +#define MTP_DEVICE_PROPERTY_PLAYBACK_CONTAINER_INDEX 0xD412 +#define MTP_DEVICE_PROPERTY_SESSION_INITIATOR_VERSION_INFO 0xD406 +#define MTP_DEVICE_PROPERTY_PERCEIVED_DEVICE_TYPE 0xD407 + +// MTP Operation Codes +#define MTP_OPERATION_GET_DEVICE_INFO 0x1001 +#define MTP_OPERATION_OPEN_SESSION 0x1002 +#define MTP_OPERATION_CLOSE_SESSION 0x1003 +#define MTP_OPERATION_GET_STORAGE_IDS 0x1004 +#define MTP_OPERATION_GET_STORAGE_INFO 0x1005 +#define MTP_OPERATION_GET_NUM_OBJECTS 0x1006 +#define MTP_OPERATION_GET_OBJECT_HANDLES 0x1007 +#define MTP_OPERATION_GET_OBJECT_INFO 0x1008 +#define MTP_OPERATION_GET_OBJECT 0x1009 +#define MTP_OPERATION_GET_THUMB 0x100A +#define MTP_OPERATION_DELETE_OBJECT 0x100B +#define MTP_OPERATION_SEND_OBJECT_INFO 0x100C +#define MTP_OPERATION_SEND_OBJECT 0x100D +#define MTP_OPERATION_INITIATE_CAPTURE 0x100E +#define MTP_OPERATION_FORMAT_STORE 0x100F +#define MTP_OPERATION_RESET_DEVICE 0x1010 +#define MTP_OPERATION_SELF_TEST 0x1011 +#define MTP_OPERATION_SET_OBJECT_PROTECTION 0x1012 +#define MTP_OPERATION_POWER_DOWN 0x1013 +#define MTP_OPERATION_GET_DEVICE_PROP_DESC 0x1014 +#define MTP_OPERATION_GET_DEVICE_PROP_VALUE 0x1015 +#define MTP_OPERATION_SET_DEVICE_PROP_VALUE 0x1016 +#define MTP_OPERATION_RESET_DEVICE_PROP_VALUE 0x1017 +#define MTP_OPERATION_TERMINATE_OPEN_CAPTURE 0x1018 +#define MTP_OPERATION_MOVE_OBJECT 0x1019 +#define MTP_OPERATION_COPY_OBJECT 0x101A +#define MTP_OPERATION_GET_PARTIAL_OBJECT 0x101B +#define MTP_OPERATION_INITIATE_OPEN_CAPTURE 0x101C +#define MTP_OPERATION_GET_OBJECT_PROPS_SUPPORTED 0x9801 +#define MTP_OPERATION_GET_OBJECT_PROP_DESC 0x9802 +#define MTP_OPERATION_GET_OBJECT_PROP_VALUE 0x9803 +#define MTP_OPERATION_SET_OBJECT_PROP_VALUE 0x9804 +#define MTP_OPERATION_GET_OBJECT_PROP_LIST 0x9805 +#define MTP_OPERATION_SET_OBJECT_PROP_LIST 0x9806 +#define MTP_OPERATION_GET_INTERDEPENDENT_PROP_DESC 0x9807 +#define MTP_OPERATION_SEND_OBJECT_PROP_LIST 0x9808 +#define MTP_OPERATION_GET_OBJECT_REFERENCES 0x9810 +#define MTP_OPERATION_SET_OBJECT_REFERENCES 0x9811 +#define MTP_OPERATION_SKIP 0x9820 + +// Android extensions for direct file IO + +// Same as GetPartialObject, but with 64 bit offset +#define MTP_OPERATION_GET_PARTIAL_OBJECT_64 0x95C1 +// Same as GetPartialObject64, but copying host to device +#define MTP_OPERATION_SEND_PARTIAL_OBJECT 0x95C2 +// Truncates file to 64 bit length +#define MTP_OPERATION_TRUNCATE_OBJECT 0x95C3 +// Must be called before using SendPartialObject and TruncateObject +#define MTP_OPERATION_BEGIN_EDIT_OBJECT 0x95C4 +// Called to commit changes made by SendPartialObject and TruncateObject +#define MTP_OPERATION_END_EDIT_OBJECT 0x95C5 + +// MTP Response Codes +#define MTP_RESPONSE_UNDEFINED 0x2000 +#define MTP_RESPONSE_OK 0x2001 +#define MTP_RESPONSE_GENERAL_ERROR 0x2002 +#define MTP_RESPONSE_SESSION_NOT_OPEN 0x2003 +#define MTP_RESPONSE_INVALID_TRANSACTION_ID 0x2004 +#define MTP_RESPONSE_OPERATION_NOT_SUPPORTED 0x2005 +#define MTP_RESPONSE_PARAMETER_NOT_SUPPORTED 0x2006 +#define MTP_RESPONSE_INCOMPLETE_TRANSFER 0x2007 +#define MTP_RESPONSE_INVALID_STORAGE_ID 0x2008 +#define MTP_RESPONSE_INVALID_OBJECT_HANDLE 0x2009 +#define MTP_RESPONSE_DEVICE_PROP_NOT_SUPPORTED 0x200A +#define MTP_RESPONSE_INVALID_OBJECT_FORMAT_CODE 0x200B +#define MTP_RESPONSE_STORAGE_FULL 0x200C +#define MTP_RESPONSE_OBJECT_WRITE_PROTECTED 0x200D +#define MTP_RESPONSE_STORE_READ_ONLY 0x200E +#define MTP_RESPONSE_ACCESS_DENIED 0x200F +#define MTP_RESPONSE_NO_THUMBNAIL_PRESENT 0x2010 +#define MTP_RESPONSE_SELF_TEST_FAILED 0x2011 +#define MTP_RESPONSE_PARTIAL_DELETION 0x2012 +#define MTP_RESPONSE_STORE_NOT_AVAILABLE 0x2013 +#define MTP_RESPONSE_SPECIFICATION_BY_FORMAT_UNSUPPORTED 0x2014 +#define MTP_RESPONSE_NO_VALID_OBJECT_INFO 0x2015 +#define MTP_RESPONSE_INVALID_CODE_FORMAT 0x2016 +#define MTP_RESPONSE_UNKNOWN_VENDOR_CODE 0x2017 +#define MTP_RESPONSE_CAPTURE_ALREADY_TERMINATED 0x2018 +#define MTP_RESPONSE_DEVICE_BUSY 0x2019 +#define MTP_RESPONSE_INVALID_PARENT_OBJECT 0x201A +#define MTP_RESPONSE_INVALID_DEVICE_PROP_FORMAT 0x201B +#define MTP_RESPONSE_INVALID_DEVICE_PROP_VALUE 0x201C +#define MTP_RESPONSE_INVALID_PARAMETER 0x201D +#define MTP_RESPONSE_SESSION_ALREADY_OPEN 0x201E +#define MTP_RESPONSE_TRANSACTION_CANCELLED 0x201F +#define MTP_RESPONSE_SPECIFICATION_OF_DESTINATION_UNSUPPORTED 0x2020 +#define MTP_RESPONSE_INVALID_OBJECT_PROP_CODE 0xA801 +#define MTP_RESPONSE_INVALID_OBJECT_PROP_FORMAT 0xA802 +#define MTP_RESPONSE_INVALID_OBJECT_PROP_VALUE 0xA803 +#define MTP_RESPONSE_INVALID_OBJECT_REFERENCE 0xA804 +#define MTP_RESPONSE_GROUP_NOT_SUPPORTED 0xA805 +#define MTP_RESPONSE_INVALID_DATASET 0xA806 +#define MTP_RESPONSE_SPECIFICATION_BY_GROUP_UNSUPPORTED 0xA807 +#define MTP_RESPONSE_SPECIFICATION_BY_DEPTH_UNSUPPORTED 0xA808 +#define MTP_RESPONSE_OBJECT_TOO_LARGE 0xA809 +#define MTP_RESPONSE_OBJECT_PROP_NOT_SUPPORTED 0xA80A +#define MTP_RESPONSE_NO_RESPONSE 0xFFFF + +// MTP Event Codes +#define MTP_EVENT_UNDEFINED 0x4000 +#define MTP_EVENT_CANCEL_TRANSACTION 0x4001 +#define MTP_EVENT_OBJECT_ADDED 0x4002 +#define MTP_EVENT_OBJECT_REMOVED 0x4003 +#define MTP_EVENT_STORE_ADDED 0x4004 +#define MTP_EVENT_STORE_REMOVED 0x4005 +#define MTP_EVENT_DEVICE_PROP_CHANGED 0x4006 +#define MTP_EVENT_OBJECT_INFO_CHANGED 0x4007 +#define MTP_EVENT_DEVICE_INFO_CHANGED 0x4008 +#define MTP_EVENT_REQUEST_OBJECT_TRANSFER 0x4009 +#define MTP_EVENT_STORE_FULL 0x400A +#define MTP_EVENT_DEVICE_RESET 0x400B +#define MTP_EVENT_STORAGE_INFO_CHANGED 0x400C +#define MTP_EVENT_CAPTURE_COMPLETE 0x400D +#define MTP_EVENT_UNREPORTED_STATUS 0x400E +#define MTP_EVENT_OBJECT_PROP_CHANGED 0xC801 +#define MTP_EVENT_OBJECT_PROP_DESC_CHANGED 0xC802 +#define MTP_EVENT_OBJECT_REFERENCES_CHANGED 0xC803 + +// Storage Type +#define MTP_STORAGE_FIXED_ROM 0x0001 +#define MTP_STORAGE_REMOVABLE_ROM 0x0002 +#define MTP_STORAGE_FIXED_RAM 0x0003 +#define MTP_STORAGE_REMOVABLE_RAM 0x0004 + +// Storage File System +#define MTP_STORAGE_FILESYSTEM_FLAT 0x0001 +#define MTP_STORAGE_FILESYSTEM_HIERARCHICAL 0x0002 +#define MTP_STORAGE_FILESYSTEM_DCF 0x0003 + +// Storage Access Capability +#define MTP_STORAGE_READ_WRITE 0x0000 +#define MTP_STORAGE_READ_ONLY_WITHOUT_DELETE 0x0001 +#define MTP_STORAGE_READ_ONLY_WITH_DELETE 0x0002 + +// Association Type +#define MTP_ASSOCIATION_TYPE_UNDEFINED 0x0000 +#define MTP_ASSOCIATION_TYPE_GENERIC_FOLDER 0x0001 + +// MTP class reqeusts +#define MTP_REQUEST_CANCEL 0x64 +#define MTP_REQUEST_GET_EXT_EVENT_DATA 0x65 +#define MTP_REQUEST_RESET 0x66 +#define MTP_REQUEST_GET_DEVICE_STATUS 0x67 +// clang-format on + +#define USB_MTP_CLASS 0x06 + +#define USB_MTP_SUB_CLASS 0x01U +#define USB_MTP_PROTOCOL 0x01U + +struct mtp_header { + uint32_t conlen; + uint16_t contype; + uint16_t code; + uint32_t trans_id; + uint32_t param[]; +}; + +struct mtp_string { + uint8_t len; + uint16_t string[255]; +}; + +struct mtp_device_info { + uint16_t StandardVersion; + uint32_t VendorExtensionID; + uint16_t VendorExtensionVersion; + uint8_t VendorExtensionDesc_len; + uint16_t VendorExtensionDesc[255]; + uint16_t FunctionalMode; + uint32_t OperationsSupported_len; + uint16_t OperationsSupported[255]; + uint32_t EventsSupported_len; + uint16_t EventsSupported[255]; + uint32_t DevicePropertiesSupported_len; + uint16_t DevicePropertiesSupported[255]; + uint32_t CaptureFormats_len; + uint16_t CaptureFormats[255]; + uint32_t ImageFormats_len; + uint16_t ImageFormats[255]; + uint8_t Manufacturer_len; + uint16_t Manufacturer[255]; + uint8_t Model_len; + uint16_t Model[255]; + uint8_t DeviceVersion_len; + uint16_t DeviceVersion[255]; + uint8_t SerialNumber_len; + uint16_t SerialNumber[255]; +} __PACKED; + +struct mtp_object_props_support { + uint32_t ObjectPropCode_len; + uint16_t ObjectPropCode[255]; +} __PACKED; + +struct mtp_device_prop_desc { + uint16_t DevicePropertyCode; + uint16_t DataType; + uint8_t GetSet; + uint16_t DefaultValue[1]; + uint16_t CurrentValue[1]; + uint8_t FormFlag; +} __PACKED; + +struct mtp_storage_id { + uint32_t StorageIDS_len; + uint32_t StorageIDS[255]; +} __PACKED; + +struct mtp_storage_info { + uint16_t StorageType; + uint16_t FilesystemType; + uint16_t AccessCapability; + uint64_t MaxCapability; + uint64_t FreeSpaceInBytes; + uint32_t FreeSpaceInObjects; + uint8_t StorageDescription_len; + uint8_t StorageDescription[255]; + uint8_t VolumeIdentifier_len; + uint8_t VolumeIdentifier[255]; +} __PACKED; + +struct mtp_object_handles { + uint32_t ObjectHandle_len; + uint32_t ObjectHandle[255]; +} __PACKED; + +struct mtp_object_prop_desc { + uint16_t ObjectPropertyCode; + uint16_t DataType; + uint8_t GetSet; + uint8_t DefValue[16]; + uint32_t GroupCode; + uint8_t FormFlag; +} __PACKED; + +struct mtp_object_prop_element { + uint32_t ObjectHandle; + uint16_t PropertyCode; + uint16_t Datatype; + uint8_t value[8]; +} __PACKED; + +struct mtp_object_prop_list { + uint32_t element_len; + struct mtp_object_prop_element element[1]; +} __PACKED; + +struct mtp_object_info { + uint32_t StorageId; + uint16_t ObjectFormat; + uint16_t ProtectionStatus; + uint32_t ObjectCompressedSize; + uint16_t ThumbFormat; + uint32_t ThumbCompressedSize; + uint32_t ThumbPixWidth; + uint32_t ThumbPixHeight; + uint32_t ImagePixWidth; + uint32_t ImagePixHeight; + uint32_t ImageBitDepth; + uint32_t ParentObject; + uint16_t AssociationType; + uint32_t AssociationDesc; + uint32_t SequenceNumber; + uint8_t Filename_len; + uint16_t Filename[CONFIG_USBDEV_MTP_MAX_PATHNAME]; + uint8_t CaptureDate[6]; + uint8_t ModificationDate[6]; +} __PACKED; + +struct mtp_object { + uint32_t storage_id; + uint32_t handle; + uint32_t parent_handle; + uint16_t format; + bool is_dir; + bool is_readonly; + bool is_hidden; + uint32_t file_size; + uint32_t file_full_name_length; + char file_full_name[CONFIG_USBDEV_MTP_MAX_PATHNAME]; + bool in_use; +}; + +/*Length of template descriptor: 23 bytes*/ +#define MTP_DESCRIPTOR_LEN (9 + 7 + 7 + 7) + +// clang-format off +#define MTP_DESCRIPTOR_INIT(bFirstInterface, out_ep, in_ep, int_ep, wMaxPacketSize, str_idx) \ + /* Interface */ \ + 0x09, /* bLength */ \ + USB_DESCRIPTOR_TYPE_INTERFACE, /* bDescriptorType */ \ + bFirstInterface, /* bInterfaceNumber */ \ + 0x00, /* bAlternateSetting */ \ + 0x03, /* bNumEndpoints */ \ + USB_DEVICE_CLASS_IMAGE, /* bInterfaceClass */ \ + USB_MTP_SUB_CLASS, /* bInterfaceSubClass */ \ + USB_MTP_PROTOCOL, /* bInterfaceProtocol */ \ + str_idx, /* iInterface */ \ + 0x07, /* bLength */ \ + USB_DESCRIPTOR_TYPE_ENDPOINT, /* bDescriptorType */ \ + out_ep, /* bEndpointAddress */ \ + 0x02, /* bmAttributes */ \ + WBVAL(wMaxPacketSize), /* wMaxPacketSize */ \ + 0x00, /* bInterval */ \ + 0x07, /* bLength */ \ + USB_DESCRIPTOR_TYPE_ENDPOINT, /* bDescriptorType */ \ + in_ep, /* bEndpointAddress */ \ + 0x02, /* bmAttributes */ \ + WBVAL(wMaxPacketSize), /* wMaxPacketSize */ \ + 0x00, /* bInterval */ \ + 0x07, /* bLength */ \ + USB_DESCRIPTOR_TYPE_ENDPOINT, /* bDescriptorType */ \ + int_ep, /* bEndpointAddress */ \ + 0x03, /* bmAttributes */ \ + 0x1c, /* wMaxPacketSize */ \ + 0x00, /* bInterval */ \ + 0x06 /* bLength */ +// clang-format on + +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/class/mtp/usbd_mtp.h b/components/drivers/usb/cherryusb/class/mtp/usbd_mtp.h new file mode 100644 index 00000000000..a189d524beb --- /dev/null +++ b/components/drivers/usb/cherryusb/class/mtp/usbd_mtp.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2025, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USBD_MTP_H +#define USBD_MTP_H + +#include "usb_mtp.h" +#include +#include + +/* gcc toolchain does not implement dirent.h, so we define our own MTP_DIR and mtp_dirent */ + +typedef void MTP_DIR; + +struct mtp_statfs { + size_t f_bsize; /* block size */ + size_t f_blocks; /* total data blocks in file system */ + size_t f_bfree; /* free blocks in file system */ +}; + +struct mtp_dirent { + uint8_t d_type; /* The type of the file */ + uint8_t d_namlen; /* The length of the not including the terminating null file name */ + uint16_t d_reclen; /* length of this record */ + char d_name[CONFIG_USBDEV_MTP_MAX_PATHNAME]; /* The null-terminated file name */ +}; + +#ifdef __cplusplus +extern "C" { +#endif + +struct usbd_interface *usbd_mtp_init_intf(struct usbd_interface *intf, + const uint8_t out_ep, + const uint8_t in_ep, + const uint8_t int_ep); + +const char *usbd_mtp_fs_root_path(void); +const char *usbd_mtp_fs_description(void); + +int usbd_mtp_mkdir(const char *path); +int usbd_mtp_rmdir(const char *path); +MTP_DIR *usbd_mtp_opendir(const char *name); +int usbd_mtp_closedir(MTP_DIR *d); +struct mtp_dirent *usbd_mtp_readdir(MTP_DIR *d); + +int usbd_mtp_statfs(const char *path, struct mtp_statfs *buf); +int usbd_mtp_stat(const char *file, struct stat *buf); + +int usbd_mtp_open(const char *path, uint8_t mode); +int usbd_mtp_close(int fd); +int usbd_mtp_read(int fd, void *buf, size_t len); +int usbd_mtp_write(int fd, const void *buf, size_t len); + +int usbd_mtp_unlink(const char *path); + +#ifdef __cplusplus +} +#endif + +#endif /* USBD_MTP_H */ diff --git a/components/drivers/usb/cherryusb/class/mtp/usbd_mtp_support.h b/components/drivers/usb/cherryusb/class/mtp/usbd_mtp_support.h new file mode 100644 index 00000000000..9281ec39855 --- /dev/null +++ b/components/drivers/usb/cherryusb/class/mtp/usbd_mtp_support.h @@ -0,0 +1,312 @@ +/* + * Copyright (c) 2025, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USBD_MTP_SUPPORT_H +#define USBD_MTP_SUPPORT_H + +#define MTP_VERSION 100 + +typedef struct _profile_property { + uint16_t prop_code; + uint16_t data_type; + uint8_t getset; + uint64_t default_value; + uint32_t group_code; + uint8_t form_flag; + uint16_t format_code; +} profile_property; + +typedef struct _format_property { + uint16_t format_code; + uint16_t *properties; +} formats_property; + +const char mtp_extension_string[] = "microsoft.com: 1.0; android.com: 1.0;"; + +const uint16_t supported_op[] = { + MTP_OPERATION_GET_DEVICE_INFO, //0x1001 + MTP_OPERATION_OPEN_SESSION, //0x1002 + MTP_OPERATION_CLOSE_SESSION, //0x1003 + MTP_OPERATION_GET_STORAGE_IDS, //0x1004 + MTP_OPERATION_GET_STORAGE_INFO, //0x1005 + //MTP_OPERATION_GET_NUM_OBJECTS ,//0x1006 + MTP_OPERATION_GET_OBJECT_HANDLES, //0x1007 + MTP_OPERATION_GET_OBJECT_INFO, //0x1008 + MTP_OPERATION_GET_OBJECT, //0x1009 + //MTP_OPERATION_GET_THUMB ,//0x100A + MTP_OPERATION_DELETE_OBJECT, //0x100B + MTP_OPERATION_SEND_OBJECT_INFO, //0x100C + MTP_OPERATION_SEND_OBJECT, //0x100D + MTP_OPERATION_GET_DEVICE_PROP_DESC, //0x1014 + // MTP_OPERATION_GET_DEVICE_PROP_VALUE ,//0x1015 + // MTP_OPERATION_SET_DEVICE_PROP_VALUE ,//0x1016 + //MTP_OPERATION_RESET_DEVICE_PROP_VALUE ,//0x1017 + // MTP_OPERATION_GET_PARTIAL_OBJECT ,//0x101B + MTP_OPERATION_GET_OBJECT_PROPS_SUPPORTED, //0x9801 + // MTP_OPERATION_GET_OBJECT_PROP_DESC, //0x9802 + // MTP_OPERATION_GET_OBJECT_PROP_VALUE ,//0x9803 + // MTP_OPERATION_SET_OBJECT_PROP_VALUE ,//0x9804 + // MTP_OPERATION_GET_OBJECT_PROP_LIST ,//0x9805 + //MTP_OPERATION_GET_OBJECT_REFERENCES ,//0x9810 + //MTP_OPERATION_SET_OBJECT_REFERENCES ,//0x9811 + // MTP_OPERATION_GET_PARTIAL_OBJECT_64 ,//0x95C1 + // MTP_OPERATION_SEND_PARTIAL_OBJECT ,//0x95C2 + // MTP_OPERATION_TRUNCATE_OBJECT ,//0x95C3 + // MTP_OPERATION_BEGIN_EDIT_OBJECT ,//0x95C4 + // MTP_OPERATION_END_EDIT_OBJECT //0x95C5 +}; + +int supported_op_size = sizeof(supported_op); + +const uint16_t supported_event[] = { + MTP_EVENT_OBJECT_ADDED, // 0x4002 + MTP_EVENT_OBJECT_REMOVED, // 0x4003 + MTP_EVENT_STORE_ADDED, // 0x4004 + MTP_EVENT_STORE_REMOVED, // 0x4005 + MTP_EVENT_STORAGE_INFO_CHANGED, // 0x400C + MTP_EVENT_OBJECT_INFO_CHANGED, // 0x4007 + MTP_EVENT_DEVICE_PROP_CHANGED, // 0x4006 + MTP_EVENT_OBJECT_PROP_CHANGED // 0xC801 +}; + +int supported_event_size = sizeof(supported_event); + +const formats_property support_format_properties[] = { + // format code prop code + { MTP_FORMAT_UNDEFINED, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF } }, + { MTP_FORMAT_ASSOCIATION, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF } } +#if 0 + { MTP_FORMAT_TEXT , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_HTML , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_MP4_CONTAINER, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_3GP_CONTAINER, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_WAV , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED,MTP_PROPERTY_ARTIST,MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_ALBUM_ARTIST, MTP_PROPERTY_TRACK, MTP_PROPERTY_ORIGINAL_RELEASE_DATE, MTP_PROPERTY_GENRE, MTP_PROPERTY_COMPOSER, + MTP_PROPERTY_AUDIO_WAVE_CODEC, MTP_PROPERTY_BITRATE_TYPE, MTP_PROPERTY_AUDIO_BITRATE, MTP_PROPERTY_NUMBER_OF_CHANNELS,MTP_PROPERTY_SAMPLE_RATE, + 0xFFFF} + }, + { MTP_FORMAT_MP3 , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED,MTP_PROPERTY_ARTIST,MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_ALBUM_ARTIST, MTP_PROPERTY_TRACK, MTP_PROPERTY_ORIGINAL_RELEASE_DATE, MTP_PROPERTY_GENRE, MTP_PROPERTY_COMPOSER, + MTP_PROPERTY_AUDIO_WAVE_CODEC, MTP_PROPERTY_BITRATE_TYPE, MTP_PROPERTY_AUDIO_BITRATE, MTP_PROPERTY_NUMBER_OF_CHANNELS,MTP_PROPERTY_SAMPLE_RATE, + 0xFFFF} + }, + { MTP_FORMAT_MPEG , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_EXIF_JPEG , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, + MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_BMP , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, + MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_GIF , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, + MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_JFIF , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, + MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_WMA , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_ALBUM_ARTIST, MTP_PROPERTY_TRACK, MTP_PROPERTY_ORIGINAL_RELEASE_DATE, MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, + MTP_PROPERTY_GENRE, MTP_PROPERTY_COMPOSER, MTP_PROPERTY_AUDIO_WAVE_CODEC, MTP_PROPERTY_BITRATE_TYPE, MTP_PROPERTY_AUDIO_BITRATE, + MTP_PROPERTY_NUMBER_OF_CHANNELS, MTP_PROPERTY_SAMPLE_RATE, + 0xFFFF} + }, + { MTP_FORMAT_OGG , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_ALBUM_ARTIST, MTP_PROPERTY_TRACK, MTP_PROPERTY_ORIGINAL_RELEASE_DATE, MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, + MTP_PROPERTY_GENRE, MTP_PROPERTY_COMPOSER, MTP_PROPERTY_AUDIO_WAVE_CODEC, MTP_PROPERTY_BITRATE_TYPE, MTP_PROPERTY_AUDIO_BITRATE, + MTP_PROPERTY_NUMBER_OF_CHANNELS, MTP_PROPERTY_SAMPLE_RATE, + 0xFFFF} + }, + { MTP_FORMAT_AAC , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_ALBUM_ARTIST, MTP_PROPERTY_TRACK, MTP_PROPERTY_ORIGINAL_RELEASE_DATE, MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, + MTP_PROPERTY_GENRE, MTP_PROPERTY_COMPOSER, MTP_PROPERTY_AUDIO_WAVE_CODEC, MTP_PROPERTY_BITRATE_TYPE, MTP_PROPERTY_AUDIO_BITRATE, + MTP_PROPERTY_NUMBER_OF_CHANNELS, MTP_PROPERTY_SAMPLE_RATE, + 0xFFFF} + }, + { MTP_FORMAT_ABSTRACT_AV_PLAYLIST, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_WPL_PLAYLIST, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_M3U_PLAYLIST, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_PLS_PLAYLIST, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_XML_DOCUMENT, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_FLAC , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_AVI , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_ASF , (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, MTP_PROPERTY_ARTIST, MTP_PROPERTY_ALBUM_NAME, + MTP_PROPERTY_DURATION, MTP_PROPERTY_DESCRIPTION, MTP_PROPERTY_WIDTH, MTP_PROPERTY_HEIGHT, MTP_PROPERTY_DATE_AUTHORED, + 0xFFFF} + }, + { MTP_FORMAT_MS_WORD_DOCUMENT, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_MS_EXCEL_SPREADSHEET, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + }, + { MTP_FORMAT_MS_POWERPOINT_PRESENTATION, (uint16_t[]){ MTP_PROPERTY_STORAGE_ID, MTP_PROPERTY_OBJECT_FORMAT, MTP_PROPERTY_PROTECTION_STATUS, MTP_PROPERTY_OBJECT_SIZE, + MTP_PROPERTY_OBJECT_FILE_NAME, MTP_PROPERTY_DATE_MODIFIED, MTP_PROPERTY_PARENT_OBJECT, MTP_PROPERTY_PERSISTENT_UID, + MTP_PROPERTY_NAME, MTP_PROPERTY_DISPLAY_NAME, MTP_PROPERTY_DATE_CREATED, + 0xFFFF} + } +#endif + , + + { 0xFFFF, (uint16_t[]){ 0xFFFF } } + +}; + +const profile_property support_object_properties[] = { + // prop_code data_type getset default_value group_code form_flag format_code + { MTP_PROPERTY_STORAGE_ID, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000001, 0x00, 0xFFFF }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_UNDEFINED, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_ASSOCIATION, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_TEXT, 0x000000000, 0x00, MTP_FORMAT_TEXT }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_HTML, 0x000000000, 0x00, MTP_FORMAT_HTML }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_WAV, 0x000000000, 0x00, MTP_FORMAT_WAV }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_MP3, 0x000000000, 0x00, MTP_FORMAT_MP3 }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_MPEG, 0x000000000, 0x00, MTP_FORMAT_MPEG }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_EXIF_JPEG, 0x000000000, 0x00, MTP_FORMAT_EXIF_JPEG }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_BMP, 0x000000000, 0x00, MTP_FORMAT_BMP }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_AIFF, 0x000000000, 0x00, MTP_FORMAT_AIFF }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_MPEG, 0x000000000, 0x00, MTP_FORMAT_MPEG }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_WMA, 0x000000000, 0x00, MTP_FORMAT_WMA }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_OGG, 0x000000000, 0x00, MTP_FORMAT_OGG }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_AAC, 0x000000000, 0x00, MTP_FORMAT_AAC }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_MP4_CONTAINER, 0x000000000, 0x00, MTP_FORMAT_MP4_CONTAINER }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_3GP_CONTAINER, 0x000000000, 0x00, MTP_FORMAT_3GP_CONTAINER }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_ABSTRACT_AV_PLAYLIST, 0x000000000, 0x00, MTP_FORMAT_ABSTRACT_AV_PLAYLIST }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_WPL_PLAYLIST, 0x000000000, 0x00, MTP_FORMAT_WPL_PLAYLIST }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_M3U_PLAYLIST, 0x000000000, 0x00, MTP_FORMAT_M3U_PLAYLIST }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_PLS_PLAYLIST, 0x000000000, 0x00, MTP_FORMAT_PLS_PLAYLIST }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_XML_DOCUMENT, 0x000000000, 0x00, MTP_FORMAT_XML_DOCUMENT }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_FLAC, 0x000000000, 0x00, MTP_FORMAT_FLAC }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_AVI, 0x000000000, 0x00, MTP_FORMAT_AVI }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_ASF, 0x000000000, 0x00, MTP_FORMAT_ASF }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_MS_WORD_DOCUMENT, 0x000000000, 0x00, MTP_FORMAT_MS_WORD_DOCUMENT }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_MS_EXCEL_SPREADSHEET, 0x000000000, 0x00, MTP_FORMAT_MS_EXCEL_SPREADSHEET }, + { MTP_PROPERTY_OBJECT_FORMAT, MTP_TYPE_UINT16, 0x00, MTP_FORMAT_MS_POWERPOINT_PRESENTATION, 0x000000000, 0x00, MTP_FORMAT_MS_POWERPOINT_PRESENTATION }, + + { MTP_PROPERTY_OBJECT_SIZE, MTP_TYPE_UINT64, 0x00, 0x0000000000000000, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_STORAGE_ID, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_PROTECTION_STATUS, MTP_TYPE_UINT16, 0x00, 0x0000, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_DISPLAY_NAME, MTP_TYPE_STR, 0x00, 0x0000, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_OBJECT_FILE_NAME, MTP_TYPE_STR, 0x01, 0x0000, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_DATE_CREATED, MTP_TYPE_STR, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_DATE_MODIFIED, MTP_TYPE_STR, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_PARENT_OBJECT, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_PERSISTENT_UID, MTP_TYPE_UINT128, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + { MTP_PROPERTY_NAME, MTP_TYPE_STR, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_ASSOCIATION }, + + { MTP_PROPERTY_OBJECT_SIZE, MTP_TYPE_UINT64, 0x00, 0x0000000000000000, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_STORAGE_ID, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_PROTECTION_STATUS, MTP_TYPE_UINT16, 0x00, 0x0000, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_DISPLAY_NAME, MTP_TYPE_STR, 0x00, 0x0000, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_OBJECT_FILE_NAME, MTP_TYPE_STR, 0x01, 0x0000, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_DATE_CREATED, MTP_TYPE_STR, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_DATE_MODIFIED, MTP_TYPE_STR, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_PARENT_OBJECT, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_PERSISTENT_UID, MTP_TYPE_UINT128, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + { MTP_PROPERTY_NAME, MTP_TYPE_STR, 0x00, 0x00, 0x000000000, 0x00, MTP_FORMAT_UNDEFINED }, + + //{MTP_PROPERTY_ASSOCIATION_TYPE, MTP_TYPE_UINT16, 0x00, 0x0001 , 0x000000000 , 0x00 , 0xFFFF }, + { MTP_PROPERTY_ASSOCIATION_DESC, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000000, 0x00, 0xFFFF }, + { MTP_PROPERTY_PROTECTION_STATUS, MTP_TYPE_UINT16, 0x00, 0x0000, 0x000000000, 0x00, 0xFFFF }, + { MTP_PROPERTY_HIDDEN, MTP_TYPE_UINT16, 0x00, 0x0000, 0x000000000, 0x00, 0xFFFF }, + + { 0xFFFF, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000000, 0x00 } +}; + +const profile_property support_device_properties[] = { + // prop_code data_type getset default_value group_code form_flag + //{MTP_DEVICE_PROPERTY_SYNCHRONIZATION_PARTNER, MTP_TYPE_UINT32, 0x00, 0x00000000 , 0x000000000 , 0x00 }, + //{MTP_DEVICE_PROPERTY_IMAGE_SIZE, MTP_TYPE_UINT32, 0x00, 0x00000000 , 0x000000000 , 0x00 }, + { MTP_DEVICE_PROPERTY_BATTERY_LEVEL, MTP_TYPE_UINT16, 0x00, 0x00000000, 0x000000000, 0x00 }, + { MTP_DEVICE_PROPERTY_DEVICE_FRIENDLY_NAME, MTP_TYPE_STR, 0x00, 0x00000000, 0x000000000, 0x00 }, + + { 0xFFFF, MTP_TYPE_UINT32, 0x00, 0x00000000, 0x000000000, 0x00 } +}; + +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/class/vendor/net/usbh_asix.c b/components/drivers/usb/cherryusb/class/vendor/net/usbh_asix.c index f4976718293..981c5067995 100644 --- a/components/drivers/usb/cherryusb/class/vendor/net/usbh_asix.c +++ b/components/drivers/usb/cherryusb/class/vendor/net/usbh_asix.c @@ -15,10 +15,11 @@ static struct usbh_asix g_asix_class; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_rx_buffer[CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_tx_buffer[CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_inttx_buffer[16]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_buf[32]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_rx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_tx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_inttx_buffer[USB_ALIGN_UP(16, CONFIG_USB_ALIGN_SIZE)]; + +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_asix_buf[USB_ALIGN_UP(32, CONFIG_USB_ALIGN_SIZE)]; #define ETH_ALEN 6 @@ -73,7 +74,7 @@ static int usbh_asix_read_cmd(struct usbh_asix *asix_class, if (ret < 8) { return ret; } - memcpy(data, g_asix_buf, ret - 8); + memcpy(data, g_asix_buf, MIN(ret - 8, size)); return ret; } @@ -637,6 +638,7 @@ static int usbh_asix_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister ASIX Class:%s\r\n", hport->config.intf[intf].devname); usbh_asix_stop(asix_class); } diff --git a/components/drivers/usb/cherryusb/class/vendor/net/usbh_rtl8152.c b/components/drivers/usb/cherryusb/class/vendor/net/usbh_rtl8152.c index 4913389a225..145a9e7888b 100644 --- a/components/drivers/usb/cherryusb/class/vendor/net/usbh_rtl8152.c +++ b/components/drivers/usb/cherryusb/class/vendor/net/usbh_rtl8152.c @@ -12,10 +12,11 @@ #define DEV_FORMAT "/dev/rtl8152" -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_rx_buffer[CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_tx_buffer[CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_inttx_buffer[2]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_buf[32]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_rx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_tx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_inttx_buffer[USB_ALIGN_UP(2, CONFIG_USB_ALIGN_SIZE)]; + +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rtl8152_buf[USB_ALIGN_UP(32, CONFIG_USB_ALIGN_SIZE)]; static struct usbh_rtl8152 g_rtl8152_class; @@ -964,7 +965,7 @@ static int usbh_rtl8152_read_regs(struct usbh_rtl8152 *rtl8152_class, if (ret < 8) { return ret; } - memcpy(data, g_rtl8152_buf, ret - 8); + memcpy(data, g_rtl8152_buf, MIN(ret - 8, size)); return ret; } @@ -1137,7 +1138,7 @@ static void ocp_write_dword(struct usbh_rtl8152 *tp, uint16_t type, uint16_t ind static uint16_t ocp_read_word(struct usbh_rtl8152 *tp, uint16_t type, uint16_t index) { uint32_t data; - uint32_t tmp; + uint32_t tmp = 0; uint16_t byen = BYTE_EN_WORD; uint8_t shift = index & 2; @@ -1177,7 +1178,7 @@ static void ocp_write_word(struct usbh_rtl8152 *tp, uint16_t type, uint16_t inde static uint8_t ocp_read_byte(struct usbh_rtl8152 *tp, uint16_t type, uint16_t index) { uint32_t data; - uint32_t tmp; + uint32_t tmp = 0; uint8_t shift = index & 3; index &= ~3; @@ -1253,7 +1254,7 @@ static inline int r8152_mdio_read(struct usbh_rtl8152 *tp, uint32_t reg_addr) static uint8_t usbh_rtl8152_get_version(struct usbh_rtl8152 *rtl8152_class) { uint8_t version; - uint32_t temp; + uint32_t temp = 0; uint32_t ocp_data; usbh_rtl8152_read_regs(rtl8152_class, PLA_TCR0, MCU_TYPE_PLA, 4, &temp); @@ -2044,7 +2045,7 @@ static int usbh_rtl8152_connect(struct usbh_hubport *hport, uint8_t intf) rtl8152_class->rtl_ops.up(rtl8152_class); if (rtl8152_class->rx_buf_sz > CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE) { - USB_LOG_ERR("rx_buf_sz is overflow, default is %d\r\n", CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE); + USB_LOG_ERR("rx_buf_sz is overflow, default is %d\r\n", (unsigned int)CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE); return -USB_ERR_NOMEM; } @@ -2120,6 +2121,7 @@ static int usbh_rtl8152_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister rtl8152 Class:%s\r\n", hport->config.intf[intf].devname); usbh_rtl8152_stop(rtl8152_class); } diff --git a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ch34x.c b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ch34x.c index 3bee462db81..3941d47dcb6 100644 --- a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ch34x.c +++ b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ch34x.c @@ -8,7 +8,7 @@ #define DEV_FORMAT "/dev/ttyUSB%d" -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_ch34x_buf[64]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_ch34x_buf[USB_ALIGN_UP(64, CONFIG_USB_ALIGN_SIZE)]; #define CONFIG_USBHOST_MAX_CP210X_CLASS 1 @@ -311,6 +311,7 @@ static int usbh_ch34x_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister CH34X Class:%s\r\n", hport->config.intf[intf].devname); usbh_ch34x_stop(ch34x_class); } diff --git a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_cp210x.c b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_cp210x.c index 6f41b41be37..f58350e6f8f 100644 --- a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_cp210x.c +++ b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_cp210x.c @@ -8,7 +8,7 @@ #define DEV_FORMAT "/dev/ttyUSB%d" -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cp210x_buf[64]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_cp210x_buf[USB_ALIGN_UP(64, CONFIG_USB_ALIGN_SIZE)]; #define CONFIG_USBHOST_MAX_CP210X_CLASS 1 @@ -260,6 +260,7 @@ static int usbh_cp210x_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister CP210X Class:%s\r\n", hport->config.intf[intf].devname); usbh_cp210x_stop(cp210x_class); } diff --git a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.c b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.c index 82defaab7fd..6bc19b20459 100644 --- a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.c +++ b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.c @@ -8,13 +8,32 @@ #define DEV_FORMAT "/dev/ttyUSB%d" -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_ftdi_buf[64]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_ftdi_buf[USB_ALIGN_UP(64, CONFIG_USB_ALIGN_SIZE)]; #define CONFIG_USBHOST_MAX_FTDI_CLASS 1 static struct usbh_ftdi g_ftdi_class[CONFIG_USBHOST_MAX_FTDI_CLASS]; static uint32_t g_devinuse = 0; +static const char *ftdi_chip_name[] = { + [SIO] = "SIO", /* the serial part of FT8U100AX */ + [FT232A] = "FT232A", + [FT232B] = "FT232B", + [FT2232C] = "FT2232C/D", + [FT232R] = "FT232R", + [FT232H] = "FT232H", + [FT2232H] = "FT2232H", + [FT4232H] = "FT4232H", + [FT4232HA] = "FT4232HA", + [FT232HP] = "FT232HP", + [FT233HP] = "FT233HP", + [FT2232HP] = "FT2232HP", + [FT2233HP] = "FT2233HP", + [FT4232HP] = "FT4232HP", + [FT4233HP] = "FT4233HP", + [FTX] = "FT-X", +}; + static struct usbh_ftdi *usbh_ftdi_class_alloc(void) { uint8_t devno; @@ -40,33 +59,72 @@ static void usbh_ftdi_class_free(struct usbh_ftdi *ftdi_class) memset(ftdi_class, 0, sizeof(struct usbh_ftdi)); } -static void usbh_ftdi_caculate_baudrate(uint32_t *itdf_divisor, uint32_t actual_baudrate) +/* + * Divide positive or negative dividend by positive or negative divisor + * and round to closest integer. Result is undefined for negative + * divisors if the dividend variable type is unsigned and for negative + * dividends if the divisor variable type is unsigned. + */ +#define DIV_ROUND_CLOSEST(x, divisor) ( \ + { \ + typeof(x) __x = x; \ + typeof(divisor) __d = divisor; \ + (((typeof(x))-1) > 0 || \ + ((typeof(divisor))-1) > 0 || \ + (((__x) > 0) == ((__d) > 0))) ? \ + (((__x) + ((__d) / 2)) / (__d)) : \ + (((__x) - ((__d) / 2)) / (__d)); \ + }) + +static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, int base) { -#define FTDI_USB_CLK 48000000 - int baudrate; - uint8_t frac[] = { 0, 8, 4, 2, 6, 10, 12, 14 }; - - if (actual_baudrate == 2000000) { - *itdf_divisor = 0x01; - } else if (actual_baudrate == 3000000) { - *itdf_divisor = 0x00; - } else { - baudrate = actual_baudrate; - if (baudrate > 100000 && baudrate < 12000000) { - baudrate = (baudrate / 100000) + 100000; - } - int divisor = FTDI_USB_CLK / baudrate; - int frac_bits = 0; - for (uint8_t i = 0; i < sizeof(frac) / sizeof(frac[0]); i++) { - if ((divisor & 0xF) == frac[i]) { - frac_bits = i; - break; - } - } - divisor >>= 4; - divisor &= 0x3FFF; - *itdf_divisor = (divisor << 14) | (frac_bits << 8); - } + static const unsigned char divfrac[8] = { 0, 3, 2, 4, 1, 5, 6, 7 }; + uint32_t divisor; + /* divisor shifted 3 bits to the left */ + int divisor3 = DIV_ROUND_CLOSEST(base, 2 * baud); + divisor = divisor3 >> 3; + divisor |= (uint32_t)divfrac[divisor3 & 0x7] << 14; + /* Deal with special cases for highest baud rates. */ + if (divisor == 1) /* 1.0 */ + divisor = 0; + else if (divisor == 0x4001) /* 1.5 */ + divisor = 1; + return divisor; +} + +static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) +{ + return ftdi_232bm_baud_base_to_divisor(baud, 48000000); +} + +static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, int base) +{ + static const unsigned char divfrac[8] = { 0, 3, 2, 4, 1, 5, 6, 7 }; + uint32_t divisor; + int divisor3; + + /* hi-speed baud rate is 10-bit sampling instead of 16-bit */ + divisor3 = DIV_ROUND_CLOSEST(8 * base, 10 * baud); + + divisor = divisor3 >> 3; + divisor |= (uint32_t)divfrac[divisor3 & 0x7] << 14; + /* Deal with special cases for highest baud rates. */ + if (divisor == 1) /* 1.0 */ + divisor = 0; + else if (divisor == 0x4001) /* 1.5 */ + divisor = 1; + /* + * Set this bit to turn off a divide by 2.5 on baud rate generator + * This enables baud rates up to 12Mbaud but cannot reach below 1200 + * baud with this bit set + */ + divisor |= 0x00020000; + return divisor; +} + +static uint32_t ftdi_2232h_baud_to_divisor(uint32_t baud) +{ + return ftdi_2232h_baud_base_to_divisor(baud, 120000000); } int usbh_ftdi_reset(struct usbh_ftdi *ftdi_class) @@ -108,7 +166,7 @@ static int usbh_ftdi_set_modem(struct usbh_ftdi *ftdi_class, uint16_t value) static int usbh_ftdi_set_baudrate(struct usbh_ftdi *ftdi_class, uint32_t baudrate) { struct usb_setup_packet *setup; - uint32_t itdf_divisor; + uint32_t div_value; uint16_t value; uint8_t baudrate_high; @@ -117,9 +175,26 @@ static int usbh_ftdi_set_baudrate(struct usbh_ftdi *ftdi_class, uint32_t baudrat } setup = ftdi_class->hport->setup; - usbh_ftdi_caculate_baudrate(&itdf_divisor, baudrate); - value = itdf_divisor & 0xFFFF; - baudrate_high = (itdf_divisor >> 16) & 0xff; + switch (ftdi_class->chip_type) { + case FT232B: + case FT2232C: + case FT232R: + if (baudrate > 3000000) { + return -USB_ERR_INVAL; + } + div_value = ftdi_232bm_baud_to_divisor(baudrate); + break; + default: + if ((baudrate <= 12000000) && (baudrate >= 1200)) { + div_value = ftdi_2232h_baud_to_divisor(baudrate); + } else { + return -USB_ERR_INVAL; + } + break; + } + + value = div_value & 0xFFFF; + baudrate_high = (div_value >> 16) & 0xff; setup->bmRequestType = USB_REQUEST_DIR_OUT | USB_REQUEST_VENDOR | USB_REQUEST_RECIPIENT_DEVICE; setup->bRequest = SIO_SET_BAUDRATE_REQUEST; @@ -220,7 +295,11 @@ static int usbh_ftdi_read_modem_status(struct usbh_ftdi *ftdi_class) int usbh_ftdi_set_line_coding(struct usbh_ftdi *ftdi_class, struct cdc_line_coding *line_coding) { memcpy((uint8_t *)&ftdi_class->line_coding, line_coding, sizeof(struct cdc_line_coding)); - usbh_ftdi_set_baudrate(ftdi_class, line_coding->dwDTERate); + + int ret = usbh_ftdi_set_baudrate(ftdi_class, line_coding->dwDTERate); + if (ret < 0) { + return ret; + } return usbh_ftdi_set_data_format(ftdi_class, line_coding->bDataBits, line_coding->bParityType, line_coding->bCharFormat, 0); } @@ -253,6 +332,7 @@ static int usbh_ftdi_connect(struct usbh_hubport *hport, uint8_t intf) { struct usb_endpoint_descriptor *ep_desc; int ret = 0; + uint16_t version; struct usbh_ftdi *ftdi_class = usbh_ftdi_class_alloc(); if (ftdi_class == NULL) { @@ -265,6 +345,34 @@ static int usbh_ftdi_connect(struct usbh_hubport *hport, uint8_t intf) hport->config.intf[intf].priv = ftdi_class; + version = hport->device_desc.bcdDevice; + + switch (version) { + case 0x400: + ftdi_class->chip_type = FT232B; + case 0x500: + ftdi_class->chip_type = FT2232C; + break; + case 0x600: + ftdi_class->chip_type = FT232R; + break; + case 0x700: + ftdi_class->chip_type = FT2232H; + break; + case 0x800: + ftdi_class->chip_type = FT4232H; + break; + case 0x900: + ftdi_class->chip_type = FT232H; + break; + + default: + USB_LOG_ERR("Unknown FTDI chip version:%04x\r\n", version); + return -USB_ERR_NOTSUPP; + } + + USB_LOG_INFO("FTDI chip name:%s\r\n", ftdi_chip_name[ftdi_class->chip_type]); + usbh_ftdi_reset(ftdi_class); usbh_ftdi_set_flow_ctrl(ftdi_class, SIO_DISABLE_FLOW_CTRL); usbh_ftdi_set_latency_timer(ftdi_class, 0x10); @@ -332,6 +440,7 @@ static int usbh_ftdi_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister FTDI Class:%s\r\n", hport->config.intf[intf].devname); usbh_ftdi_stop(ftdi_class); } diff --git a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.h b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.h index faaf52147f3..855db8d6c61 100644 --- a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.h +++ b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_ftdi.h @@ -39,6 +39,25 @@ #define SIO_RTS_CTS_HS (0x1 << 8) +enum ftdi_chip_type { + SIO, + FT232A, + FT232B, + FT2232C, + FT232R, + FT232H, + FT2232H, + FT4232H, + FT4232HA, + FT232HP, + FT233HP, + FT2232HP, + FT2233HP, + FT4232HP, + FT4233HP, + FTX, +}; + struct usbh_ftdi { struct usbh_hubport *hport; struct usb_endpoint_descriptor *bulkin; /* Bulk IN endpoint */ @@ -51,6 +70,7 @@ struct usbh_ftdi { uint8_t intf; uint8_t minor; uint8_t modem_status[2]; + enum ftdi_chip_type chip_type; void *user_data; }; diff --git a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_pl2303.c b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_pl2303.c index 01ee700fb83..ece32538810 100644 --- a/components/drivers/usb/cherryusb/class/vendor/serial/usbh_pl2303.c +++ b/components/drivers/usb/cherryusb/class/vendor/serial/usbh_pl2303.c @@ -13,7 +13,7 @@ #define DEV_FORMAT "/dev/ttyUSB%d" -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_pl2303_buf[64]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_pl2303_buf[USB_ALIGN_UP(64, CONFIG_USB_ALIGN_SIZE)]; #define CONFIG_USBHOST_MAX_PL2303_CLASS 1 @@ -375,6 +375,7 @@ static int usbh_pl2303_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister PL2303 Class:%s\r\n", hport->config.intf[intf].devname); usbh_pl2303_stop(pl2303_class); } diff --git a/components/drivers/usb/cherryusb/class/vendor/wifi/usbh_bl616.c b/components/drivers/usb/cherryusb/class/vendor/wifi/usbh_bl616.c index 059086bebf8..e44df5bd776 100644 --- a/components/drivers/usb/cherryusb/class/vendor/wifi/usbh_bl616.c +++ b/components/drivers/usb/cherryusb/class/vendor/wifi/usbh_bl616.c @@ -337,6 +337,7 @@ static int usbh_bl616_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister BL616 WIFI Class:%s\r\n", hport->config.intf[intf].devname); usbh_bl616_stop(bl616_class); } diff --git a/components/drivers/usb/cherryusb/class/vendor/xbox/usbh_xbox.c b/components/drivers/usb/cherryusb/class/vendor/xbox/usbh_xbox.c index 0c3339c9fc5..364ca27cb74 100644 --- a/components/drivers/usb/cherryusb/class/vendor/xbox/usbh_xbox.c +++ b/components/drivers/usb/cherryusb/class/vendor/xbox/usbh_xbox.c @@ -86,6 +86,7 @@ int usbh_xbox_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister XBOX Class:%s\r\n", hport->config.intf[intf].devname); usbh_xbox_stop(xbox_class); } diff --git a/components/drivers/usb/cherryusb/class/video/usb_video.h b/components/drivers/usb/cherryusb/class/video/usb_video.h index ff36fece09a..8f95992b457 100644 --- a/components/drivers/usb/cherryusb/class/video/usb_video.h +++ b/components/drivers/usb/cherryusb/class/video/usb_video.h @@ -1237,7 +1237,7 @@ struct video_autoexposure_mode { USB_DESCRIPTOR_TYPE_INTERFACE, /* bDescriptorType : INTERFACE */ \ bInterfaceNumber, /* bInterfaceNumber: Index of this interface */ \ bAlternateSetting, /* bAlternateSetting: Index of this alternate setting */ \ - bNumEndpoints, /* bNumEndpoints : 0 endpoints – no bandwidth used*/ \ + bNumEndpoints, /* bNumEndpoints : 0 endpoints, no bandwidth used*/ \ 0x0e, /* bInterfaceClass : CC_VIDEO */ \ 0x02, /* bInterfaceSubClass : SC_VIDEOSTREAMING */ \ 0x00, /* bInterfaceProtocol : PC_PROTOCOL_UNDEFINED */ \ @@ -1315,8 +1315,8 @@ struct video_autoexposure_mode { bNumFrameDescriptors, /* bNumFrameDescriptors : One frame descriptor for this format follows. */ \ 0x00, /* bmFlags : Uses fixed size samples.. */ \ 0x01, /* bDefaultFrameIndex : Default frame index is 1. */ \ - 0x00, /* bAspectRatioX : Non-interlaced stream – not required. */ \ - 0x00, /* bAspectRatioY : Non-interlaced stream – not required. */ \ + 0x00, /* bAspectRatioX : Non-interlaced stream, not required. */ \ + 0x00, /* bAspectRatioY : Non-interlaced stream, not required. */ \ 0x00, /* bmInterlaceFlags : Non-interlaced stream */ \ 0x00 /* bCopyProtect : No restrictions imposed on the duplication of this video stream. */ @@ -1346,8 +1346,8 @@ struct video_autoexposure_mode { VIDEO_GUID_H264, \ 0x00, /* bmFlags : Uses fixed size samples.. */ \ 0x01, /* bDefaultFrameIndex : Default frame index is 1. */ \ - 0x00, /* bAspectRatioX : Non-interlaced stream – not required. */ \ - 0x00, /* bAspectRatioY : Non-interlaced stream – not required. */ \ + 0x00, /* bAspectRatioX : Non-interlaced stream, not required. */ \ + 0x00, /* bAspectRatioY : Non-interlaced stream, not required. */ \ 0x00, /* bmInterlaceFlags : Non-interlaced stream */ \ 0x00, /* bCopyProtect : No restrictions imposed on the duplication of this video stream. */ \ 0x00 /* Variable size: False */ diff --git a/components/drivers/usb/cherryusb/class/video/usbd_video.c b/components/drivers/usb/cherryusb/class/video/usbd_video.c index dae28eb544a..a4e53162d58 100644 --- a/components/drivers/usb/cherryusb/class/video/usbd_video.c +++ b/components/drivers/usb/cherryusb/class/video/usbd_video.c @@ -18,20 +18,14 @@ struct usbd_video_priv { uint8_t power_mode; uint8_t error_code; struct video_entity_info info[3]; - uint8_t *ep_buf0; - uint8_t *ep_buf1; - bool ep_buf0_ready; - bool ep_buf1_ready; - uint32_t ep_buf0_len; - uint32_t ep_buf1_len; - uint8_t ep_buf_idx; + uint8_t *ep_buf; bool stream_finish; - uint32_t max_packets; uint8_t *stream_buf; uint32_t stream_len; uint32_t stream_offset; uint8_t stream_frameid; uint32_t stream_headerlen; + bool do_copy; } g_usbd_video[CONFIG_USBDEV_MAX_BUS]; static int usbd_video_control_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) @@ -753,41 +747,7 @@ static void usbd_video_probe_and_commit_controls_init(uint8_t busid, uint32_t dw g_usbd_video[busid].commit.bMaxVersion = 0; g_usbd_video[busid].stream_frameid = 0; - g_usbd_video[busid].stream_headerlen = 2; -} - -static uint32_t usbd_video_prepare_ep_buf_data(uint8_t busid, uint32_t remain, uint8_t *ep_buf) -{ - struct video_payload_header *header; - uint32_t len; - uint32_t offset; - - len = MIN(remain, (g_usbd_video[busid].probe.dwMaxPayloadTransferSize - g_usbd_video[busid].stream_headerlen) * g_usbd_video[busid].max_packets); - offset = 0; - while (len > 0) { - header = (struct video_payload_header *)&ep_buf[offset]; - header->bHeaderLength = g_usbd_video[busid].stream_headerlen; - header->headerInfoUnion.bmheaderInfo = 0; - header->headerInfoUnion.headerInfoBits.endOfHeader = 1; - header->headerInfoUnion.headerInfoBits.endOfFrame = 0; - header->headerInfoUnion.headerInfoBits.frameIdentifier = g_usbd_video[busid].stream_frameid; - - uint32_t len2 = MIN(len, g_usbd_video[busid].probe.dwMaxPayloadTransferSize - g_usbd_video[busid].stream_headerlen); - - usb_memcpy(&ep_buf[offset + g_usbd_video[busid].stream_headerlen], - &g_usbd_video[busid].stream_buf[g_usbd_video[busid].stream_offset], - len2); - - g_usbd_video[busid].stream_offset += len2; - len -= len2; - offset += (len2 + g_usbd_video[busid].stream_headerlen); - - if (g_usbd_video[busid].stream_offset == g_usbd_video[busid].stream_len) { - header->headerInfoUnion.headerInfoBits.endOfFrame = 1; - } - } - - return offset; + g_usbd_video[busid].stream_headerlen = 12; } struct usbd_interface *usbd_video_init_intf(uint8_t busid, @@ -817,68 +777,99 @@ struct usbd_interface *usbd_video_init_intf(uint8_t busid, bool usbd_video_stream_split_transfer(uint8_t busid, uint8_t ep) { - uint32_t remain; - - if (g_usbd_video[busid].ep_buf1_ready && (g_usbd_video[busid].ep_buf_idx == 0)) { /* callback: buf1 ready and buf0 was sent */ - g_usbd_video[busid].ep_buf0_ready = false; - g_usbd_video[busid].ep_buf_idx = 1; - usbd_ep_start_write(busid, ep, g_usbd_video[busid].ep_buf1, g_usbd_video[busid].ep_buf1_len); - } else if (g_usbd_video[busid].ep_buf0_ready && (g_usbd_video[busid].ep_buf_idx == 1)) { /* callback: buf0 ready and buf1 was sent */ - g_usbd_video[busid].ep_buf1_ready = false; - g_usbd_video[busid].ep_buf_idx = 0; - usbd_ep_start_write(busid, ep, g_usbd_video[busid].ep_buf0, g_usbd_video[busid].ep_buf0_len); + struct video_payload_header *header; + static uint32_t offset = 0; + static uint32_t len = 0; + + if (g_usbd_video[busid].stream_finish) { + g_usbd_video[busid].stream_finish = false; + return true; + } + + offset = g_usbd_video[busid].stream_offset; + + len = MIN(g_usbd_video[busid].stream_len, + g_usbd_video[busid].probe.dwMaxPayloadTransferSize - + g_usbd_video[busid].stream_headerlen); + + if (g_usbd_video[busid].do_copy) { + header = (struct video_payload_header *)&g_usbd_video[busid].ep_buf[0]; + usb_memcpy(&g_usbd_video[busid].ep_buf[g_usbd_video[busid].stream_headerlen], &g_usbd_video[busid].stream_buf[offset], len); } else { - if (g_usbd_video[busid].stream_finish) { - return true; - } + header = (struct video_payload_header *)&g_usbd_video[busid].stream_buf[offset - g_usbd_video[busid].stream_headerlen]; } - if (!g_usbd_video[busid].ep_buf0_ready) { - remain = g_usbd_video[busid].stream_len - g_usbd_video[busid].stream_offset; - if (remain == 0) { - g_usbd_video[busid].stream_frameid ^= 1; - g_usbd_video[busid].stream_finish = true; - } else { - g_usbd_video[busid].ep_buf0_len = usbd_video_prepare_ep_buf_data(busid, remain, g_usbd_video[busid].ep_buf0); - g_usbd_video[busid].ep_buf0_ready = true; - if (!g_usbd_video[busid].ep_buf1_ready) { - g_usbd_video[busid].ep_buf_idx = 0; - usbd_ep_start_write(busid, ep, g_usbd_video[busid].ep_buf0, g_usbd_video[busid].ep_buf0_len); - } - } + memset(header, 0, g_usbd_video[busid].stream_headerlen); + header->bHeaderLength = g_usbd_video[busid].stream_headerlen; + header->headerInfoUnion.bmheaderInfo = 0; + header->headerInfoUnion.headerInfoBits.endOfHeader = 1; + header->headerInfoUnion.headerInfoBits.endOfFrame = 0; + header->headerInfoUnion.headerInfoBits.frameIdentifier = g_usbd_video[busid].stream_frameid; + + g_usbd_video[busid].stream_offset += len; + g_usbd_video[busid].stream_len -= len; + + if (g_usbd_video[busid].stream_len == 0) { + header->headerInfoUnion.headerInfoBits.endOfFrame = 1; + g_usbd_video[busid].stream_frameid ^= 1; + g_usbd_video[busid].stream_finish = true; } - if (!g_usbd_video[busid].ep_buf1_ready) { - remain = g_usbd_video[busid].stream_len - g_usbd_video[busid].stream_offset; - if (remain == 0) { - g_usbd_video[busid].stream_frameid ^= 1; - g_usbd_video[busid].stream_finish = true; - } else { - g_usbd_video[busid].ep_buf1_len = usbd_video_prepare_ep_buf_data(busid, remain, g_usbd_video[busid].ep_buf1); - g_usbd_video[busid].ep_buf1_ready = true; - } + if (g_usbd_video[busid].do_copy) { + usbd_ep_start_write(busid, ep, + g_usbd_video[busid].ep_buf, + g_usbd_video[busid].stream_headerlen + len); + } else { + usbd_ep_start_write(busid, ep, + &g_usbd_video[busid].stream_buf[offset - g_usbd_video[busid].stream_headerlen], + g_usbd_video[busid].stream_headerlen + len); } return false; } -int usbd_video_stream_start_write(uint8_t busid, uint8_t ep, uint8_t *ep_buf0, uint8_t *ep_buf1, uint32_t ep_bufsize, uint8_t *stream_buf, uint32_t stream_len) +int usbd_video_stream_start_write(uint8_t busid, uint8_t ep, uint8_t *ep_buf, uint8_t *stream_buf, uint32_t stream_len, bool do_copy) { + struct video_payload_header *header; + if ((usb_device_is_configured(busid) == 0) || (stream_len == 0)) { return -1; } - g_usbd_video[busid].ep_buf0 = ep_buf0; - g_usbd_video[busid].ep_buf1 = ep_buf1; - g_usbd_video[busid].ep_buf0_ready = false; - g_usbd_video[busid].ep_buf1_ready = false; - g_usbd_video[busid].ep_buf_idx = 0; - g_usbd_video[busid].stream_finish = false; - g_usbd_video[busid].max_packets = ep_bufsize / g_usbd_video[busid].probe.dwMaxPayloadTransferSize; + g_usbd_video[busid].ep_buf = ep_buf; g_usbd_video[busid].stream_buf = stream_buf; g_usbd_video[busid].stream_len = stream_len; g_usbd_video[busid].stream_offset = 0; + g_usbd_video[busid].stream_finish = false; + g_usbd_video[busid].do_copy = do_copy; + + uint32_t len = MIN(g_usbd_video[busid].stream_len, + g_usbd_video[busid].probe.dwMaxPayloadTransferSize - + g_usbd_video[busid].stream_headerlen); - usbd_video_stream_split_transfer(busid, ep); + header = (struct video_payload_header *)&ep_buf[0]; + header->bHeaderLength = g_usbd_video[busid].stream_headerlen; + header->headerInfoUnion.bmheaderInfo = 0; + header->headerInfoUnion.headerInfoBits.endOfHeader = 1; + header->headerInfoUnion.headerInfoBits.endOfFrame = 0; + header->headerInfoUnion.headerInfoBits.frameIdentifier = g_usbd_video[busid].stream_frameid; + + usb_memcpy(&ep_buf[g_usbd_video[busid].stream_headerlen], stream_buf, len); + g_usbd_video[busid].stream_offset += len; + g_usbd_video[busid].stream_len -= len; + + usbd_ep_start_write(busid, ep, ep_buf, g_usbd_video[busid].stream_headerlen + len); return 0; } + +__WEAK void usbd_video_open(uint8_t busid, uint8_t intf) +{ + (void)busid; + (void)intf; +} + +__WEAK void usbd_video_close(uint8_t busid, uint8_t intf) +{ + (void)busid; + (void)intf; +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/class/video/usbd_video.h b/components/drivers/usb/cherryusb/class/video/usbd_video.h index a2a98bb8c01..a2061fdcc99 100644 --- a/components/drivers/usb/cherryusb/class/video/usbd_video.h +++ b/components/drivers/usb/cherryusb/class/video/usbd_video.h @@ -22,7 +22,7 @@ void usbd_video_open(uint8_t busid, uint8_t intf); void usbd_video_close(uint8_t busid, uint8_t intf); bool usbd_video_stream_split_transfer(uint8_t busid, uint8_t ep); -int usbd_video_stream_start_write(uint8_t busid, uint8_t ep, uint8_t *ep_buf0, uint8_t *ep_buf1, uint32_t ep_bufsize, uint8_t *stream_buf, uint32_t stream_len); +int usbd_video_stream_start_write(uint8_t busid, uint8_t ep, uint8_t *ep_buf, uint8_t *stream_buf, uint32_t stream_len, bool do_copy); #ifdef __cplusplus } diff --git a/components/drivers/usb/cherryusb/class/video/usbh_video.c b/components/drivers/usb/cherryusb/class/video/usbh_video.c index 7379151250d..077b6bb915d 100644 --- a/components/drivers/usb/cherryusb/class/video/usbh_video.c +++ b/components/drivers/usb/cherryusb/class/video/usbh_video.c @@ -25,7 +25,7 @@ #define INTF_DESC_bInterfaceNumber 2 /** Interface number offset */ #define INTF_DESC_bAlternateSetting 3 /** Alternate setting offset */ -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_video_buf[128]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_video_buf[USB_ALIGN_UP(128, CONFIG_USB_ALIGN_SIZE)]; static const char *format_type[] = { "uncompressed", "mjpeg" }; @@ -483,6 +483,7 @@ static int usbh_video_ctrl_disconnect(struct usbh_hubport *hport, uint8_t intf) } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister Video Class:%s\r\n", hport->config.intf[intf].devname); usbh_video_stop(video_class); } diff --git a/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.c b/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.c index 3f778c2f312..2b93e479ebf 100644 --- a/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.c +++ b/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.c @@ -24,6 +24,7 @@ struct usbd_rndis_priv { uint32_t net_filter; usb_eth_stat_t eth_state; rndis_state_t init_state; + bool set_rsp_get; uint8_t mac[6]; } g_usbd_rndis; @@ -38,12 +39,12 @@ struct usbd_rndis_priv { #endif #ifdef CONFIG_USBDEV_RNDIS_USING_LWIP -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_rx_buffer[CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_tx_buffer[CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_rx_buffer[USB_ALIGN_UP(CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_tx_buffer[USB_ALIGN_UP(CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE, CONFIG_USB_ALIGN_SIZE)]; #endif -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t rndis_encapsulated_resp_buffer[CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t NOTIFY_RESPONSE_AVAILABLE[8]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t rndis_encapsulated_resp_buffer[USB_ALIGN_UP(CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t NOTIFY_RESPONSE_AVAILABLE[USB_ALIGN_UP(8, CONFIG_USB_ALIGN_SIZE)]; volatile uint8_t *g_rndis_rx_data_buffer; volatile uint32_t g_rndis_rx_data_length; @@ -109,9 +110,13 @@ static int rndis_class_interface_request_handler(uint8_t busid, struct usb_setup switch (setup->bRequest) { case CDC_REQUEST_SEND_ENCAPSULATED_COMMAND: + g_usbd_rndis.set_rsp_get = true; + rndis_encapsulated_cmd_handler(*data, setup->wLength); break; case CDC_REQUEST_GET_ENCAPSULATED_RESPONSE: + g_usbd_rndis.set_rsp_get = false; + *data = rndis_encapsulated_resp_buffer; *len = ((rndis_generic_msg_t *)rndis_encapsulated_resp_buffer)->MessageLength; break; @@ -271,7 +276,7 @@ static int rndis_query_cmd_handler(uint8_t *data, uint32_t len) infomation_len = 4; break; case OID_GEN_MEDIA_CONNECT_STATUS: - RNDIS_INQUIRY_PUT_LE32(g_usbd_rndis.link_status); + RNDIS_INQUIRY_PUT_LE32(NDIS_MEDIA_STATE_CONNECTED); infomation_len = 4; break; case OID_GEN_RNDIS_CONFIG_PARAMETER: @@ -510,7 +515,7 @@ void rndis_int_in(uint8_t busid, uint8_t ep, uint32_t nbytes) int usbd_rndis_start_write(uint8_t *buf, uint32_t len) { if (!usb_device_is_configured(0)) { - return -USB_ERR_NODEV; + return -USB_ERR_NOTCONN; } if (g_rndis_tx_data_length > 0) { @@ -526,7 +531,7 @@ int usbd_rndis_start_write(uint8_t *buf, uint32_t len) int usbd_rndis_start_read(uint8_t *buf, uint32_t len) { if (!usb_device_is_configured(0)) { - return -USB_ERR_NODEV; + return -USB_ERR_NOTCONN; } g_rndis_rx_data_buffer = buf; @@ -564,7 +569,7 @@ int usbd_rndis_eth_tx(struct pbuf *p) uint8_t *buffer; rndis_data_packet_t *hdr; - if (g_usbd_rndis.link_status == NDIS_MEDIA_STATE_DISCONNECTED) { + if (!usb_device_is_configured(0)) { return -USB_ERR_NOTCONN; } @@ -590,10 +595,7 @@ int usbd_rndis_eth_tx(struct pbuf *p) hdr->DataOffset = sizeof(rndis_data_packet_t) - sizeof(rndis_generic_msg_t); hdr->DataLength = p->tot_len; - g_rndis_tx_data_length = sizeof(rndis_data_packet_t) + p->tot_len; - - USB_LOG_DBG("txlen:%d\r\n", g_rndis_tx_data_length); - return usbd_ep_start_write(0, rndis_ep_data[RNDIS_IN_EP_IDX].ep_addr, g_rndis_tx_buffer, g_rndis_tx_data_length); + return usbd_rndis_start_write(g_rndis_tx_buffer, sizeof(rndis_data_packet_t) + p->tot_len); } #endif struct usbd_interface *usbd_rndis_init_intf(struct usbd_interface *intf, @@ -625,9 +627,33 @@ struct usbd_interface *usbd_rndis_init_intf(struct usbd_interface *intf, return intf; } -void usbd_rndis_set_connect(bool connect) +int usbd_rndis_set_connect(bool connect) { - g_usbd_rndis.link_status = connect ? NDIS_MEDIA_STATE_CONNECTED : NDIS_MEDIA_STATE_DISCONNECTED; + if (!usb_device_is_configured(0)) { + return -USB_ERR_NOTCONN; + } + + if(g_usbd_rndis.set_rsp_get) + return -USB_ERR_BUSY; + + rndis_indicate_status_t *resp; + + resp = ((rndis_indicate_status_t *)rndis_encapsulated_resp_buffer); + resp->MessageType = REMOTE_NDIS_INDICATE_STATUS_MSG; + resp->MessageLength = sizeof(rndis_indicate_status_t); + if(connect) { + resp->Status = RNDIS_STATUS_MEDIA_CONNECT; + g_usbd_rndis.link_status = NDIS_MEDIA_STATE_CONNECTED; + } else { + resp->Status = RNDIS_STATUS_MEDIA_DISCONNECT; + g_usbd_rndis.link_status = NDIS_MEDIA_STATE_DISCONNECTED; + } + resp->StatusBufferLength = 0; + resp->StatusBufferOffset = 0; + + rndis_notify_rsp(); + + return 0; } __WEAK void usbd_rndis_data_recv_done(uint32_t len) @@ -638,4 +664,4 @@ __WEAK void usbd_rndis_data_recv_done(uint32_t len) __WEAK void usbd_rndis_data_send_done(uint32_t len) { (void)len; -} +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.h b/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.h index f0fc3ee233b..8f4847b114a 100644 --- a/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.h +++ b/components/drivers/usb/cherryusb/class/wireless/usbd_rndis.h @@ -18,7 +18,7 @@ struct usbd_interface *usbd_rndis_init_intf(struct usbd_interface *intf, const uint8_t in_ep, const uint8_t int_ep, uint8_t mac[6]); -void usbd_rndis_set_connect(bool connect); +int usbd_rndis_set_connect(bool connect); void usbd_rndis_data_recv_done(uint32_t len); void usbd_rndis_data_send_done(uint32_t len); diff --git a/components/drivers/usb/cherryusb/class/wireless/usbh_bluetooth.c b/components/drivers/usb/cherryusb/class/wireless/usbh_bluetooth.c index e507c7e658b..af7167c01bf 100644 --- a/components/drivers/usb/cherryusb/class/wireless/usbh_bluetooth.c +++ b/components/drivers/usb/cherryusb/class/wireless/usbh_bluetooth.c @@ -15,13 +15,13 @@ static struct usbh_bluetooth g_bluetooth_class; #ifdef CONFIG_USBHOST_BLUETOOTH_HCI_H4 -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_tx_buf[1 + CONFIG_USBHOST_BLUETOOTH_TX_SIZE]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_rx_buf[1 + CONFIG_USBHOST_BLUETOOTH_RX_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_tx_buf[USB_ALIGN_UP(CONFIG_USBHOST_BLUETOOTH_TX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_rx_buf[USB_ALIGN_UP(CONFIG_USBHOST_BLUETOOTH_RX_SIZE, CONFIG_USB_ALIGN_SIZE)]; #else -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_cmd_buf[1 + 256]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_evt_buf[1 + 256]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_tx_buf[1 + CONFIG_USBHOST_BLUETOOTH_TX_SIZE]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_rx_buf[1 + CONFIG_USBHOST_BLUETOOTH_RX_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_cmd_buf[USB_ALIGN_UP(256, CONFIG_USB_ALIGN_SIZE)]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_evt_buf[USB_ALIGN_UP(256, CONFIG_USB_ALIGN_SIZE)]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_tx_buf[USB_ALIGN_UP(CONFIG_USBHOST_BLUETOOTH_TX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_bluetooth_rx_buf[USB_ALIGN_UP(CONFIG_USBHOST_BLUETOOTH_RX_SIZE, CONFIG_USB_ALIGN_SIZE)]; #endif static int usbh_bluetooth_connect(struct usbh_hubport *hport, uint8_t intf) @@ -134,6 +134,7 @@ static int usbh_bluetooth_disconnect(struct usbh_hubport *hport, uint8_t intf) // } #endif if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister Bluetooth Class:%s\r\n", hport->config.intf[intf].devname); usbh_bluetooth_stop(bluetooth_class); } diff --git a/components/drivers/usb/cherryusb/class/wireless/usbh_rndis.c b/components/drivers/usb/cherryusb/class/wireless/usbh_rndis.c index 17260acda25..b6e43a765b2 100644 --- a/components/drivers/usb/cherryusb/class/wireless/usbh_rndis.c +++ b/components/drivers/usb/cherryusb/class/wireless/usbh_rndis.c @@ -18,9 +18,9 @@ USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_buf[512]; #define CONFIG_USBHOST_RNDIS_ETH_MAX_FRAME_SIZE 1514 #define CONFIG_USBHOST_RNDIS_ETH_MSG_SIZE (CONFIG_USBHOST_RNDIS_ETH_MAX_FRAME_SIZE + 44) -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_rx_buffer[CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE]; -static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_tx_buffer[CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE]; -// static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_inttx_buffer[16]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_rx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_tx_buffer[USB_ALIGN_UP(CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE, CONFIG_USB_ALIGN_SIZE)]; +// static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t g_rndis_inttx_buffer[USB_ALIGN_UP(16, CONFIG_USB_ALIGN_SIZE)]; static struct usbh_rndis g_rndis_class; @@ -90,8 +90,8 @@ static int usbh_rndis_init_msg_transfer(struct usbh_rndis *rndis_class) rndis_class->max_transfer_pkts = resp->MaxPacketsPerTransfer; rndis_class->max_transfer_size = resp->MaxTransferSize; - USB_LOG_INFO("MaxPacketsPerTransfer:%ld\r\n", resp->MaxPacketsPerTransfer); - USB_LOG_INFO("MaxTransferSize:%ld\r\n", resp->MaxTransferSize); + USB_LOG_INFO("MaxPacketsPerTransfer:%u\r\n", (unsigned int)resp->MaxPacketsPerTransfer); + USB_LOG_INFO("MaxTransferSize:%u\r\n", (unsigned int)resp->MaxTransferSize); return ret; } @@ -319,7 +319,7 @@ static int usbh_rndis_connect(struct usbh_hubport *hport, uint8_t intf) return ret; } oid_num = (data_len / 4); - USB_LOG_INFO("rndis query OID_GEN_SUPPORTED_LIST success,oid num :%ld\r\n", oid_num); + USB_LOG_INFO("rndis query OID_GEN_SUPPORTED_LIST success,oid num :%u\r\n", (unsigned int)oid_num); oid_support_list = (uint32_t *)tmp_buffer; @@ -380,10 +380,10 @@ static int usbh_rndis_connect(struct usbh_hubport *hport, uint8_t intf) } break; default: - USB_LOG_WRN("Ignore rndis query iod:%08lx\r\n", oid); + USB_LOG_WRN("Ignore rndis query iod:%08x\r\n", (unsigned int)oid); continue; } - USB_LOG_INFO("rndis query iod:%08lx success\r\n", oid); + USB_LOG_INFO("rndis query iod:%08x success\r\n", (unsigned int)oid); } uint32_t packet_filter = 0x0f; @@ -414,7 +414,7 @@ static int usbh_rndis_connect(struct usbh_hubport *hport, uint8_t intf) usbh_rndis_run(rndis_class); return ret; query_errorout: - USB_LOG_ERR("rndis query iod:%08lx error\r\n", oid); + USB_LOG_ERR("rndis query iod:%08x error\r\n", (unsigned int)oid); return ret; } @@ -438,6 +438,7 @@ static int usbh_rndis_disconnect(struct usbh_hubport *hport, uint8_t intf) // } if (hport->config.intf[intf].devname[0] != '\0') { + usb_osal_thread_schedule_other(); USB_LOG_INFO("Unregister RNDIS Class:%s\r\n", hport->config.intf[intf].devname); usbh_rndis_stop(rndis_class); } @@ -501,7 +502,7 @@ void usbh_rndis_rx_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) uint32_t total_len = g_rndis_rx_length; while (g_rndis_rx_length > 0) { - USB_LOG_DBG("rxlen:%ld\r\n", g_rndis_rx_length); + USB_LOG_DBG("rxlen:%u\r\n", (unsigned int)g_rndis_rx_length); pmsg = (rndis_data_packet_t *)(g_rndis_rx_buffer + pmg_offset); @@ -523,7 +524,7 @@ void usbh_rndis_rx_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) g_rndis_rx_length = 0; } } else { - USB_LOG_ERR("offset:%ld,remain:%ld,total:%ld\r\n", pmg_offset, g_rndis_rx_length, total_len); + USB_LOG_ERR("offset:%u,remain:%u,total:%u\r\n", (unsigned int)pmg_offset, (unsigned int)g_rndis_rx_length, (unsigned int)total_len); g_rndis_rx_length = 0; USB_LOG_ERR("Error rndis packet message\r\n"); } diff --git a/components/drivers/usb/cherryusb/common/usb_dc.h b/components/drivers/usb/cherryusb/common/usb_dc.h index dd85d7cb988..42a332e7739 100644 --- a/components/drivers/usb/cherryusb/common/usb_dc.h +++ b/components/drivers/usb/cherryusb/common/usb_dc.h @@ -138,6 +138,11 @@ int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t /* usb dcd irq callback, called by user */ +/** + * @brief Usb sof irq callback. + */ +void usbd_event_sof_handler(uint8_t busid); + /** * @brief Usb connect irq callback. */ diff --git a/components/drivers/usb/cherryusb/common/usb_dcache.h b/components/drivers/usb/cherryusb/common/usb_dcache.h index 60fbb7e90d5..f53efd919fb 100644 --- a/components/drivers/usb/cherryusb/common/usb_dcache.h +++ b/components/drivers/usb/cherryusb/common/usb_dcache.h @@ -10,6 +10,9 @@ #if CONFIG_USB_ALIGN_SIZE % 32 #error "CONFIG_USB_ALIGN_SIZE must be multiple of 32" #endif +void usb_dcache_clean(uintptr_t addr, size_t size); +void usb_dcache_invalidate(uintptr_t addr, size_t size); +void usb_dcache_flush(uintptr_t addr, size_t size); #else #define usb_dcache_clean(addr, size) #define usb_dcache_invalidate(addr, size) diff --git a/components/drivers/usb/cherryusb/common/usb_log.h b/components/drivers/usb/cherryusb/common/usb_log.h index 94eedfb63e0..ca03af5b394 100644 --- a/components/drivers/usb/cherryusb/common/usb_log.h +++ b/components/drivers/usb/cherryusb/common/usb_log.h @@ -75,12 +75,29 @@ #define USB_LOG_RAW(...) CONFIG_USB_PRINTF(__VA_ARGS__) -void usb_assert(const char *filename, int linenum); -#define USB_ASSERT(f) \ - do { \ - if (!(f)) \ - usb_assert(__FILE__, __LINE__); \ - } while (0) +#ifndef CONFIG_USB_ASSERT_DISABLE +#define USB_ASSERT(f) \ + do { \ + if (!(f)) { \ + USB_LOG_ERR("ASSERT FAIL [%s] @ %s:%d\r\n", #f, __FILE__, __LINE__); \ + while (1) { \ + } \ + } \ + } while (false) + +#define USB_ASSERT_MSG(f, fmt, ...) \ + do { \ + if (!(f)) { \ + USB_LOG_ERR("ASSERT FAIL [%s] @ %s:%d\r\n", #f, __FILE__, __LINE__); \ + USB_LOG_ERR(fmt "\r\n", ##__VA_ARGS__); \ + while (1) { \ + } \ + } \ + } while (false) +#else +#define USB_ASSERT(f) {} +#define USB_ASSERT_MSG(f, fmt, ...) {} +#endif #define ___is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ') static inline void usb_hexdump(const void *ptr, uint32_t buflen) diff --git a/components/drivers/usb/cherryusb/common/usb_memcpy.h b/components/drivers/usb/cherryusb/common/usb_memcpy.h index 85cac3116ff..ed028e649c6 100644 --- a/components/drivers/usb/cherryusb/common/usb_memcpy.h +++ b/components/drivers/usb/cherryusb/common/usb_memcpy.h @@ -88,4 +88,9 @@ static inline void *usb_memcpy(void *s1, const void *s2, size_t n) } return s1; } + +#ifndef CONFIG_USB_MEMCPY_DISABLE +#define memcpy usb_memcpy +#endif + #endif diff --git a/components/drivers/usb/cherryusb/common/usb_osal.h b/components/drivers/usb/cherryusb/common/usb_osal.h index aa2f1336896..1975f208bfb 100644 --- a/components/drivers/usb/cherryusb/common/usb_osal.h +++ b/components/drivers/usb/cherryusb/common/usb_osal.h @@ -13,6 +13,9 @@ #ifdef __INCLUDE_NUTTX_CONFIG_H #define CONFIG_USB_OSAL_THREAD_SET_ARGV int argc, char **argv #define CONFIG_USB_OSAL_THREAD_GET_ARGV ((uintptr_t)strtoul(argv[1], NULL, 16)) +#elif defined(__ZEPHYR__) +#define CONFIG_USB_OSAL_THREAD_SET_ARGV void *p1, void *p2, void *p3 +#define CONFIG_USB_OSAL_THREAD_GET_ARGV ((uintptr_t)p1) #else #define CONFIG_USB_OSAL_THREAD_SET_ARGV void *argument #define CONFIG_USB_OSAL_THREAD_GET_ARGV ((uintptr_t)argument) @@ -30,7 +33,7 @@ struct usb_osal_timer { usb_timer_handler_t handler; void *argument; bool is_period; - uint32_t ticks; + uint32_t timeout_ms; void *timer; }; @@ -39,6 +42,7 @@ struct usb_osal_timer { */ usb_osal_thread_t usb_osal_thread_create(const char *name, uint32_t stack_size, uint32_t prio, usb_thread_entry_t entry, void *args); void usb_osal_thread_delete(usb_osal_thread_t thread); +void usb_osal_thread_schedule_other(void); usb_osal_sem_t usb_osal_sem_create(uint32_t initial_count); void usb_osal_sem_delete(usb_osal_sem_t sem); diff --git a/components/drivers/usb/cherryusb/common/usb_util.h b/components/drivers/usb/cherryusb/common/usb_util.h index b2223b2b941..5fa8403b683 100644 --- a/components/drivers/usb/cherryusb/common/usb_util.h +++ b/components/drivers/usb/cherryusb/common/usb_util.h @@ -206,6 +206,7 @@ #define USB_MEM_ALIGNX __attribute__((aligned(CONFIG_USB_ALIGN_SIZE))) #define USB_ALIGN_UP(size, align) (((size) + (align)-1) & ~((align)-1)) +#define USB_ALIGN_DOWN(size, align) ((size) & ~((align)-1)) #ifndef usb_phyaddr2ramaddr #define usb_phyaddr2ramaddr(addr) (addr) diff --git a/components/drivers/usb/cherryusb/common/usb_version.h b/components/drivers/usb/cherryusb/common/usb_version.h index d207af9dc23..c58f01a0674 100644 --- a/components/drivers/usb/cherryusb/common/usb_version.h +++ b/components/drivers/usb/cherryusb/common/usb_version.h @@ -15,7 +15,7 @@ #undef CHERRYUSB_VERSION_STR #endif -#define CHERRYUSB_VERSION 0x010402 -#define CHERRYUSB_VERSION_STR "v1.4.2" +#define CHERRYUSB_VERSION 0x010500 +#define CHERRYUSB_VERSION_STR "v1.5.0" #endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/core/usbd_core.c b/components/drivers/usb/cherryusb/core/usbd_core.c index 2a2fda460d1..8260df67ce2 100644 --- a/components/drivers/usb/cherryusb/core/usbd_core.c +++ b/components/drivers/usb/cherryusb/core/usbd_core.c @@ -41,7 +41,7 @@ USB_NOCACHE_RAM_SECTION struct usbd_core_priv { /** Setup packet */ USB_MEM_ALIGNX struct usb_setup_packet setup; /** Pointer to data buffer */ - uint8_t *ep0_data_buf; + USB_MEM_ALIGNX uint8_t *ep0_data_buf; /** Remaining bytes in buffer */ uint32_t ep0_data_buf_residue; /** Total length of control transfer */ @@ -59,11 +59,12 @@ USB_NOCACHE_RAM_SECTION struct usbd_core_priv { struct usb_webusb_descriptor *webusb_url_desc; #endif /* Buffer used for storing standard, class and vendor request data */ - USB_MEM_ALIGNX uint8_t req_data[CONFIG_USBDEV_REQUEST_BUFFER_LEN]; + USB_MEM_ALIGNX uint8_t req_data[USB_ALIGN_UP(CONFIG_USBDEV_REQUEST_BUFFER_LEN, CONFIG_USB_ALIGN_SIZE)]; /** Currently selected configuration */ uint8_t configuration; uint8_t device_address; + uint8_t ep0_next_state; bool self_powered; bool remote_wakeup_support; bool remote_wakeup_enabled; @@ -185,6 +186,11 @@ static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **da switch (type) { case USB_DESCRIPTOR_TYPE_DEVICE: g_usbd_core[busid].speed = usbd_get_port_speed(busid); /* before we get device descriptor, we have known steady port speed */ + + if (g_usbd_core[busid].descriptors->device_descriptor_callback == NULL) { + found = false; + break; + } desc = g_usbd_core[busid].descriptors->device_descriptor_callback(g_usbd_core[busid].speed); if (desc == NULL) { found = false; @@ -193,6 +199,10 @@ static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **da desc_len = desc[0]; break; case USB_DESCRIPTOR_TYPE_CONFIGURATION: + if (g_usbd_core[busid].descriptors->config_descriptor_callback == NULL) { + found = false; + break; + } desc = g_usbd_core[busid].descriptors->config_descriptor_callback(g_usbd_core[busid].speed); if (desc == NULL) { found = false; @@ -213,6 +223,10 @@ static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **da desc = (uint8_t *)g_usbd_core[busid].descriptors->msosv1_descriptor->string; desc_len = g_usbd_core[busid].descriptors->msosv1_descriptor->string[0]; } else { + if (g_usbd_core[busid].descriptors->string_descriptor_callback == NULL) { + found = false; + break; + } string = g_usbd_core[busid].descriptors->string_descriptor_callback(g_usbd_core[busid].speed, index); if (string == NULL) { found = false; @@ -252,6 +266,10 @@ static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **da #ifndef CONFIG_USB_HS return false; #else + if (g_usbd_core[busid].descriptors->device_quality_descriptor_callback == NULL) { + found = false; + break; + } desc = g_usbd_core[busid].descriptors->device_quality_descriptor_callback(g_usbd_core[busid].speed); if (desc == NULL) { found = false; @@ -261,6 +279,10 @@ static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **da break; #endif case USB_DESCRIPTOR_TYPE_OTHER_SPEED: + if (g_usbd_core[busid].descriptors->other_speed_descriptor_callback == NULL) { + found = false; + break; + } desc = g_usbd_core[busid].descriptors->other_speed_descriptor_callback(g_usbd_core[busid].speed); if (desc == NULL) { found = false; @@ -1089,6 +1111,11 @@ static void usbd_class_event_notify_handler(uint8_t busid, uint8_t event, void * } } +void usbd_event_sof_handler(uint8_t busid) +{ + g_usbd_core[busid].event_handler(busid, USBD_EVENT_SOF); +} + void usbd_event_connect_handler(uint8_t busid) { g_usbd_core[busid].event_handler(busid, USBD_EVENT_CONNECTED); @@ -1096,6 +1123,7 @@ void usbd_event_connect_handler(uint8_t busid) void usbd_event_disconnect_handler(uint8_t busid) { + g_usbd_core[busid].configuration = 0; g_usbd_core[busid].event_handler(busid, USBD_EVENT_DISCONNECTED); } @@ -1118,6 +1146,7 @@ void usbd_event_reset_handler(uint8_t busid) usbd_set_address(busid, 0); g_usbd_core[busid].device_address = 0; g_usbd_core[busid].configuration = 0; + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP; #ifdef CONFIG_USBDEV_ADVANCE_DESC g_usbd_core[busid].speed = USB_SPEED_UNKNOWN; #endif @@ -1162,12 +1191,14 @@ static void __usbd_event_ep0_setup_complete_handler(uint8_t busid, struct usb_se /* handle class request when all the data is received */ if (setup->wLength && ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { USB_LOG_DBG("Start reading %d bytes from ep0\r\n", setup->wLength); + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_OUT_DATA; usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, g_usbd_core[busid].ep0_data_buf, setup->wLength); return; } /* Ask installed handler to process request */ if (!usbd_setup_request_handler(busid, setup, &buf, &g_usbd_core[busid].ep0_data_buf_len)) { + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP; usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); return; } @@ -1176,6 +1207,7 @@ static void __usbd_event_ep0_setup_complete_handler(uint8_t busid, struct usb_se g_usbd_core[busid].ep0_data_buf_residue = MIN(g_usbd_core[busid].ep0_data_buf_len, setup->wLength); if (g_usbd_core[busid].ep0_data_buf_residue > CONFIG_USBDEV_REQUEST_BUFFER_LEN) { USB_LOG_ERR("Request buffer too small\r\n"); + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP; usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); return; } @@ -1193,6 +1225,12 @@ static void __usbd_event_ep0_setup_complete_handler(uint8_t busid, struct usb_se /* use memcpy(*data, xxx, len); has copied into ep0 buffer, we do nothing */ } + if (g_usbd_core[busid].ep0_data_buf_residue > 0) { + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_IN_DATA; + } else { + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_IN_STATUS; + } + /* Send data or status to host */ usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); /* @@ -1228,7 +1266,7 @@ static void usbd_event_ep0_in_complete_handler(uint8_t busid, uint8_t ep, uint32 g_usbd_core[busid].ep0_data_buf += nbytes; g_usbd_core[busid].ep0_data_buf_residue -= nbytes; - USB_LOG_DBG("EP0 send %d bytes, %d remained\r\n", nbytes, g_usbd_core[busid].ep0_data_buf_residue); + USB_LOG_DBG("EP0 send %d bytes, %d remained\r\n", (unsigned int)nbytes, (unsigned int)g_usbd_core[busid].ep0_data_buf_residue); if (g_usbd_core[busid].ep0_data_buf_residue != 0) { /* Start sending the remain data */ @@ -1247,7 +1285,13 @@ static void usbd_event_ep0_in_complete_handler(uint8_t busid, uint8_t ep, uint32 */ if (setup->wLength && ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_IN)) { /* if all data has sent completely, start reading out status */ + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_OUT_STATUS; usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, NULL, 0); + return; + } + + if (g_usbd_core[busid].ep0_next_state == USBD_EP0_STATE_IN_STATUS) { + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP; } #ifdef CONFIG_USBDEV_TEST_MODE @@ -1271,7 +1315,7 @@ static void usbd_event_ep0_out_complete_handler(uint8_t busid, uint8_t ep, uint3 g_usbd_core[busid].ep0_data_buf += nbytes; g_usbd_core[busid].ep0_data_buf_residue -= nbytes; - USB_LOG_DBG("EP0 recv %d bytes, %d remained\r\n", nbytes, g_usbd_core[busid].ep0_data_buf_residue); + USB_LOG_DBG("EP0 recv %d bytes, %d remained\r\n", (unsigned int)nbytes, (unsigned int)g_usbd_core[busid].ep0_data_buf_residue); if (g_usbd_core[busid].ep0_data_buf_residue == 0) { #ifdef CONFIG_USBDEV_EP0_THREAD @@ -1280,10 +1324,12 @@ static void usbd_event_ep0_out_complete_handler(uint8_t busid, uint8_t ep, uint3 /* Received all, send data to handler */ g_usbd_core[busid].ep0_data_buf = g_usbd_core[busid].req_data; if (!usbd_setup_request_handler(busid, setup, &g_usbd_core[busid].ep0_data_buf, &g_usbd_core[busid].ep0_data_buf_len)) { + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP; usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); return; } + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_IN_STATUS; /*Send status to host*/ usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, NULL, 0); #endif @@ -1292,6 +1338,7 @@ static void usbd_event_ep0_out_complete_handler(uint8_t busid, uint8_t ep, uint3 usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); } } else { + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP; /* Read out status completely, do nothing */ USB_LOG_DBG("EP0 recv out status\r\n"); } @@ -1425,6 +1472,11 @@ int usbd_send_remote_wakeup(uint8_t busid) } } +uint8_t usbd_get_ep0_next_state(uint8_t busid) +{ + return g_usbd_core[busid].ep0_next_state; +} + #ifdef CONFIG_USBDEV_EP0_THREAD static void usbdev_ep0_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) { @@ -1438,7 +1490,7 @@ static void usbdev_ep0_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) if (ret < 0) { continue; } - USB_LOG_DBG("event:%d\r\n", event); + USB_LOG_DBG("event:%d\r\n", (unsigned int)event); switch (event) { case USB_EP0_STATE_SETUP: @@ -1451,10 +1503,12 @@ static void usbdev_ep0_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) /* Received all, send data to handler */ g_usbd_core[busid].ep0_data_buf = g_usbd_core[busid].req_data; if (!usbd_setup_request_handler(busid, setup, &g_usbd_core[busid].ep0_data_buf, &g_usbd_core[busid].ep0_data_buf_len)) { + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP; usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); continue; } + g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_IN_STATUS; /*Send status to host*/ usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, NULL, 0); break; diff --git a/components/drivers/usb/cherryusb/core/usbd_core.h b/components/drivers/usb/cherryusb/core/usbd_core.h index 71bdb29ba2b..585668267c1 100644 --- a/components/drivers/usb/cherryusb/core/usbd_core.h +++ b/components/drivers/usb/cherryusb/core/usbd_core.h @@ -22,7 +22,9 @@ extern "C" { #include "usb_list.h" #include "usb_log.h" #include "usb_dc.h" +#include "usb_osal.h" #include "usb_memcpy.h" +#include "usb_dcache.h" #include "usb_version.h" enum usbd_event_type { @@ -45,6 +47,12 @@ enum usbd_event_type { USBD_EVENT_UNKNOWN }; +#define USBD_EP0_STATE_SETUP 0 +#define USBD_EP0_STATE_IN_DATA 1 +#define USBD_EP0_STATE_OUT_DATA 2 +#define USBD_EP0_STATE_IN_STATUS 3 +#define USBD_EP0_STATE_OUT_STATUS 4 + typedef int (*usbd_request_handler)(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len); typedef void (*usbd_endpoint_callback)(uint8_t busid, uint8_t ep, uint32_t nbytes); typedef void (*usbd_notify_handler)(uint8_t busid, uint8_t event, void *arg); @@ -105,6 +113,7 @@ uint8_t usbd_get_ep_mult(uint8_t busid, uint8_t ep); bool usb_device_is_configured(uint8_t busid); bool usb_device_is_suspend(uint8_t busid); int usbd_send_remote_wakeup(uint8_t busid); +uint8_t usbd_get_ep0_next_state(uint8_t busid); int usbd_initialize(uint8_t busid, uintptr_t reg_base, void (*event_handler)(uint8_t busid, uint8_t event)); int usbd_deinitialize(uint8_t busid); diff --git a/components/drivers/usb/cherryusb/core/usbh_core.c b/components/drivers/usb/cherryusb/core/usbh_core.c index 38b5439feee..406a5c3e83a 100644 --- a/components/drivers/usb/cherryusb/core/usbh_core.c +++ b/components/drivers/usb/cherryusb/core/usbh_core.c @@ -14,8 +14,12 @@ struct usbh_class_info *usbh_class_info_table_end = NULL; usb_slist_t g_bus_head = USB_SLIST_OBJECT_INIT(g_bus_head); +struct setup_align_buffer { + uint8_t buffer[USB_ALIGN_UP(8, CONFIG_USB_ALIGN_SIZE)]; +}; + USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t ep0_request_buffer[CONFIG_USBHOST_MAX_BUS][USB_ALIGN_UP(CONFIG_USBHOST_REQUEST_BUFFER_LEN, CONFIG_USB_ALIGN_SIZE)]; -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX struct usb_setup_packet g_setup_buffer[CONFIG_USBHOST_MAX_BUS][CONFIG_USBHOST_MAX_EXTHUBS + 1][CONFIG_USBHOST_MAX_EHPORTS]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX struct setup_align_buffer g_setup_buffer[CONFIG_USBHOST_MAX_BUS][CONFIG_USBHOST_MAX_EXTHUBS + 1][CONFIG_USBHOST_MAX_EHPORTS]; struct usbh_bus g_usbhost_bus[CONFIG_USBHOST_MAX_BUS]; @@ -223,21 +227,13 @@ static int parse_config_descriptor(struct usbh_hubport *hport, struct usb_config cur_alt_setting = intf_desc->bAlternateSetting; cur_ep_num = intf_desc->bNumEndpoints; cur_ep = 0; - if (cur_iface > (CONFIG_USBHOST_MAX_INTERFACES - 1)) { - USB_LOG_ERR("Interface num overflow\r\n"); - while (1) { - } - } - if (cur_alt_setting > (CONFIG_USBHOST_MAX_INTF_ALTSETTINGS - 1)) { - USB_LOG_ERR("Interface altsetting num overflow\r\n"); - while (1) { - } - } - if (cur_ep_num > CONFIG_USBHOST_MAX_ENDPOINTS) { - USB_LOG_ERR("Endpoint num overflow\r\n"); - while (1) { - } - } + + USB_ASSERT_MSG(cur_iface < CONFIG_USBHOST_MAX_INTERFACES, + "Interface num %d overflow", cur_iface); + USB_ASSERT_MSG(cur_alt_setting < CONFIG_USBHOST_MAX_INTF_ALTSETTINGS, + "Interface altsetting num %d overflow", cur_alt_setting); + USB_ASSERT_MSG(cur_ep_num <= CONFIG_USBHOST_MAX_ENDPOINTS, + "Endpoint num %d overflow", cur_ep_num); #if 0 USB_LOG_DBG("Interface Descriptor:\r\n"); USB_LOG_DBG("bLength: 0x%02x \r\n", intf_desc->bLength); @@ -326,6 +322,8 @@ static void usbh_print_hubport_info(struct usbh_hubport *hport) static void usbh_print_setup(struct usb_setup_packet *setup) { + (void)setup; + USB_LOG_DBG("Setup: " "bmRequestType 0x%02x, bRequest 0x%02x, wValue 0x%04x, wIndex 0x%04x, wLength 0x%04x\r\n", setup->bmRequestType, @@ -363,7 +361,7 @@ int usbh_enumerate(struct usbh_hubport *hport) uint8_t config_index; int ret; - hport->setup = &g_setup_buffer[hport->bus->busid][hport->parent->index - 1][hport->port - 1]; + hport->setup = (struct usb_setup_packet *)&g_setup_buffer[hport->bus->busid][hport->parent->index - 1][hport->port - 1]; setup = hport->setup; ep = &hport->ep0; @@ -478,7 +476,7 @@ int usbh_enumerate(struct usbh_hubport *hport) if (wTotalLength > CONFIG_USBHOST_REQUEST_BUFFER_LEN) { ret = -USB_ERR_NOMEM; - USB_LOG_ERR("wTotalLength %d is overflow, default is %d\r\n", wTotalLength, CONFIG_USBHOST_REQUEST_BUFFER_LEN); + USB_LOG_ERR("wTotalLength %d is overflow, default is %d\r\n", wTotalLength, (unsigned int)CONFIG_USBHOST_REQUEST_BUFFER_LEN); goto errout; } diff --git a/components/drivers/usb/cherryusb/demo/audio_v1_mic_multichan_template.c b/components/drivers/usb/cherryusb/demo/audio_v1_mic_multichan_template.c index b1622656e6b..94ca950c967 100644 --- a/components/drivers/usb/cherryusb/demo/audio_v1_mic_multichan_template.c +++ b/components/drivers/usb/cherryusb/demo/audio_v1_mic_multichan_template.c @@ -220,6 +220,7 @@ const uint8_t audio_v1_descriptor[] = { volatile bool tx_flag = 0; volatile bool ep_tx_busy_flag = false; +volatile uint32_t s_mic_sample_rate; static void usbd_event_handler(uint8_t busid, uint8_t event) { @@ -260,9 +261,29 @@ void usbd_audio_close(uint8_t busid, uint8_t intf) tx_flag = 0; } +void usbd_audio_set_sampling_freq(uint8_t busid, uint8_t ep, uint32_t sampling_freq) +{ + if (ep == AUDIO_IN_EP) { + s_mic_sample_rate = sampling_freq; + } +} + +uint32_t usbd_audio_get_sampling_freq(uint8_t busid, uint8_t ep) +{ + (void)busid; + + uint32_t freq = 0; + + if (ep == AUDIO_IN_EP) { + freq = s_mic_sample_rate; + } + + return freq; +} + void usbd_audio_iso_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); ep_tx_busy_flag = false; } diff --git a/components/drivers/usb/cherryusb/demo/audio_v1_mic_speaker_multichan_template.c b/components/drivers/usb/cherryusb/demo/audio_v1_mic_speaker_multichan_template.c index add1d8db7c3..c764ee93237 100644 --- a/components/drivers/usb/cherryusb/demo/audio_v1_mic_speaker_multichan_template.c +++ b/components/drivers/usb/cherryusb/demo/audio_v1_mic_speaker_multichan_template.c @@ -258,6 +258,8 @@ USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t s_speaker_feedback_buffer[4]; volatile bool tx_flag = 0; volatile bool rx_flag = 0; volatile bool ep_tx_busy_flag = false; +volatile uint32_t s_mic_sample_rate; +volatile uint32_t s_speaker_sample_rate; static void usbd_event_handler(uint8_t busid, uint8_t event) { @@ -290,9 +292,11 @@ void usbd_audio_open(uint8_t busid, uint8_t intf) rx_flag = 1; /* setup first out ep read transfer */ usbd_ep_start_read(busid, AUDIO_OUT_EP, read_buffer, AUDIO_OUT_PACKET); - uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(AUDIO_SPEAKER_FREQ); +#if USING_FEEDBACK == 1 + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(s_speaker_sample_rate); AUDIO_FEEDBACK_TO_BUF_FS(s_speaker_feedback_buffer, feedback_value); /* uac1 can only use 10.14 */ usbd_ep_start_write(busid, AUDIO_OUT_FEEDBACK_EP, s_speaker_feedback_buffer, FEEDBACK_ENDP_PACKET_SIZE); +#endif printf("OPEN1\r\n"); } else { tx_flag = 1; @@ -313,23 +317,47 @@ void usbd_audio_close(uint8_t busid, uint8_t intf) } } +void usbd_audio_set_sampling_freq(uint8_t busid, uint8_t ep, uint32_t sampling_freq) +{ + if (ep == AUDIO_OUT_EP) { + s_speaker_sample_rate = sampling_freq; + } else if (ep == AUDIO_IN_EP) { + s_mic_sample_rate = sampling_freq; + } +} + +uint32_t usbd_audio_get_sampling_freq(uint8_t busid, uint8_t ep) +{ + (void)busid; + + uint32_t freq = 0; + + if (ep == AUDIO_OUT_EP) { + freq = s_speaker_sample_rate; + } else if (ep == AUDIO_IN_EP) { + freq = s_mic_sample_rate; + } + + return freq; +} + void usbd_audio_out_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); usbd_ep_start_read(busid, AUDIO_OUT_EP, read_buffer, AUDIO_OUT_PACKET); } void usbd_audio_in_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); ep_tx_busy_flag = false; } #if USING_FEEDBACK == 1 void usbd_audio_iso_out_feedback_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual feedback len:%d\r\n", nbytes); - uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(AUDIO_SPEAKER_FREQ); + USB_LOG_RAW("actual feedback len:%d\r\n", (unsigned int)nbytes); + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(s_speaker_sample_rate); AUDIO_FEEDBACK_TO_BUF_FS(s_speaker_feedback_buffer, feedback_value); usbd_ep_start_write(busid, AUDIO_OUT_FEEDBACK_EP, s_speaker_feedback_buffer, FEEDBACK_ENDP_PACKET_SIZE); } diff --git a/components/drivers/usb/cherryusb/demo/audio_v2_mic_multichan_template.c b/components/drivers/usb/cherryusb/demo/audio_v2_mic_multichan_template.c index 81b8e230945..cd6e9b151a3 100644 --- a/components/drivers/usb/cherryusb/demo/audio_v2_mic_multichan_template.c +++ b/components/drivers/usb/cherryusb/demo/audio_v2_mic_multichan_template.c @@ -22,9 +22,9 @@ #define AUDIO_IN_CLOCK_ID 0x01 #define AUDIO_IN_FU_ID 0x03 -#define AUDIO_FREQ 48000 -#define HALF_WORD_BYTES 2 //2 half word (one channel) -#define SAMPLE_BITS 16 //16 bit per channel +#define AUDIO_IN_MAX_FREQ 16000 +#define HALF_WORD_BYTES 2 //2 half word (one channel) +#define SAMPLE_BITS 16 //16 bit per channel #define BMCONTROL (AUDIO_V2_FU_CONTROL_MUTE | AUDIO_V2_FU_CONTROL_VOLUME) @@ -56,7 +56,7 @@ #define INPUT_CH_ENABLE 0x000000ff #endif -#define AUDIO_IN_PACKET ((uint32_t)((AUDIO_FREQ * HALF_WORD_BYTES * IN_CHANNEL_NUM) / 1000)) +#define AUDIO_IN_PACKET ((uint32_t)((AUDIO_IN_MAX_FREQ * HALF_WORD_BYTES * IN_CHANNEL_NUM) / 1000)) #define USB_AUDIO_CONFIG_DESC_SIZ (9 + \ AUDIO_V2_AC_DESCRIPTOR_INIT_LEN + \ @@ -235,6 +235,7 @@ USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t write_buffer[AUDIO_IN_PACKET]; volatile bool tx_flag = 0; volatile bool ep_tx_busy_flag = false; +volatile uint32_t s_mic_sample_rate; static void usbd_event_handler(uint8_t busid, uint8_t event) { @@ -273,6 +274,26 @@ void usbd_audio_close(uint8_t busid, uint8_t intf) tx_flag = 0; } +void usbd_audio_set_sampling_freq(uint8_t busid, uint8_t ep, uint32_t sampling_freq) +{ + if (ep == AUDIO_IN_EP) { + s_mic_sample_rate = sampling_freq; + } +} + +uint32_t usbd_audio_get_sampling_freq(uint8_t busid, uint8_t ep) +{ + (void)busid; + + uint32_t freq = 0; + + if (ep == AUDIO_IN_EP) { + freq = s_mic_sample_rate; + } + + return freq; +} + void usbd_audio_get_sampling_freq_table(uint8_t busid, uint8_t ep, uint8_t **sampling_freq_table) { if (ep == AUDIO_IN_EP) { diff --git a/components/drivers/usb/cherryusb/demo/audio_v2_mic_speaker_multichan_template.c b/components/drivers/usb/cherryusb/demo/audio_v2_mic_speaker_multichan_template.c index 93630dea9b1..ce77c302688 100644 --- a/components/drivers/usb/cherryusb/demo/audio_v2_mic_speaker_multichan_template.c +++ b/components/drivers/usb/cherryusb/demo/audio_v2_mic_speaker_multichan_template.c @@ -6,26 +6,33 @@ #include "usbd_core.h" #include "usbd_audio.h" +#define USING_FEEDBACK 0 + #define USBD_VID 0xffff #define USBD_PID 0xffff #define USBD_MAX_POWER 100 #define USBD_LANGID_STRING 1033 #ifdef CONFIG_USB_HS -#define EP_INTERVAL 0x04 +#define EP_INTERVAL 0x04 +#define FEEDBACK_ENDP_PACKET_SIZE 0x04 #else -#define EP_INTERVAL 0x01 +#define EP_INTERVAL 0x01 +#define FEEDBACK_ENDP_PACKET_SIZE 0x03 #endif -#define AUDIO_OUT_EP 0x02 -#define AUDIO_IN_EP 0x81 +#define AUDIO_OUT_EP 0x02 +#define AUDIO_IN_EP 0x81 +#define AUDIO_OUT_FEEDBACK_EP 0x83 #define AUDIO_OUT_CLOCK_ID 0x01 #define AUDIO_OUT_FU_ID 0x03 #define AUDIO_IN_CLOCK_ID 0x05 #define AUDIO_IN_FU_ID 0x07 -#define AUDIO_FREQ 48000 +#define AUDIO_OUT_MAX_FREQ 96000 +#define AUDIO_IN_MAX_FREQ 16000 + #define HALF_WORD_BYTES 2 //2 half word (one channel) #define SAMPLE_BITS 16 //16 bit per channel @@ -88,9 +95,10 @@ #endif /* AudioFreq * DataSize (2 bytes) * NumChannels */ -#define AUDIO_OUT_PACKET ((uint32_t)((AUDIO_FREQ * HALF_WORD_BYTES * OUT_CHANNEL_NUM) / 1000)) -#define AUDIO_IN_PACKET ((uint32_t)((AUDIO_FREQ * HALF_WORD_BYTES * IN_CHANNEL_NUM) / 1000)) +#define AUDIO_OUT_PACKET ((uint32_t)((AUDIO_OUT_MAX_FREQ * HALF_WORD_BYTES * OUT_CHANNEL_NUM) / 1000)) +#define AUDIO_IN_PACKET ((uint32_t)((AUDIO_IN_MAX_FREQ * HALF_WORD_BYTES * IN_CHANNEL_NUM) / 1000)) +#if USING_FEEDBACK == 0 #define USB_AUDIO_CONFIG_DESC_SIZ (9 + \ AUDIO_V2_AC_DESCRIPTOR_INIT_LEN + \ AUDIO_V2_SIZEOF_AC_CLOCK_SOURCE_DESC + \ @@ -103,6 +111,20 @@ AUDIO_V2_SIZEOF_AC_OUTPUT_TERMINAL_DESC + \ AUDIO_V2_AS_DESCRIPTOR_INIT_LEN + \ AUDIO_V2_AS_DESCRIPTOR_INIT_LEN) +#else +#define USB_AUDIO_CONFIG_DESC_SIZ (9 + \ + AUDIO_V2_AC_DESCRIPTOR_INIT_LEN + \ + AUDIO_V2_SIZEOF_AC_CLOCK_SOURCE_DESC + \ + AUDIO_V2_SIZEOF_AC_INPUT_TERMINAL_DESC + \ + AUDIO_V2_SIZEOF_AC_FEATURE_UNIT_DESC(OUT_CHANNEL_NUM) + \ + AUDIO_V2_SIZEOF_AC_OUTPUT_TERMINAL_DESC + \ + AUDIO_V2_SIZEOF_AC_CLOCK_SOURCE_DESC + \ + AUDIO_V2_SIZEOF_AC_INPUT_TERMINAL_DESC + \ + AUDIO_V2_SIZEOF_AC_FEATURE_UNIT_DESC(IN_CHANNEL_NUM) + \ + AUDIO_V2_SIZEOF_AC_OUTPUT_TERMINAL_DESC + \ + AUDIO_V2_AS_FEEDBACK_DESCRIPTOR_INIT_LEN + \ + AUDIO_V2_AS_DESCRIPTOR_INIT_LEN) +#endif #define AUDIO_AC_SIZ (AUDIO_V2_SIZEOF_AC_HEADER_DESC + \ AUDIO_V2_SIZEOF_AC_CLOCK_SOURCE_DESC + \ @@ -130,7 +152,11 @@ static const uint8_t config_descriptor[] = { AUDIO_V2_AC_INPUT_TERMINAL_DESCRIPTOR_INIT(0x06, AUDIO_INTERM_MIC, 0x05, IN_CHANNEL_NUM, INPUT_CH_ENABLE, 0x0000), AUDIO_V2_AC_FEATURE_UNIT_DESCRIPTOR_INIT(0x07, 0x06, INPUT_CTRL), AUDIO_V2_AC_OUTPUT_TERMINAL_DESCRIPTOR_INIT(0x08, AUDIO_TERMINAL_STREAMING, 0x07, 0x05, 0x0000), +#if USING_FEEDBACK == 0 AUDIO_V2_AS_DESCRIPTOR_INIT(0x01, 0x02, OUT_CHANNEL_NUM, OUTPUT_CH_ENABLE, HALF_WORD_BYTES, SAMPLE_BITS, AUDIO_OUT_EP, 0x09, AUDIO_OUT_PACKET, EP_INTERVAL), +#else + AUDIO_V2_AS_FEEDBACK_DESCRIPTOR_INIT(0x01, 0x02, OUT_CHANNEL_NUM, OUTPUT_CH_ENABLE, HALF_WORD_BYTES, SAMPLE_BITS, AUDIO_OUT_EP, 0x09, AUDIO_OUT_PACKET, EP_INTERVAL, AUDIO_OUT_FEEDBACK_EP), +#endif AUDIO_V2_AS_DESCRIPTOR_INIT(0x02, 0x08, IN_CHANNEL_NUM, INPUT_CH_ENABLE, HALF_WORD_BYTES, SAMPLE_BITS, AUDIO_IN_EP, 0x05, (AUDIO_IN_PACKET + 4), EP_INTERVAL) }; @@ -199,7 +225,11 @@ uint8_t audio_v2_descriptor[] = { AUDIO_V2_AC_INPUT_TERMINAL_DESCRIPTOR_INIT(0x06, AUDIO_INTERM_MIC, 0x05, IN_CHANNEL_NUM, INPUT_CH_ENABLE, 0x0000), AUDIO_V2_AC_FEATURE_UNIT_DESCRIPTOR_INIT(0x07, 0x06, INPUT_CTRL), AUDIO_V2_AC_OUTPUT_TERMINAL_DESCRIPTOR_INIT(0x08, AUDIO_TERMINAL_STREAMING, 0x07, 0x05, 0x0000), +#if USING_FEEDBACK == 0 AUDIO_V2_AS_DESCRIPTOR_INIT(0x01, 0x02, OUT_CHANNEL_NUM, OUTPUT_CH_ENABLE, HALF_WORD_BYTES, SAMPLE_BITS, AUDIO_OUT_EP, 0x09, AUDIO_OUT_PACKET, EP_INTERVAL), +#else + AUDIO_V2_AS_FEEDBACK_DESCRIPTOR_INIT(0x01, 0x02, OUT_CHANNEL_NUM, OUTPUT_CH_ENABLE, HALF_WORD_BYTES, SAMPLE_BITS, AUDIO_OUT_EP, 0x09, AUDIO_OUT_PACKET, EP_INTERVAL, AUDIO_OUT_FEEDBACK_EP), +#endif AUDIO_V2_AS_DESCRIPTOR_INIT(0x02, 0x08, IN_CHANNEL_NUM, INPUT_CH_ENABLE, HALF_WORD_BYTES, SAMPLE_BITS, AUDIO_IN_EP, 0x05, (AUDIO_IN_PACKET + 4), EP_INTERVAL), /////////////////////////////////////// /// string0 descriptor @@ -256,7 +286,11 @@ uint8_t audio_v2_descriptor[] = { '1', 0x00, /* wcChar6 */ '0', 0x00, /* wcChar7 */ '0', 0x00, /* wcChar8 */ - '5', 0x00, /* wcChar9 */ +#if USING_FEEDBACK == 0 + '3', 0x00, /* wcChar9 */ +#else + '4', 0x00, /* wcChar9 */ +#endif #ifdef CONFIG_USB_HS /////////////////////////////////////// /// device qualifier descriptor @@ -308,6 +342,8 @@ USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t write_buffer[AUDIO_IN_PACKET]; volatile bool tx_flag = 0; volatile bool rx_flag = 0; volatile bool ep_tx_busy_flag = false; +volatile uint32_t s_mic_sample_rate; +volatile uint32_t s_speaker_sample_rate; static void usbd_event_handler(uint8_t busid, uint8_t event) { @@ -340,6 +376,16 @@ void usbd_audio_open(uint8_t busid, uint8_t intf) rx_flag = 1; /* setup first out ep read transfer */ usbd_ep_start_read(busid, AUDIO_OUT_EP, read_buffer, AUDIO_OUT_PACKET); +#if USING_FEEDBACK == 1 +#ifdef CONFIG_USB_HS + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_HS(AUDIO_FREQ); + AUDIO_FEEDBACK_TO_BUF_HS(s_speaker_feedback_buffer, feedback_value); +#else + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(AUDIO_FREQ); + AUDIO_FEEDBACK_TO_BUF_FS(s_speaker_feedback_buffer, feedback_value); +#endif + usbd_ep_start_write(busid, AUDIO_OUT_FEEDBACK_EP, s_speaker_feedback_buffer, FEEDBACK_ENDP_PACKET_SIZE); +#endif USB_LOG_RAW("OPEN1\r\n"); } else { tx_flag = 1; @@ -358,6 +404,30 @@ void usbd_audio_close(uint8_t busid, uint8_t intf) } } +void usbd_audio_set_sampling_freq(uint8_t busid, uint8_t ep, uint32_t sampling_freq) +{ + if (ep == AUDIO_OUT_EP) { + s_speaker_sample_rate = sampling_freq; + } else if (ep == AUDIO_IN_EP) { + s_mic_sample_rate = sampling_freq; + } +} + +uint32_t usbd_audio_get_sampling_freq(uint8_t busid, uint8_t ep) +{ + (void)busid; + + uint32_t freq = 0; + + if (ep == AUDIO_OUT_EP) { + freq = s_speaker_sample_rate; + } else if (ep == AUDIO_IN_EP) { + freq = s_mic_sample_rate; + } + + return freq; +} + void usbd_audio_get_sampling_freq_table(uint8_t busid, uint8_t ep, uint8_t **sampling_freq_table) { if (ep == AUDIO_OUT_EP) { @@ -370,13 +440,30 @@ void usbd_audio_get_sampling_freq_table(uint8_t busid, uint8_t ep, uint8_t **sam void usbd_audio_iso_out_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); usbd_ep_start_read(busid, AUDIO_OUT_EP, read_buffer, AUDIO_OUT_PACKET); } void usbd_audio_iso_in_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); + ep_tx_busy_flag = false; +} + +#if USING_FEEDBACK == 1 +void usbd_audio_iso_out_feedback_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + USB_LOG_RAW("actual feedback len:%d\r\n", nbytes); +#ifdef CONFIG_USB_HS + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_HS(s_speaker_sample_rate); + AUDIO_FEEDBACK_TO_BUF_HS(s_speaker_feedback_buffer, feedback_value); +#else + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(s_speaker_sample_rate); + AUDIO_FEEDBACK_TO_BUF_FS(s_speaker_feedback_buffer, feedback_value); +#endif + usbd_ep_start_write(busid, AUDIO_OUT_FEEDBACK_EP, s_speaker_feedback_buffer, FEEDBACK_ENDP_PACKET_SIZE); } +#endif static struct usbd_endpoint audio_out_ep = { .ep_cb = usbd_audio_iso_out_callback, @@ -388,6 +475,13 @@ static struct usbd_endpoint audio_in_ep = { .ep_addr = AUDIO_IN_EP }; +#if USING_FEEDBACK == 1 +static struct usbd_endpoint audio_out_feedback_ep = { + .ep_cb = usbd_audio_iso_out_feedback_callback, + .ep_addr = AUDIO_OUT_FEEDBACK_EP +}; +#endif + struct usbd_interface intf0; struct usbd_interface intf1; struct usbd_interface intf2; @@ -419,6 +513,9 @@ void audio_v2_init(uint8_t busid, uintptr_t reg_base) usbd_add_interface(busid, usbd_audio_init_intf(busid, &intf2, 0x0200, audio_entity_table, 4)); usbd_add_endpoint(busid, &audio_in_ep); usbd_add_endpoint(busid, &audio_out_ep); +#if USING_FEEDBACK == 1 + usbd_add_endpoint(busid, &audio_out_feedback_ep); +#endif usbd_initialize(busid, reg_base, usbd_event_handler); } diff --git a/components/drivers/usb/cherryusb/demo/audio_v2_speaker_multichan_template.c b/components/drivers/usb/cherryusb/demo/audio_v2_speaker_multichan_template.c index b34e03fcd5f..e89c8808100 100644 --- a/components/drivers/usb/cherryusb/demo/audio_v2_speaker_multichan_template.c +++ b/components/drivers/usb/cherryusb/demo/audio_v2_speaker_multichan_template.c @@ -27,9 +27,9 @@ #define AUDIO_OUT_CLOCK_ID 0x01 #define AUDIO_OUT_FU_ID 0x03 -#define AUDIO_FREQ 48000 -#define HALF_WORD_BYTES 2 //2 half word (one channel) -#define SAMPLE_BITS 16 //16 bit per channel +#define AUDIO_OUT_MAX_FREQ 96000 +#define HALF_WORD_BYTES 2 //2 half word (one channel) +#define SAMPLE_BITS 16 //16 bit per channel #define BMCONTROL (AUDIO_V2_FU_CONTROL_MUTE | AUDIO_V2_FU_CONTROL_VOLUME) @@ -61,7 +61,7 @@ #define OUTPUT_CH_ENABLE 0x000000ff #endif -#define AUDIO_OUT_PACKET ((uint32_t)((AUDIO_FREQ * HALF_WORD_BYTES * OUT_CHANNEL_NUM) / 1000)) +#define AUDIO_OUT_PACKET ((uint32_t)((AUDIO_OUT_MAX_FREQ * HALF_WORD_BYTES * OUT_CHANNEL_NUM) / 1000)) #if USING_FEEDBACK == 0 #define USB_AUDIO_CONFIG_DESC_SIZ (9 + \ @@ -228,7 +228,7 @@ const uint8_t audio_v2_descriptor[] = { '0', 0x00, /* wcChar7 */ '0', 0x00, /* wcChar8 */ #if USING_FEEDBACK == 0 - '3', 0x00, /* wcChar9 */ + '3', 0x00, /* wcChar9 */ #else '4', 0x00, /* wcChar9 */ #endif @@ -274,6 +274,7 @@ USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t read_buffer[AUDIO_OUT_PACKET]; USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t s_speaker_feedback_buffer[4]; volatile bool rx_flag = 0; +volatile uint32_t s_speaker_sample_rate; static void usbd_event_handler(uint8_t busid, uint8_t event) { @@ -305,14 +306,16 @@ void usbd_audio_open(uint8_t busid, uint8_t intf) rx_flag = 1; /* setup first out ep read transfer */ usbd_ep_start_read(busid, AUDIO_OUT_EP, read_buffer, AUDIO_OUT_PACKET); +#if USING_FEEDBACK == 1 #ifdef CONFIG_USB_HS - uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_HS(AUDIO_FREQ); + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_HS(s_speaker_sample_rate); AUDIO_FEEDBACK_TO_BUF_HS(s_speaker_feedback_buffer, feedback_value); #else - uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(AUDIO_FREQ); + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(s_speaker_sample_rate); AUDIO_FEEDBACK_TO_BUF_FS(s_speaker_feedback_buffer, feedback_value); #endif usbd_ep_start_write(busid, AUDIO_OUT_FEEDBACK_EP, s_speaker_feedback_buffer, FEEDBACK_ENDP_PACKET_SIZE); +#endif USB_LOG_RAW("OPEN\r\n"); } @@ -322,6 +325,26 @@ void usbd_audio_close(uint8_t busid, uint8_t intf) rx_flag = 0; } +void usbd_audio_set_sampling_freq(uint8_t busid, uint8_t ep, uint32_t sampling_freq) +{ + if (ep == AUDIO_OUT_EP) { + s_speaker_sample_rate = sampling_freq; + } +} + +uint32_t usbd_audio_get_sampling_freq(uint8_t busid, uint8_t ep) +{ + (void)busid; + + uint32_t freq = 0; + + if (ep == AUDIO_OUT_EP) { + freq = s_speaker_sample_rate; + } + + return freq; +} + void usbd_audio_get_sampling_freq_table(uint8_t busid, uint8_t ep, uint8_t **sampling_freq_table) { if (ep == AUDIO_OUT_EP) { @@ -331,19 +354,19 @@ void usbd_audio_get_sampling_freq_table(uint8_t busid, uint8_t ep, uint8_t **sam void usbd_audio_iso_out_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); usbd_ep_start_read(busid, AUDIO_OUT_EP, read_buffer, AUDIO_OUT_PACKET); } #if USING_FEEDBACK == 1 void usbd_audio_iso_out_feedback_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual feedback len:%d\r\n", nbytes); + USB_LOG_RAW("actual feedback len:%d\r\n", (unsigned int)nbytes); #ifdef CONFIG_USB_HS - uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_HS(AUDIO_FREQ); + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_HS(s_speaker_sample_rate); AUDIO_FEEDBACK_TO_BUF_HS(s_speaker_feedback_buffer, feedback_value); #else - uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(AUDIO_FREQ); + uint32_t feedback_value = AUDIO_FREQ_TO_FEEDBACK_FS(s_speaker_sample_rate); AUDIO_FEEDBACK_TO_BUF_FS(s_speaker_feedback_buffer, feedback_value); #endif usbd_ep_start_write(busid, AUDIO_OUT_FEEDBACK_EP, s_speaker_feedback_buffer, FEEDBACK_ENDP_PACKET_SIZE); diff --git a/components/drivers/usb/cherryusb/demo/bootuf2/msc_bootuf2_template.c b/components/drivers/usb/cherryusb/demo/bootuf2/msc_bootuf2_template.c index 7c805699e82..158866057ee 100644 --- a/components/drivers/usb/cherryusb/demo/bootuf2/msc_bootuf2_template.c +++ b/components/drivers/usb/cherryusb/demo/bootuf2/msc_bootuf2_template.c @@ -196,7 +196,7 @@ void usbd_msc_get_cap(uint8_t busid, uint8_t lun, uint32_t *block_num, uint32_t *block_num = bootuf2_get_sector_count(); *block_size = bootuf2_get_sector_size(); - USB_LOG_INFO("sector count:%d, sector size:%d\n", *block_num, *block_size); + USB_LOG_INFO("sector count:%d, sector size:%d\n", (unsigned int)*block_num, (unsigned int)*block_size); } int usbd_msc_sector_read(uint8_t busid, uint8_t lun, uint32_t sector, uint8_t *buffer, uint32_t length) { @@ -231,6 +231,6 @@ void boot2uf2_flash_init(void) int bootuf2_flash_write(uint32_t address, const uint8_t *data, size_t size) { - USB_LOG_INFO("address:%08x, size:%d\n", address, size); + USB_LOG_INFO("address:%08x, size:%d\n", (unsigned int)address, (unsigned int)size); return 0; } \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/demo/cdc_acm_hid_msc_template.c b/components/drivers/usb/cherryusb/demo/cdc_acm_hid_msc_template.c index 40cae68f144..09b680a24a3 100644 --- a/components/drivers/usb/cherryusb/demo/cdc_acm_hid_msc_template.c +++ b/components/drivers/usb/cherryusb/demo/cdc_acm_hid_msc_template.c @@ -8,6 +8,10 @@ #include "usbd_cdc_acm.h" #include "usbd_hid.h" +#if CONFIG_USBDEV_EP_NUM < 7 +#error endpoint number is too small for this demo, please try other chips +#endif + /*!< endpoint address */ #define CDC_IN_EP 0x81 #define CDC_OUT_EP 0x02 @@ -364,14 +368,14 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) void usbd_cdc_acm_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); /* setup next out ep read transfer */ usbd_ep_start_read(busid, CDC_OUT_EP, read_buffer, 2048); } void usbd_cdc_acm_bulk_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { /* send zlp */ diff --git a/components/drivers/usb/cherryusb/demo/cdc_acm_msc_template.c b/components/drivers/usb/cherryusb/demo/cdc_acm_msc_template.c index b35cc34ec6f..2a5db746910 100644 --- a/components/drivers/usb/cherryusb/demo/cdc_acm_msc_template.c +++ b/components/drivers/usb/cherryusb/demo/cdc_acm_msc_template.c @@ -7,6 +7,10 @@ #include "usbd_cdc_acm.h" #include "usbd_msc.h" +#if CONFIG_USBDEV_EP_NUM < 6 +#error endpoint number is too small for this demo, please try other chips +#endif + /*!< endpoint address */ #define CDC_IN_EP 0x81 #define CDC_OUT_EP 0x02 @@ -215,14 +219,14 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) void usbd_cdc_acm_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); /* setup next out ep read transfer */ usbd_ep_start_read(busid, CDC_OUT_EP, read_buffer, 2048); } void usbd_cdc_acm_bulk_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { /* send zlp */ diff --git a/components/drivers/usb/cherryusb/demo/cdc_acm_multi_template.c b/components/drivers/usb/cherryusb/demo/cdc_acm_multi_template.c index 966a817b1eb..12399e5cf50 100644 --- a/components/drivers/usb/cherryusb/demo/cdc_acm_multi_template.c +++ b/components/drivers/usb/cherryusb/demo/cdc_acm_multi_template.c @@ -6,6 +6,10 @@ #include "usbd_core.h" #include "usbd_cdc_acm.h" +#if CONFIG_USBDEV_EP_NUM < 8 +#error endpoint number is too small for this demo, please try other chips +#endif + /*!< endpoint address */ #define CDC_IN_EP 0x81 #define CDC_OUT_EP 0x01 @@ -224,14 +228,14 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) void usbd_cdc_acm_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); /* setup next out ep read transfer */ usbd_ep_start_read(busid, CDC_OUT_EP, read_buffer, 2048); } void usbd_cdc_acm_bulk_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % CDC_MAX_MPS) == 0 && nbytes) { /* send zlp */ diff --git a/components/drivers/usb/cherryusb/demo/cdc_acm_template.c b/components/drivers/usb/cherryusb/demo/cdc_acm_template.c index f8d5c4b9419..3ff8ae2ab69 100644 --- a/components/drivers/usb/cherryusb/demo/cdc_acm_template.c +++ b/components/drivers/usb/cherryusb/demo/cdc_acm_template.c @@ -203,7 +203,7 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) void usbd_cdc_acm_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); // for (int i = 0; i < 100; i++) { // printf("%02x ", read_buffer[i]); // } @@ -214,7 +214,7 @@ void usbd_cdc_acm_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) void usbd_cdc_acm_bulk_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { /* send zlp */ diff --git a/components/drivers/usb/cherryusb/demo/cdc_ecm_template.c b/components/drivers/usb/cherryusb/demo/cdc_ecm_template.c index 70a16af65b6..b259e753196 100644 --- a/components/drivers/usb/cherryusb/demo/cdc_ecm_template.c +++ b/components/drivers/usb/cherryusb/demo/cdc_ecm_template.c @@ -11,9 +11,9 @@ #endif /*!< endpoint address */ -#define CDC_IN_EP 0x81 -#define CDC_OUT_EP 0x02 -#define CDC_INT_EP 0x83 +#define CDC_IN_EP 0x81 +#define CDC_OUT_EP 0x02 +#define CDC_INT_EP 0x83 #define USBD_VID 0xFFFF #define USBD_PID 0xFFFF @@ -21,7 +21,7 @@ #define USBD_LANGID_STRING 1033 /*!< config descriptor size */ -#define USB_CONFIG_SIZE (9 + CDC_ECM_DESCRIPTOR_LEN) +#define USB_CONFIG_SIZE (9 + CDC_ECM_DESCRIPTOR_LEN) #ifdef CONFIG_USB_HS #define CDC_MAX_MPS 512 @@ -32,7 +32,10 @@ #define CDC_ECM_ETH_STATISTICS_BITMAP 0x00000000 /* str idx = 4 is for mac address: aa:bb:cc:dd:ee:ff*/ -#define CDC_ECM_MAC_STRING_INDEX 4 +#define CDC_ECM_MAC_STRING_INDEX 4 + +/* Ethernet Maximum Segment size, typically 1514 bytes */ +#define CONFIG_CDC_ECM_ETH_MAX_SEGSZE 1514U #ifdef CONFIG_USBDEV_ADVANCE_DESC static const uint8_t device_descriptor[] = { @@ -200,11 +203,102 @@ static const uint8_t cdc_ecm_descriptor[] = { const uint8_t mac[6] = { 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff }; +volatile bool cdc_ecm_tx_done = false; + +void usbd_cdc_ecm_data_send_done(uint32_t len) +{ + cdc_ecm_tx_done = true; // suggest you to use semaphore in os +} + +#ifdef RT_USING_LWIP + +#ifndef RT_LWIP_DHCP +#error cdc_ecm must enable RT_LWIP_DHCP +#endif + +#ifndef LWIP_USING_DHCPD +#error cdc_ecm must enable LWIP_USING_DHCPD +#endif + +#include +#include +#include +#include + +struct eth_device cdc_ecm_dev; + +static rt_err_t rt_usbd_cdc_ecm_control(rt_device_t dev, int cmd, void *args) +{ + switch (cmd) { + case NIOCTL_GADDR: + + /* get mac address */ + if (args) { + uint8_t *mac_dev = (uint8_t *)args; + rt_memcpy(mac_dev, mac, 6); + mac_dev[5] = ~mac_dev[5]; /* device mac can't same as host. */ + } else + return -RT_ERROR; + + break; + + default: + break; + } + + return RT_EOK; +} + +struct pbuf *rt_usbd_cdc_ecm_eth_rx(rt_device_t dev) +{ + return usbd_cdc_ecm_eth_rx(); +} + +rt_err_t rt_usbd_cdc_ecm_eth_tx(rt_device_t dev, struct pbuf *p) +{ + int ret; + + cdc_ecm_tx_done = false; + ret = usbd_cdc_ecm_eth_tx(p); + if (ret == 0) { + while (!cdc_ecm_tx_done) { + } + return RT_EOK; + } else + return -RT_ERROR; +} + +void cdc_ecm_lwip_init(void) +{ + cdc_ecm_dev.parent.control = rt_usbd_cdc_ecm_control; + cdc_ecm_dev.eth_rx = rt_usbd_cdc_ecm_eth_rx; + cdc_ecm_dev.eth_tx = rt_usbd_cdc_ecm_eth_tx; + + eth_device_init(&cdc_ecm_dev, "u0"); + + eth_device_linkchange(&cdc_ecm_dev, RT_TRUE); + dhcpd_start("u0"); +} + +void usbd_cdc_ecm_data_recv_done(uint32_t len) +{ + eth_device_ready(&cdc_ecm_dev); +} + +#else +#include "netif/etharp.h" +#include "lwip/init.h" +#include "lwip/netif.h" +#include "lwip/pbuf.h" + +#include "dhserver.h" +#include "dnserver.h" + /*Static IP ADDRESS: IP_ADDR0.IP_ADDR1.IP_ADDR2.IP_ADDR3 */ -#define IP_ADDR0 (uint8_t)192 -#define IP_ADDR1 (uint8_t)168 -#define IP_ADDR2 (uint8_t)123 -#define IP_ADDR3 (uint8_t)100 +#define IP_ADDR0 (uint8_t)192 +#define IP_ADDR1 (uint8_t)168 +#define IP_ADDR2 (uint8_t)7 +#define IP_ADDR3 (uint8_t)1 /*NETMASK*/ #define NETMASK_ADDR0 (uint8_t)255 @@ -213,34 +307,59 @@ const uint8_t mac[6] = { 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff }; #define NETMASK_ADDR3 (uint8_t)0 /*Gateway Address*/ -#define GW_ADDR0 (uint8_t)192 -#define GW_ADDR1 (uint8_t)168 -#define GW_ADDR2 (uint8_t)123 -#define GW_ADDR3 (uint8_t)1 - -#include "netif/etharp.h" -#include "lwip/init.h" -#include "lwip/netif.h" -#include "lwip/pbuf.h" +#define GW_ADDR0 (uint8_t)0 +#define GW_ADDR1 (uint8_t)0 +#define GW_ADDR2 (uint8_t)0 +#define GW_ADDR3 (uint8_t)0 const ip_addr_t ipaddr = IPADDR4_INIT_BYTES(IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3); const ip_addr_t netmask = IPADDR4_INIT_BYTES(NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3); const ip_addr_t gateway = IPADDR4_INIT_BYTES(GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3); +#define NUM_DHCP_ENTRY 3 + +static dhcp_entry_t entries[NUM_DHCP_ENTRY] = { + /* mac ip address subnet mask lease time */ + { { 0 }, { 192, 168, 7, 2 }, { 255, 255, 255, 0 }, 24 * 60 * 60 }, + { { 0 }, { 192, 168, 7, 3 }, { 255, 255, 255, 0 }, 24 * 60 * 60 }, + { { 0 }, { 192, 168, 7, 4 }, { 255, 255, 255, 0 }, 24 * 60 * 60 } +}; + +static dhcp_config_t dhcp_config = { + { 192, 168, 7, 1 }, /* server address */ + 67, /* port */ + { 192, 168, 7, 1 }, /* dns server */ + "cherry", /* dns suffix */ + NUM_DHCP_ENTRY, /* num entry */ + entries /* entries */ +}; + +static bool dns_query_proc(const char *name, ip_addr_t *addr) +{ + if (strcmp(name, "cdc_ecm.cherry") == 0 || strcmp(name, "www.cdc_ecm.cherry") == 0) { + addr->addr = ipaddr.addr; + return true; + } + return false; +} + static struct netif cdc_ecm_netif; //network interface /* Network interface name */ -#define IFNAME0 'E' -#define IFNAME1 'X' +#define IFNAME0 'E' +#define IFNAME1 'X' -static err_t linkoutput_fn(struct netif *netif, struct pbuf *p) +err_t linkoutput_fn(struct netif *netif, struct pbuf *p) { - static int ret; + int ret; + cdc_ecm_tx_done = false; ret = usbd_cdc_ecm_eth_tx(p); - if (ret == 0) + if (ret == 0) { + while (!cdc_ecm_tx_done) { + } return ERR_OK; - else + } else return ERR_BUF; } @@ -260,8 +379,8 @@ err_t cdc_ecm_if_init(struct netif *netif) err_t cdc_ecm_if_input(struct netif *netif) { - static err_t err; - static struct pbuf *p; + err_t err; + struct pbuf *p; p = usbd_cdc_ecm_eth_rx(); if (p != NULL) { @@ -290,9 +409,11 @@ void cdc_ecm_lwip_init(void) while (!netif_is_up(netif)) { } - while (dhserv_init(&dhcp_config)) {} + while (dhserv_init(&dhcp_config)) { + } - while (dnserv_init(&ipaddr, PORT_DNS, dns_query_proc)) {} + while (dnserv_init(IP_ADDR_ANY, 53, dns_query_proc)) { + } } void usbd_cdc_ecm_data_recv_done(uint32_t len) @@ -303,6 +424,7 @@ void cdc_ecm_input_poll(void) { cdc_ecm_if_input(&cdc_ecm_netif); } +#endif static void usbd_event_handler(uint8_t busid, uint8_t event) { @@ -349,4 +471,4 @@ void cdc_ecm_init(uint8_t busid, uintptr_t reg_base) usbd_add_interface(busid, usbd_cdc_ecm_init_intf(&intf0, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP)); usbd_add_interface(busid, usbd_cdc_ecm_init_intf(&intf1, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP)); usbd_initialize(busid, reg_base, usbd_event_handler); -} \ No newline at end of file +} diff --git a/components/drivers/usb/cherryusb/demo/cdc_rndis_template.c b/components/drivers/usb/cherryusb/demo/cdc_rndis_template.c index 1d43f34ad04..ff9526413ae 100644 --- a/components/drivers/usb/cherryusb/demo/cdc_rndis_template.c +++ b/components/drivers/usb/cherryusb/demo/cdc_rndis_template.c @@ -175,32 +175,28 @@ static const uint8_t cdc_rndis_descriptor[] = { #endif const uint8_t mac[6] = { 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff }; -/*Static IP ADDRESS: IP_ADDR0.IP_ADDR1.IP_ADDR2.IP_ADDR3 */ -#define IP_ADDR0 (uint8_t)192 -#define IP_ADDR1 (uint8_t)168 -#define IP_ADDR2 (uint8_t)123 -#define IP_ADDR3 (uint8_t)100 -/*NETMASK*/ -#define NETMASK_ADDR0 (uint8_t)255 -#define NETMASK_ADDR1 (uint8_t)255 -#define NETMASK_ADDR2 (uint8_t)255 -#define NETMASK_ADDR3 (uint8_t)0 +volatile bool rndis_tx_done = false; -/*Gateway Address*/ -#define GW_ADDR0 (uint8_t)192 -#define GW_ADDR1 (uint8_t)168 -#define GW_ADDR2 (uint8_t)123 -#define GW_ADDR3 (uint8_t)1 +void usbd_rndis_data_send_done(uint32_t len) +{ + rndis_tx_done = true; // suggest you to use semaphore in os +} #ifdef RT_USING_LWIP + +#ifndef RT_LWIP_DHCP +#error rndis must enable RT_LWIP_DHCP +#endif + +#ifndef LWIP_USING_DHCPD +#error rndis must enable LWIP_USING_DHCPD +#endif + #include #include #include - -const ip_addr_t ipaddr = IPADDR4_INIT_BYTES(IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3); -const ip_addr_t netmask = IPADDR4_INIT_BYTES(NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3); -const ip_addr_t gateway = IPADDR4_INIT_BYTES(GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3); +#include struct eth_device rndis_dev; @@ -210,13 +206,11 @@ static rt_err_t rt_usbd_rndis_control(rt_device_t dev, int cmd, void *args) case NIOCTL_GADDR: /* get mac address */ - if (args) - { + if (args) { uint8_t *mac_dev = (uint8_t *)args; rt_memcpy(mac_dev, mac, 6); mac_dev[5] = ~mac_dev[5]; /* device mac can't same as host. */ - } - else + } else return -RT_ERROR; break; @@ -235,15 +229,19 @@ struct pbuf *rt_usbd_rndis_eth_rx(rt_device_t dev) rt_err_t rt_usbd_rndis_eth_tx(rt_device_t dev, struct pbuf *p) { - return usbd_rndis_eth_tx(p); -} + int ret; -void usbd_rndis_data_recv_done(uint32_t len) -{ - eth_device_ready(&rndis_dev); + rndis_tx_done = false; + ret = usbd_rndis_eth_tx(p); + if (ret == 0) { + while (!rndis_tx_done) { + } + return RT_EOK; + } else + return -RT_ERROR; } -void rt_usbd_rndis_init(void) +void rndis_lwip_init(void) { rndis_dev.parent.control = rt_usbd_rndis_control; rndis_dev.eth_rx = rt_usbd_rndis_eth_rx; @@ -251,32 +249,90 @@ void rt_usbd_rndis_init(void) eth_device_init(&rndis_dev, "u0"); - eth_device_linkchange(&rndis_dev, RT_FALSE); + eth_device_linkchange(&rndis_dev, RT_TRUE); + dhcpd_start("u0"); +} + +void usbd_rndis_data_recv_done(uint32_t len) +{ + eth_device_ready(&rndis_dev); } + #else #include "netif/etharp.h" #include "lwip/init.h" #include "lwip/netif.h" #include "lwip/pbuf.h" +#include "dhserver.h" +#include "dnserver.h" + +/*Static IP ADDRESS: IP_ADDR0.IP_ADDR1.IP_ADDR2.IP_ADDR3 */ +#define IP_ADDR0 (uint8_t)192 +#define IP_ADDR1 (uint8_t)168 +#define IP_ADDR2 (uint8_t)7 +#define IP_ADDR3 (uint8_t)1 + +/*NETMASK*/ +#define NETMASK_ADDR0 (uint8_t)255 +#define NETMASK_ADDR1 (uint8_t)255 +#define NETMASK_ADDR2 (uint8_t)255 +#define NETMASK_ADDR3 (uint8_t)0 + +/*Gateway Address*/ +#define GW_ADDR0 (uint8_t)0 +#define GW_ADDR1 (uint8_t)0 +#define GW_ADDR2 (uint8_t)0 +#define GW_ADDR3 (uint8_t)0 + const ip_addr_t ipaddr = IPADDR4_INIT_BYTES(IP_ADDR0, IP_ADDR1, IP_ADDR2, IP_ADDR3); const ip_addr_t netmask = IPADDR4_INIT_BYTES(NETMASK_ADDR0, NETMASK_ADDR1, NETMASK_ADDR2, NETMASK_ADDR3); const ip_addr_t gateway = IPADDR4_INIT_BYTES(GW_ADDR0, GW_ADDR1, GW_ADDR2, GW_ADDR3); +#define NUM_DHCP_ENTRY 3 + +static dhcp_entry_t entries[NUM_DHCP_ENTRY] = { + /* mac ip address subnet mask lease time */ + { { 0 }, { 192, 168, 7, 2 }, { 255, 255, 255, 0 }, 24 * 60 * 60 }, + { { 0 }, { 192, 168, 7, 3 }, { 255, 255, 255, 0 }, 24 * 60 * 60 }, + { { 0 }, { 192, 168, 7, 4 }, { 255, 255, 255, 0 }, 24 * 60 * 60 } +}; + +static dhcp_config_t dhcp_config = { + { 192, 168, 7, 1 }, /* server address */ + 67, /* port */ + { 192, 168, 7, 1 }, /* dns server */ + "cherry", /* dns suffix */ + NUM_DHCP_ENTRY, /* num entry */ + entries /* entries */ +}; + +static bool dns_query_proc(const char *name, ip_addr_t *addr) +{ + if (strcmp(name, "rndis.cherry") == 0 || strcmp(name, "www.rndis.cherry") == 0) { + addr->addr = ipaddr.addr; + return true; + } + return false; +} + static struct netif rndis_netif; //network interface /* Network interface name */ -#define IFNAME0 'E' -#define IFNAME1 'X' +#define IFNAME0 'E' +#define IFNAME1 'X' err_t linkoutput_fn(struct netif *netif, struct pbuf *p) { - static int ret; + int ret; + rndis_tx_done = false; ret = usbd_rndis_eth_tx(p); - if (ret == 0) + if (ret == 0) { + while (!rndis_tx_done) { + } return ERR_OK; - else + } else return ERR_BUF; } @@ -296,8 +352,8 @@ err_t rndisif_init(struct netif *netif) err_t rndisif_input(struct netif *netif) { - static err_t err; - static struct pbuf *p; + err_t err; + struct pbuf *p; p = usbd_rndis_eth_rx(); if (p != NULL) { @@ -326,9 +382,11 @@ void rndis_lwip_init(void) while (!netif_is_up(netif)) { } - while (dhserv_init(&dhcp_config)) {} + while (dhserv_init(&dhcp_config)) { + } - while (dnserv_init(&ipaddr, PORT_DNS, dns_query_proc)) {} + while (dnserv_init(IP_ADDR_ANY, 53, dns_query_proc)) { + } } void usbd_rndis_data_recv_done(uint32_t len) @@ -355,9 +413,6 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) case USBD_EVENT_SUSPEND: break; case USBD_EVENT_CONFIGURED: -#ifdef RT_USING_LWIP - eth_device_linkchange(&rndis_dev, RT_TRUE); -#endif break; case USBD_EVENT_SET_REMOTE_WAKEUP: break; @@ -374,17 +429,14 @@ struct usbd_interface intf1; void cdc_rndis_init(uint8_t busid, uintptr_t reg_base) { -#ifdef RT_USING_LWIP - rt_usbd_rndis_init(); -#else rndis_lwip_init(); -#endif + #ifdef CONFIG_USBDEV_ADVANCE_DESC usbd_desc_register(busid, &cdc_rndis_descriptor); #else usbd_desc_register(busid, cdc_rndis_descriptor); #endif - usbd_add_interface(busid, usbd_rndis_init_intf(&intf0, CDC_OUT_EP, CDC_IN_EP, CDC_INT_EP, mac)); - usbd_add_interface(busid, usbd_rndis_init_intf(&intf1, CDC_OUT_EP, CDC_IN_EP, CDC_INT_EP, mac)); + usbd_add_interface(busid, usbd_rndis_init_intf(&intf0, CDC_OUT_EP, CDC_IN_EP, CDC_INT_EP, (uint8_t *)mac)); + usbd_add_interface(busid, usbd_rndis_init_intf(&intf1, CDC_OUT_EP, CDC_IN_EP, CDC_INT_EP, (uint8_t *)mac)); usbd_initialize(busid, reg_base, usbd_event_handler); } diff --git a/components/drivers/usb/cherryusb/demo/hid_custom_inout_template.c b/components/drivers/usb/cherryusb/demo/hid_custom_inout_template.c index 47438d41b6c..419fee2dc8f 100644 --- a/components/drivers/usb/cherryusb/demo/hid_custom_inout_template.c +++ b/components/drivers/usb/cherryusb/demo/hid_custom_inout_template.c @@ -339,13 +339,13 @@ static void usbd_hid_custom_in_callback(uint8_t busid, uint8_t ep, uint32_t nbyt { (void)busid; (void)ep; - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); custom_state = HID_STATE_IDLE; } static void usbd_hid_custom_out_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); usbd_ep_start_read(busid, ep, read_buffer, HIDRAW_IN_EP_SIZE); read_buffer[0] = 0x02; /* IN: report id */ usbd_ep_start_write(busid, HIDRAW_IN_EP, read_buffer, nbytes); diff --git a/components/drivers/usb/cherryusb/demo/msc_ram_template.c b/components/drivers/usb/cherryusb/demo/msc_ram_template.c index 1b19a571b59..ac7d9dbd08c 100644 --- a/components/drivers/usb/cherryusb/demo/msc_ram_template.c +++ b/components/drivers/usb/cherryusb/demo/msc_ram_template.c @@ -189,6 +189,7 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) } } +#if !defined(RT_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV) && !defined(PKG_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV) #define BLOCK_SIZE 512 #define BLOCK_COUNT 10 @@ -217,11 +218,55 @@ int usbd_msc_sector_write(uint8_t busid, uint8_t lun, uint32_t sector, uint8_t * memcpy(mass_block[sector].BlockSpace, buffer, length); return 0; } +#else +#include +#include + +#ifndef CONFIG_USBDEV_MSC_THREAD +#error "Please enable CONFIG_USBDEV_MSC_THREAD, move msc read & write from isr to thread" +#endif + +#ifndef CONFIG_USBDEV_MSC_BLOCK_DEV_NAME +#define CONFIG_USBDEV_MSC_BLOCK_DEV_NAME "sd0" +#endif + +static rt_device_t blk_dev = RT_NULL; +struct rt_device_blk_geometry geometry = { 0 }; + +void usbd_msc_get_cap(uint8_t busid, uint8_t lun, uint32_t *block_num, uint32_t *block_size) +{ + rt_device_control(blk_dev, RT_DEVICE_CTRL_BLK_GETGEOME, &geometry); + + *block_num = geometry.sector_count; + *block_size = geometry.bytes_per_sector; +} + +int usbd_msc_sector_read(uint8_t busid, uint8_t lun, uint32_t sector, uint8_t *buffer, uint32_t length) +{ + rt_device_read(blk_dev, sector, buffer, length / geometry.bytes_per_sector); + return 0; +} + +int usbd_msc_sector_write(uint8_t busid, uint8_t lun, uint32_t sector, uint8_t *buffer, uint32_t length) +{ + rt_device_write(blk_dev, sector, buffer, length / geometry.bytes_per_sector); + return 0; +} +#endif static struct usbd_interface intf0; void msc_ram_init(uint8_t busid, uintptr_t reg_base) { +#if defined(RT_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV) || defined(PKG_CHERRYUSB_DEVICE_TEMPLATE_MSC_BLKDEV) + rt_err_t res; + + blk_dev = rt_device_find(CONFIG_USBDEV_MSC_BLOCK_DEV_NAME); + RT_ASSERT(blk_dev); + + res = rt_device_open(blk_dev, RT_DEVICE_OFLAG_RDWR); + RT_ASSERT(res == RT_EOK); +#endif #ifdef CONFIG_USBDEV_ADVANCE_DESC usbd_desc_register(busid, &msc_ram_descriptor); #else diff --git a/components/drivers/usb/cherryusb/demo/mtp_template.c b/components/drivers/usb/cherryusb/demo/mtp_template.c new file mode 100644 index 00000000000..11950d26542 --- /dev/null +++ b/components/drivers/usb/cherryusb/demo/mtp_template.c @@ -0,0 +1,250 @@ +/* + * Copyright (c) 2025 sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + * + */ + +#include "usbd_core.h" +#include "usbd_mtp.h" + +#if 1 +#error "commercial charge" +#endif + +#ifndef CONFIG_USBDEV_MTP_THREAD +#warning mtp depends on filesystem, suggest to enable CONFIG_USBDEV_MTP_THREAD +#endif + +#define WCID_VENDOR_CODE 0x01 + +__ALIGN_BEGIN const uint8_t WCID_StringDescriptor_MSOS[18] __ALIGN_END = { + /////////////////////////////////////// + /// MS OS string descriptor + /////////////////////////////////////// + 0x12, /* bLength */ + USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */ + /* MSFT100 */ + 'M', 0x00, 'S', 0x00, 'F', 0x00, 'T', 0x00, /* wcChar_7 */ + '1', 0x00, '0', 0x00, '0', 0x00, /* wcChar_7 */ + WCID_VENDOR_CODE, /* bVendorCode */ + 0x00, /* bReserved */ +}; + +__ALIGN_BEGIN const uint8_t WINUSB_WCIDDescriptor[40] __ALIGN_END = { + /////////////////////////////////////// + /// WCID descriptor + /////////////////////////////////////// + 0x28, 0x00, 0x00, 0x00, /* dwLength */ + 0x00, 0x01, /* bcdVersion */ + 0x04, 0x00, /* wIndex */ + 0x01, /* bCount */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* bReserved_7 */ + + /////////////////////////////////////// + /// WCID function descriptor + /////////////////////////////////////// + 0x00, /* bFirstInterfaceNumber */ + 0x01, /* bReserved */ + /* MTP */ + 'M', 'T', 'P', 0x00, 0x00, 0x00, 0x00, 0x00, /* cCID_8 */ + /* */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* cSubCID_8 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* bReserved_6 */ +}; + +__ALIGN_BEGIN const uint8_t WINUSB_IF0_WCIDProperties[142] __ALIGN_END = { + /////////////////////////////////////// + /// WCID property descriptor + /////////////////////////////////////// + 0x8e, 0x00, 0x00, 0x00, /* dwLength */ + 0x00, 0x01, /* bcdVersion */ + 0x05, 0x00, /* wIndex */ + 0x01, 0x00, /* wCount */ + + /////////////////////////////////////// + /// registry propter descriptor + /////////////////////////////////////// + 0x84, 0x00, 0x00, 0x00, /* dwSize */ + 0x01, 0x00, 0x00, 0x00, /* dwPropertyDataType */ + 0x28, 0x00, /* wPropertyNameLength */ + /* DeviceInterfaceGUID */ + 'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00, /* wcName_20 */ + 'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00, /* wcName_20 */ + 't', 0x00, 'e', 0x00, 'r', 0x00, 'f', 0x00, /* wcName_20 */ + 'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00, /* wcName_20 */ + 'U', 0x00, 'I', 0x00, 'D', 0x00, 0x00, 0x00, /* wcName_20 */ + 0x4e, 0x00, 0x00, 0x00, /* dwPropertyDataLength */ + + /* {1D4B2365-4749-48EA-B38A-7C6FDDDD7E26} */ + '{', 0x00, '1', 0x00, 'D', 0x00, '4', 0x00, /* wcData_39 */ + 'B', 0x00, '2', 0x00, '3', 0x00, '6', 0x00, /* wcData_39 */ + '5', 0x00, '-', 0x00, '4', 0x00, '7', 0x00, /* wcData_39 */ + '4', 0x00, '9', 0x00, '-', 0x00, '4', 0x00, /* wcData_39 */ + '8', 0x00, 'E', 0x00, 'A', 0x00, '-', 0x00, /* wcData_39 */ + 'B', 0x00, '3', 0x00, '8', 0x00, 'A', 0x00, /* wcData_39 */ + '-', 0x00, '7', 0x00, 'C', 0x00, '6', 0x00, /* wcData_39 */ + 'F', 0x00, 'D', 0x00, 'D', 0x00, 'D', 0x00, /* wcData_39 */ + 'D', 0x00, '7', 0x00, 'E', 0x00, '2', 0x00, /* wcData_39 */ + '6', 0x00, '}', 0x00, 0x00, 0x00, /* wcData_39 */ + +}; + +const uint8_t bos_descriptor[] = { + 0x05, 0x0f, 0x16, 0x00, 0x02, + 0x07, 0x10, 0x02, 0x06, 0x00, 0x00, 0x00, + 0x0a, 0x10, 0x03, 0x00, 0x0f, 0x00, 0x01, 0x01, 0xf4, 0x01 +}; + +/*!< endpoint address */ +#define MTP_IN_EP 0x81 +#define MTP_OUT_EP 0x02 +#define MTP_INT_EP 0x83 + +/*!< config descriptor size */ +#define USB_CONFIG_SIZE (9 + MTP_DESCRIPTOR_LEN) + +static const uint8_t device_descriptor[] = { + USB_DEVICE_DESCRIPTOR_INIT(USB_2_0, 0x00, 0x00, 0x00, USBD_VID, USBD_PID, 0x0201, 0x01) +}; + +static const uint8_t config_descriptor_hs[] = { + USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x01, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + MTP_DESCRIPTOR_INIT(0x00, MTP_OUT_EP, MTP_IN_EP, MTP_INT_EP, USB_BULK_EP_MPS_HS, 0x02), +}; + +static const uint8_t config_descriptor_fs[] = { + USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x01, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + MTP_DESCRIPTOR_INIT(0x00, MTP_OUT_EP, MTP_IN_EP, MTP_INT_EP, USB_BULK_EP_MPS_FS, 0x02), +}; + +static const uint8_t device_quality_descriptor[] = { + USB_DEVICE_QUALIFIER_DESCRIPTOR_INIT(USB_2_0, 0x00, 0x00, 0x00, 0x01), +}; + +static const uint8_t other_speed_config_descriptor_hs[] = { + USB_OTHER_SPEED_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x01, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + MTP_DESCRIPTOR_INIT(0x00, MTP_OUT_EP, MTP_IN_EP, MTP_INT_EP, USB_BULK_EP_MPS_FS, 0x02), +}; + +static const uint8_t other_speed_config_descriptor_fs[] = { + USB_OTHER_SPEED_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x01, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + MTP_DESCRIPTOR_INIT(0x00, MTP_OUT_EP, MTP_IN_EP, MTP_INT_EP, USB_BULK_EP_MPS_HS, 0x02), +}; + +static const char *string_descriptors[] = { + (const char[]){ 0x09, 0x04 }, /* Langid */ + "CherryUSB", /* Manufacturer */ + "CherryUSB MTP DEMO", /* Product */ + "2025053000", /* Serial Number */ +}; + +static const uint8_t *device_descriptor_callback(uint8_t speed) +{ + (void)speed; + + return device_descriptor; +} + +static const uint8_t *config_descriptor_callback(uint8_t speed) +{ + if (speed == USB_SPEED_HIGH) { + return config_descriptor_hs; + } else if (speed == USB_SPEED_FULL) { + return config_descriptor_fs; + } else { + return NULL; + } +} + +static const uint8_t *device_quality_descriptor_callback(uint8_t speed) +{ + (void)speed; + + return device_quality_descriptor; +} + +static const uint8_t *other_speed_config_descriptor_callback(uint8_t speed) +{ + if (speed == USB_SPEED_HIGH) { + return other_speed_config_descriptor_hs; + } else if (speed == USB_SPEED_FULL) { + return other_speed_config_descriptor_fs; + } else { + return NULL; + } +} + +static const char *string_descriptor_callback(uint8_t speed, uint8_t index) +{ + (void)speed; + + if (index >= (sizeof(string_descriptors) / sizeof(char *))) { + return NULL; + } + return string_descriptors[index]; +} + +const uint8_t *WINUSB_IFx_WCIDProperties[] = { + WINUSB_IF0_WCIDProperties, +}; + +struct usb_msosv1_descriptor msosv1_desc = { + .string = WCID_StringDescriptor_MSOS, + .vendor_code = WCID_VENDOR_CODE, + .compat_id = WINUSB_WCIDDescriptor, + .comp_id_property = WINUSB_IFx_WCIDProperties, +}; + +const struct usb_bos_descriptor bos_desc = { + .string = bos_descriptor, + .string_len = 22 +}; + +const struct usb_descriptor mtp_descriptor = { + .device_descriptor_callback = device_descriptor_callback, + .config_descriptor_callback = config_descriptor_callback, + .device_quality_descriptor_callback = device_quality_descriptor_callback, + .other_speed_descriptor_callback = other_speed_config_descriptor_callback, + .string_descriptor_callback = string_descriptor_callback, + .bos_descriptor = &bos_desc, + .msosv1_descriptor = &msosv1_desc, +}; + +static void usbd_event_handler(uint8_t busid, uint8_t event) +{ + switch (event) { + case USBD_EVENT_RESET: + break; + case USBD_EVENT_CONNECTED: + break; + case USBD_EVENT_DISCONNECTED: + break; + case USBD_EVENT_RESUME: + break; + case USBD_EVENT_SUSPEND: + break; + case USBD_EVENT_CONFIGURED: + break; + case USBD_EVENT_SET_REMOTE_WAKEUP: + break; + case USBD_EVENT_CLR_REMOTE_WAKEUP: + break; + + default: + break; + } +} + +static struct usbd_interface intf0; + +extern void usbd_mtp_mount(); + +void mtp_init(uint8_t busid, uint32_t reg_base) +{ + usbd_mtp_mount(); + + usbd_desc_register(busid, &mtp_descriptor); + usbd_add_interface(busid, usbd_mtp_init_intf(&intf0, MTP_OUT_EP, MTP_IN_EP, MTP_INT_EP)); + usbd_initialize(busid, reg_base, usbd_event_handler); +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/demo/music_16k_ac1.h b/components/drivers/usb/cherryusb/demo/music_16k_ac1.h deleted file mode 100644 index 86807d79971..00000000000 --- a/components/drivers/usb/cherryusb/demo/music_16k_ac1.h +++ /dev/null @@ -1,109183 +0,0 @@ -const unsigned char music[] = { - 0x24, 0xF1, 0x15, 0xF8, 0x83, 0xF6, 0x46, 0xEF, 0xAB, 0xE6, 0x6B, 0xE0, 0x69, 0xE0, 0xAD, 0xE4, - 0x8A, 0xE8, 0x75, 0xEB, 0xCC, 0xEF, 0x65, 0xF7, 0x5B, 0xFE, 0x50, 0xFC, 0xE7, 0xF1, 0x31, 0xE7, - 0xC2, 0xE4, 0x25, 0xEB, 0xC0, 0xEF, 0xF1, 0xF0, 0x41, 0xF3, 0x25, 0xF7, 0x97, 0x01, 0xF9, 0x0C, - 0xD8, 0x10, 0xB1, 0x10, 0x67, 0x10, 0x81, 0x13, 0xBF, 0x14, 0x6E, 0x12, 0xF9, 0x0E, 0x1F, 0x08, - 0x89, 0x03, 0xBA, 0x04, 0x54, 0x06, 0x4D, 0x03, 0xE3, 0xFE, 0xBB, 0xFE, 0x08, 0x04, 0xF5, 0x08, - 0xC9, 0x09, 0xDF, 0x0D, 0xDE, 0x14, 0x88, 0x1A, 0xED, 0x1D, 0xBA, 0x1E, 0x03, 0x1E, 0xEF, 0x1A, - 0x2F, 0x17, 0xBD, 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#ifndef TEST_USBH_AUDIO #define TEST_USBH_AUDIO 0 #endif @@ -54,7 +57,7 @@ void usbh_cdc_acm_callback(void *arg, int nbytes) for (size_t i = 0; i < nbytes; i++) { USB_LOG_RAW("0x%02x ", cdc_buffer[i]); } - USB_LOG_RAW("nbytes:%d\r\n", nbytes); + USB_LOG_RAW("nbytes:%d\r\n", (unsigned int)nbytes); } } @@ -82,7 +85,7 @@ static void usbh_cdc_acm_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) } } uint32_t time_ms = xTaskGetTickCount() - start_time; - USB_LOG_RAW("per packet len:%d, out speed:%f MB/S\r\n", test_len[j], (test_len[j] * TEST_COUNT / 1024 / 1024) * 1000 / ((float)time_ms)); + USB_LOG_RAW("per packet len:%d, out speed:%f MB/S\r\n", (unsigned int)test_len[j], (test_len[j] * TEST_COUNT / 1024 / 1024) * 1000 / ((float)time_ms)); } #endif memset(cdc_buffer, 0x55, 4096); @@ -94,7 +97,7 @@ static void usbh_cdc_acm_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) USB_LOG_RAW("bulk out error,ret:%d\r\n", ret); goto delete; } else { - USB_LOG_RAW("send over:%d\r\n", cdc_acm_class->bulkout_urb.actual_length); + USB_LOG_RAW("send over:%d\r\n", (unsigned int)cdc_acm_class->bulkout_urb.actual_length); } /* we can change cdc_acm_class->bulkin->wMaxPacketSize with 4096 for testing zlp, default is ep mps */ @@ -123,7 +126,7 @@ void usbh_hid_callback(void *arg, int nbytes) for (int i = 0; i < nbytes; i++) { USB_LOG_RAW("0x%02x ", hid_buffer[i]); } - USB_LOG_RAW("nbytes:%d\r\n", nbytes); + USB_LOG_RAW("nbytes:%d\r\n", (unsigned int)nbytes); usbh_int_urb_fill(&hid_class->intin_urb, hid_class->hport, hid_class->intin, hid_buffer, hid_class->intin->wMaxPacketSize, 0, usbh_hid_callback, hid_class); usbh_submit_urb(&hid_class->intin_urb); } else if (nbytes == -USB_ERR_NAK) { /* only dwc2 should do this */ @@ -159,7 +162,14 @@ static void usbh_hid_thread(CONFIG_USB_OSAL_THREAD_SET_ARGV) #if TEST_USBH_MSC_FATFS #include "ff.h" +#if TEST_USBH_MSC_FATFS_SPEED +#define WRITE_SIZE_MB (128UL) +#define WRITE_SIZE (1024UL * 1024UL * WRITE_SIZE_MB) +#define BUF_SIZE (1024UL * 128UL) +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t read_write_buffer[BUF_SIZE]; +#else USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t read_write_buffer[25 * 100]; +#endif USB_NOCACHE_RAM_SECTION FATFS fs; USB_NOCACHE_RAM_SECTION FIL fnew; @@ -170,14 +180,14 @@ int usb_msc_fatfs_test() { const char *tmp_data = "cherryusb fatfs demo...\r\n"; - USB_LOG_RAW("data len:%d\r\n", strlen(tmp_data)); + USB_LOG_RAW("data len:%d\r\n", (unsigned int)strlen(tmp_data)); for (uint32_t i = 0; i < 100; i++) { memcpy(&read_write_buffer[i * 25], tmp_data, strlen(tmp_data)); } res_sd = f_mount(&fs, "2:", 1); if (res_sd != FR_OK) { - USB_LOG_RAW("mount fail,res:%d\r\n", res_sd); + USB_LOG_RAW("mount fail,res:%d\r\n", (unsigned int)res_sd); return -1; } @@ -212,6 +222,64 @@ int usb_msc_fatfs_test() USB_LOG_RAW("open fail\r\n"); goto unmount; } + +#if TEST_USBH_MSC_FATFS_SPEED + for (uint32_t i = 0; i < BUF_SIZE; i++) { + read_write_buffer[i] = i % 256; + } + + USB_LOG_RAW("test fatfs write speed\r\n"); + res_sd = f_open(&fnew, "2:cherryusb_msc_test.bin", FA_OPEN_ALWAYS | FA_WRITE); + if (res_sd == FR_OK) { + uint32_t write_size = WRITE_SIZE; + uint32_t start_time = (uint32_t)xTaskGetTickCount(); + while (write_size > 0) { + res_sd = f_write(&fnew, read_write_buffer, BUF_SIZE, (UINT*)&fnum); + if (res_sd != FR_OK) { + printf("Write file failed, cause: %s\n", res_sd); + goto unmount; + } + write_size -= BUF_SIZE; + } + if (res_sd == FR_OK) { + uint32_t time_ms = xTaskGetTickCount() - start_time; + USB_LOG_RAW("Fatfs write speed:%f MB/S\r\n", (WRITE_SIZE_MB * 1000 / (float)time_ms)); + } else { + USB_LOG_RAW("write fail\r\n"); + goto unmount; + } + f_close(&fnew); + } else { + USB_LOG_RAW("open fail\r\n"); + goto unmount; + } + USB_LOG_RAW("test fatfs read speed\r\n"); + + res_sd = f_open(&fnew, "2:cherryusb_msc_test.bin", FA_OPEN_EXISTING | FA_READ); + if (res_sd == FR_OK) { + uint32_t write_size = WRITE_SIZE; + uint32_t start_time = (uint32_t)xTaskGetTickCount(); + while (write_size > 0) { + res_sd = f_read(&fnew, read_write_buffer, BUF_SIZE, (UINT*)&fnum); + if (res_sd != FR_OK) { + printf("Read file failed, cause: %s\n", res_sd); + goto unmount; + } + write_size -= BUF_SIZE; + } + if (res_sd == FR_OK) { + uint32_t time_ms = xTaskGetTickCount() - start_time; + USB_LOG_RAW("Fatfs read speed:%f MB/S\r\n", (WRITE_SIZE_MB * 1000 / (float)time_ms)); + } else { + USB_LOG_RAW("read fail\r\n"); + goto unmount; + } + f_close(&fnew); + } else { + USB_LOG_RAW("open fail\r\n"); + goto unmount; + } +#endif f_mount(NULL, "2:", 1); return 0; unmount: diff --git a/components/drivers/usb/cherryusb/demo/video_audiov1_hid_template.c b/components/drivers/usb/cherryusb/demo/video_audiov1_hid_template.c index 0241b5d7a37..1d1948c9696 100644 --- a/components/drivers/usb/cherryusb/demo/video_audiov1_hid_template.c +++ b/components/drivers/usb/cherryusb/demo/video_audiov1_hid_template.c @@ -487,13 +487,13 @@ void usbd_audio_close(uint8_t busid, uint8_t intf) void usbd_audio_out_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); usbd_ep_start_read(busid, AUDIO_OUT_EP, audio_read_buffer, AUDIO_OUT_PACKET); } void usbd_audio_in_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); audio_iso_tx_busy = false; } diff --git a/components/drivers/usb/cherryusb/demo/video_static_h264_template.c b/components/drivers/usb/cherryusb/demo/video_static_h264_template.c index 607376720db..a472244b224 100644 --- a/components/drivers/usb/cherryusb/demo/video_static_h264_template.c +++ b/components/drivers/usb/cherryusb/demo/video_static_h264_template.c @@ -7,8 +7,6 @@ #include "usbd_video.h" #include "cherryusb_h264.h" -#define MAX_PACKETS_IN_ONE_TRANSFER 1 - #define VIDEO_IN_EP 0x81 #define VIDEO_INT_EP 0x83 @@ -282,7 +280,8 @@ void video_init(uint8_t busid, uintptr_t reg_base) usbd_initialize(busid, reg_base, usbd_event_handler); } -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t packet_buffer[2][40 * 1024]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t packet_buffer[MAX_PAYLOAD_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t frame_buffer[32 * 1024]; void video_test(uint8_t busid) { @@ -294,7 +293,8 @@ void video_test(uint8_t busid) while (1) { if (tx_flag) { iso_tx_busy = true; - usbd_video_stream_start_write(busid, VIDEO_IN_EP, &packet_buffer[0][0], &packet_buffer[1][0], MAX_PACKETS_IN_ONE_TRANSFER * MAX_PAYLOAD_SIZE, (uint8_t *)cherryusb_h264, sizeof(cherryusb_h264)); + memcpy(frame_buffer, cherryusb_h264, sizeof(cherryusb_h264)); // cherryusb_h264 is a static yuyv frame buffer, so we need copy it to frame_buffer + usbd_video_stream_start_write(busid, VIDEO_IN_EP, packet_buffer, (uint8_t *)frame_buffer, sizeof(cherryusb_h264), false); while (iso_tx_busy) { if (tx_flag == 0) { break; diff --git a/components/drivers/usb/cherryusb/demo/video_static_mjpeg_template.c b/components/drivers/usb/cherryusb/demo/video_static_mjpeg_template.c index 0e77b38dc46..667a2fbb33b 100644 --- a/components/drivers/usb/cherryusb/demo/video_static_mjpeg_template.c +++ b/components/drivers/usb/cherryusb/demo/video_static_mjpeg_template.c @@ -7,8 +7,6 @@ #include "usbd_video.h" #include "cherryusb_mjpeg.h" -#define MAX_PACKETS_IN_ONE_TRANSFER 1 - #define VIDEO_IN_EP 0x81 #define VIDEO_INT_EP 0x83 @@ -282,7 +280,8 @@ void video_init(uint8_t busid, uintptr_t reg_base) usbd_initialize(busid, reg_base, usbd_event_handler); } -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t packet_buffer[2][MAX_PACKETS_IN_ONE_TRANSFER * MAX_PAYLOAD_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t packet_buffer[MAX_PAYLOAD_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t frame_buffer[32 * 1024]; void video_test(uint8_t busid) { @@ -291,7 +290,8 @@ void video_test(uint8_t busid) while (1) { if (tx_flag) { iso_tx_busy = true; - usbd_video_stream_start_write(busid, VIDEO_IN_EP, &packet_buffer[0][0], &packet_buffer[1][0], MAX_PACKETS_IN_ONE_TRANSFER * MAX_PAYLOAD_SIZE, (uint8_t *)cherryusb_mjpeg, sizeof(cherryusb_mjpeg)); + memcpy(frame_buffer, cherryusb_mjpeg, sizeof(cherryusb_mjpeg)); // cherryusb_mjpeg is a static MJPEG frame buffer, so we need copy it to frame_buffer + usbd_video_stream_start_write(busid, VIDEO_IN_EP, packet_buffer, (uint8_t *)frame_buffer, sizeof(cherryusb_mjpeg), false); while (iso_tx_busy) { if (tx_flag == 0) { break; diff --git a/components/drivers/usb/cherryusb/demo/video_static_yuyv_template.c b/components/drivers/usb/cherryusb/demo/video_static_yuyv_template.c index 1aca76d0251..6b5da39d46f 100644 --- a/components/drivers/usb/cherryusb/demo/video_static_yuyv_template.c +++ b/components/drivers/usb/cherryusb/demo/video_static_yuyv_template.c @@ -7,8 +7,6 @@ #include "usbd_video.h" #include "cherryusb_yuyv.h" -#define MAX_PACKETS_IN_ONE_TRANSFER 1 - #define VIDEO_IN_EP 0x81 #define VIDEO_INT_EP 0x83 @@ -286,7 +284,8 @@ void video_init(uint8_t busid, uintptr_t reg_base) usbd_initialize(busid, reg_base, usbd_event_handler); } -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t packet_buffer[2][MAX_PACKETS_IN_ONE_TRANSFER * MAX_PAYLOAD_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t packet_buffer[MAX_PAYLOAD_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t frame_buffer[32 * 1024]; void video_test(uint8_t busid) { @@ -295,7 +294,8 @@ void video_test(uint8_t busid) while (1) { if (tx_flag) { iso_tx_busy = true; - usbd_video_stream_start_write(busid, VIDEO_IN_EP, &packet_buffer[0][0], &packet_buffer[1][0], MAX_PACKETS_IN_ONE_TRANSFER * MAX_PAYLOAD_SIZE, (uint8_t *)cherryusb_yuyv, sizeof(cherryusb_yuyv)); + memcpy(frame_buffer, cherryusb_yuyv, sizeof(cherryusb_yuyv)); // cherryusb_yuyv is a static yuyv frame buffer, so we need copy it to frame_buffer + usbd_video_stream_start_write(busid, VIDEO_IN_EP, packet_buffer, (uint8_t *)frame_buffer, sizeof(cherryusb_yuyv), false); while (iso_tx_busy) { if (tx_flag == 0) { break; diff --git a/components/drivers/usb/cherryusb/demo/winusb1.0_template.c b/components/drivers/usb/cherryusb/demo/winusb1.0_template.c index 6568939cc49..c8fd406a25d 100644 --- a/components/drivers/usb/cherryusb/demo/winusb1.0_template.c +++ b/components/drivers/usb/cherryusb/demo/winusb1.0_template.c @@ -444,7 +444,7 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) void usbd_winusb_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); // for (int i = 0; i < 100; i++) { // printf("%02x ", read_buffer[i]); // } @@ -456,7 +456,7 @@ void usbd_winusb_out(uint8_t busid, uint8_t ep, uint32_t nbytes) void usbd_winusb_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % WINUSB_EP_MPS) == 0 && nbytes) { /* send zlp */ @@ -482,7 +482,7 @@ struct usbd_interface intf0; void usbd_winusb_out2(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); // for (int i = 0; i < 100; i++) { // printf("%02x ", read_buffer[i]); // } @@ -494,7 +494,7 @@ void usbd_winusb_out2(uint8_t busid, uint8_t ep, uint32_t nbytes) void usbd_winusb_in2(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { /* send zlp */ diff --git a/components/drivers/usb/cherryusb/demo/winusb2.0_cdc_template.c b/components/drivers/usb/cherryusb/demo/winusb2.0_cdc_template.c index 34e646efa68..4e2a0c0b822 100644 --- a/components/drivers/usb/cherryusb/demo/winusb2.0_cdc_template.c +++ b/components/drivers/usb/cherryusb/demo/winusb2.0_cdc_template.c @@ -6,6 +6,10 @@ #include "usbd_core.h" #include "usbd_cdc_acm.h" +#if CONFIG_USBDEV_EP_NUM < 6 +#error endpoint number is too small for this demo, please try other chips +#endif + #define WINUSB_IN_EP 0x81 #define WINUSB_OUT_EP 0x02 @@ -348,7 +352,7 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) void usbd_winusb_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); // for (int i = 0; i < 100; i++) { // printf("%02x ", read_buffer[i]); // } @@ -360,7 +364,7 @@ void usbd_winusb_out(uint8_t busid, uint8_t ep, uint32_t nbytes) void usbd_winusb_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { /* send zlp */ @@ -372,7 +376,7 @@ void usbd_winusb_in(uint8_t busid, uint8_t ep, uint32_t nbytes) void usbd_cdc_acm_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); // for (int i = 0; i < 100; i++) { // printf("%02x ", read_buffer[i]); // } @@ -384,7 +388,7 @@ void usbd_cdc_acm_out(uint8_t busid, uint8_t ep, uint32_t nbytes) void usbd_cdc_acm_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { /* send zlp */ diff --git a/components/drivers/usb/cherryusb/demo/winusb2.0_hid_template.c b/components/drivers/usb/cherryusb/demo/winusb2.0_hid_template.c index 1fc6de35652..5865b088fd1 100644 --- a/components/drivers/usb/cherryusb/demo/winusb2.0_hid_template.c +++ b/components/drivers/usb/cherryusb/demo/winusb2.0_hid_template.c @@ -6,6 +6,10 @@ #include "usbd_core.h" #include "usbd_hid.h" +#if CONFIG_USBDEV_EP_NUM < 4 +#error endpoint number is too small for this demo, please try other chips +#endif + #define WINUSB_IN_EP 0x81 #define WINUSB_OUT_EP 0x02 @@ -413,7 +417,7 @@ static void usbd_event_handler(uint8_t busid, uint8_t event) void usbd_winusb_out(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual out len:%d\r\n", nbytes); + USB_LOG_RAW("actual out len:%d\r\n", (unsigned int)nbytes); // for (int i = 0; i < 100; i++) { // printf("%02x ", read_buffer[i]); // } @@ -425,7 +429,7 @@ void usbd_winusb_out(uint8_t busid, uint8_t ep, uint32_t nbytes) void usbd_winusb_in(uint8_t busid, uint8_t ep, uint32_t nbytes) { - USB_LOG_RAW("actual in len:%d\r\n", nbytes); + USB_LOG_RAW("actual in len:%d\r\n", (unsigned int)nbytes); if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { /* send zlp */ diff --git a/components/drivers/usb/cherryusb/idf_component.yml b/components/drivers/usb/cherryusb/idf_component.yml index b34f4759bf4..ba8b5d4b719 100644 --- a/components/drivers/usb/cherryusb/idf_component.yml +++ b/components/drivers/usb/cherryusb/idf_component.yml @@ -1,4 +1,4 @@ -version: "1.4.3" +version: "1.5.0" description: CherryUSB is a tiny and portable USB Stack (device & host) for embedded system with USB IP tags: - usb diff --git a/components/drivers/usb/cherryusb/osal/usb_osal_rtthread.c b/components/drivers/usb/cherryusb/osal/usb_osal_rtthread.c index dd1075a5fa0..8454283f04d 100644 --- a/components/drivers/usb/cherryusb/osal/usb_osal_rtthread.c +++ b/components/drivers/usb/cherryusb/osal/usb_osal_rtthread.c @@ -34,6 +34,23 @@ void usb_osal_thread_delete(usb_osal_thread_t thread) rt_thread_delete(thread); } +void usb_osal_thread_schedule_other(void) +{ + rt_thread_t self = rt_thread_self(); + rt_uint8_t priority; +#if (RTTHREAD_VERSION >= RT_VERSION_CHECK(5, 2, 0)) + const rt_uint8_t old_priority = RT_SCHED_PRIV(self).current_priority; +#else + const rt_uint8_t old_priority = self->current_priority; +#endif + priority = RT_THREAD_PRIORITY_MAX - 1; + rt_thread_control(self, RT_THREAD_CTRL_CHANGE_PRIORITY, (void *)&priority); + + rt_thread_yield(); + + rt_thread_control(self, RT_THREAD_CTRL_CHANGE_PRIORITY, (void *)&old_priority); +} + usb_osal_sem_t usb_osal_sem_create(uint32_t initial_count) { usb_osal_sem_t sem = (usb_osal_sem_t)rt_sem_create("usbh_sem", initial_count, RT_IPC_FLAG_FIFO); diff --git a/components/drivers/usb/cherryusb/platform/README.md b/components/drivers/usb/cherryusb/platform/README.md index a6afc93ef3c..35f0cdd7955 100644 --- a/components/drivers/usb/cherryusb/platform/README.md +++ b/components/drivers/usb/cherryusb/platform/README.md @@ -1,14 +1,58 @@ # Platform Support -This is a platform support for other os with their own components. - -| Platform | fs | net | serial | -|:---------:|:------------:|:------------:|:------------:| -|none | fatfs | lwip | none | -|rtthread | dfs | lwip | rt_device | -|nuttx | nuttx block driver | nuttx net | nuttx char driver| -|threadx | filex | netx | none | - -- **fs** is for usbd_msc and usbh_msc -- **net** is for cdc_ecm, cdc_rndis, cdc_ncm, asix, rtl8152 and so on. -- **serial** is for cdc_acm, ch340, ftdi, cp210x, pl2303 and so on. \ No newline at end of file +This is a platform support for other opensource projects. + + +## Fatfs + +- Fatfs support with usb host msc. +- Fatfs support with usb device mtp. + +## lwip + +lwip support with usb host net class(cdc_ecm/cdc_ncm/cdc_rndis/asix/rtl8152/bl616_wifi). + +## RT-Thread + +- rt_device support with usb device msc. +- DFS support with usb host msc. +- lwip support with usb host net class(cdc_ecm/cdc_ncm/cdc_rndis/asix/rtl8152/bl616_wifi). +- msh support with lsusb + + +## Nuttx + +- char device support fowithr usb device cdc acm. +- char device support with usb host cdc acm. +- fs support with usb device msc. +- fs support with usb host msc. +- net support with usb host net class(cdc_rndis). + +## Threadx + +- filx support with usb host msc. + +## Zephyr + +- shell support with lsusb +- disk support with usb host msc + +## LVGL + +- lvgl indev support with usb host mouse and keyboard. support both LVGL8.x.x and LVGL9.x.x + +## Blackmagic + +Blackmagic support with usb device cdc acm. + +## DAPLINK + +DAPLINK v2.1 support with usb device cdc acm + winusb(hid and msc optional). + +## UF2 + +UF2 support with usb device msc. + +## QMK + +QMK support with usb device hid. \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/platform/blackmagic/bmp_port_cdc_acm.c b/components/drivers/usb/cherryusb/platform/blackmagic/bmp_port_cdc_acm.c new file mode 100644 index 00000000000..ae4e54574af --- /dev/null +++ b/components/drivers/usb/cherryusb/platform/blackmagic/bmp_port_cdc_acm.c @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2025, A_Stupid_Liberal + * Copyright (c) 2025, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "usbd_core.h" +#include "usbd_cdc_acm.h" +#include "general.h" +#include "gdb_if.h" +#include "hpm_l1c_drv.h" + +#define CDC_IN_EP 0x81 +#define CDC_OUT_EP 0x01 +#define CDC_INT_EP 0x83 + +#define CDC_MAX_PACKET_SIZE 512 + +#ifdef CONFIG_USB_HS +#if CDC_MAX_PACKET_SIZE != 512 +#error "CDC_MAX_PACKET_SIZE must be 512 in hs" +#endif +#else +#if CDC_MAX_PACKET_SIZE != 64 +#error "CDC_MAX_PACKET_SIZE must be 64 in fs" +#endif +#endif + +/*!< config descriptor size */ +#define USB_CONFIG_SIZE (9 + CDC_ACM_DESCRIPTOR_LEN) + +static const uint8_t device_descriptor[] = { + USB_DEVICE_DESCRIPTOR_INIT(USB_2_0, 0xEF, 0x02, 0x01, USBD_VID, USBD_PID, 0x0100, 0x01) +}; + +static const uint8_t config_descriptor_hs[] = { + USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x02, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + CDC_ACM_DESCRIPTOR_INIT(0x00, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP, USB_BULK_EP_MPS_HS, 0x02), +}; + +static const uint8_t config_descriptor_fs[] = { + USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x02, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + CDC_ACM_DESCRIPTOR_INIT(0x00, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP, USB_BULK_EP_MPS_FS, 0x02), +}; + +static const uint8_t device_quality_descriptor[] = { + USB_DEVICE_QUALIFIER_DESCRIPTOR_INIT(USB_2_0, 0xEF, 0x02, 0x01, 0x01), +}; + +static const uint8_t other_speed_config_descriptor_hs[] = { + USB_OTHER_SPEED_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x02, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + CDC_ACM_DESCRIPTOR_INIT(0x00, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP, USB_BULK_EP_MPS_FS, 0x02), +}; + +static const uint8_t other_speed_config_descriptor_fs[] = { + USB_OTHER_SPEED_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, 0x02, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + CDC_ACM_DESCRIPTOR_INIT(0x00, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP, USB_BULK_EP_MPS_HS, 0x02), +}; + +static const char *string_descriptors[] = { + (const char[]){ 0x09, 0x04 }, /* Langid */ + "CherryUSB", /* Manufacturer */ + "CherryUSB BMP DEMO", /* Product */ + "20250501", /* Serial Number */ +}; + +static const uint8_t *device_descriptor_callback(uint8_t speed) +{ + (void)speed; + + return device_descriptor; +} + +static const uint8_t *config_descriptor_callback(uint8_t speed) +{ + if (speed == USB_SPEED_HIGH) { + return config_descriptor_hs; + } else if (speed == USB_SPEED_FULL) { + return config_descriptor_fs; + } else { + return NULL; + } +} + +static const uint8_t *device_quality_descriptor_callback(uint8_t speed) +{ + (void)speed; + + return device_quality_descriptor; +} + +static const uint8_t *other_speed_config_descriptor_callback(uint8_t speed) +{ + if (speed == USB_SPEED_HIGH) { + return other_speed_config_descriptor_hs; + } else if (speed == USB_SPEED_FULL) { + return other_speed_config_descriptor_fs; + } else { + return NULL; + } +} + +static const char *string_descriptor_callback(uint8_t speed, uint8_t index) +{ + (void)speed; + + if (index >= (sizeof(string_descriptors) / sizeof(char *))) { + return NULL; + } + return string_descriptors[index]; +} + +const struct usb_descriptor cdc_descriptor = { + .device_descriptor_callback = device_descriptor_callback, + .config_descriptor_callback = config_descriptor_callback, + .device_quality_descriptor_callback = device_quality_descriptor_callback, + .other_speed_descriptor_callback = other_speed_config_descriptor_callback, + .string_descriptor_callback = string_descriptor_callback, +}; + +#define USB_RX_BUFFER_SIZE 16384 +__attribute__((aligned(64))) uint8_t g_usb_write_buffer[USB_RX_BUFFER_SIZE]; +__attribute__((aligned(64))) uint8_t g_usb_read_buffer[USB_RX_BUFFER_SIZE]; + +volatile bool g_usb_tx_busy_flag = false; +volatile uint32_t g_usb_tx_count = 0; +volatile uint32_t g_usb_rx_count = 0; +volatile uint32_t g_usb_rx_offset = 0; + +static void usbd_event_handler(uint8_t busid, uint8_t event) +{ + switch (event) { + case USBD_EVENT_RESET: + g_usb_tx_busy_flag = false; + g_usb_rx_offset = 0; + g_usb_rx_count = 0; + g_usb_tx_count = 0; + break; + case USBD_EVENT_CONNECTED: + break; + case USBD_EVENT_DISCONNECTED: + g_usb_tx_busy_flag = false; + g_usb_rx_offset = 0; + g_usb_rx_count = 0; + g_usb_tx_count = 0; + break; + case USBD_EVENT_RESUME: + break; + case USBD_EVENT_SUSPEND: + break; + case USBD_EVENT_CONFIGURED: + /* setup first out ep read transfer */ + usbd_ep_start_read(busid, CDC_OUT_EP, g_usb_read_buffer, USB_RX_BUFFER_SIZE); + break; + case USBD_EVENT_SET_REMOTE_WAKEUP: + break; + case USBD_EVENT_CLR_REMOTE_WAKEUP: + break; + + default: + break; + } +} + +void usbd_cdc_acm_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + (void)busid; + + usb_dcache_invalidate((uint32_t)g_usb_read_buffer, USB_ALIGN_UP(nbytes, 64)); + g_usb_rx_count = nbytes; + g_usb_rx_offset = 0; +} + +void usbd_cdc_acm_bulk_in(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + (void)busid; + + if ((nbytes % usbd_get_ep_mps(busid, ep)) == 0 && nbytes) { + /* send zlp */ + usbd_ep_start_write(busid, CDC_IN_EP, NULL, 0); + } else { + g_usb_tx_busy_flag = false; + } +} + +/*!< endpoint call back */ +struct usbd_endpoint cdc_out_ep = { + .ep_addr = CDC_OUT_EP, + .ep_cb = usbd_cdc_acm_bulk_out +}; + +struct usbd_endpoint cdc_in_ep = { + .ep_addr = CDC_IN_EP, + .ep_cb = usbd_cdc_acm_bulk_in +}; + +static struct usbd_interface intf0; +static struct usbd_interface intf1; + +/* function ------------------------------------------------------------------*/ + +void cdc_acm_init(uint8_t busid, uint32_t reg_base) +{ + usbd_desc_register(busid, &cdc_descriptor); + usbd_add_interface(busid, usbd_cdc_acm_init_intf(busid, &intf0)); + usbd_add_interface(busid, usbd_cdc_acm_init_intf(busid, &intf1)); + usbd_add_endpoint(busid, &cdc_out_ep); + usbd_add_endpoint(busid, &cdc_in_ep); + usbd_initialize(busid, reg_base, usbd_event_handler); +} + +volatile bool dtr_enable = false; + +void usbd_cdc_acm_set_dtr(uint8_t busid, uint8_t intf, bool dtr) +{ + if (dtr) { + //printf("remote attach \r\n"); + } else { + //printf("remote detach \r\n"); + } + + dtr_enable = dtr; +} + +void gdb_if_putchar(const char c, const bool flush) +{ + g_usb_write_buffer[g_usb_tx_count++] = c; + + if (flush) { + g_usb_tx_busy_flag = true; + usb_dcache_clean((uint32_t)g_usb_write_buffer, USB_ALIGN_UP(g_usb_tx_count, 64)); + usbd_ep_start_write(0, CDC_IN_EP, (uint8_t *)core_local_mem_to_sys_address(0, (uint32_t)g_usb_write_buffer), g_usb_tx_count); + while (g_usb_tx_busy_flag) { + } + g_usb_tx_count = 0; + } +} + +void gdb_if_flush(const bool force) +{ + g_usb_tx_busy_flag = true; + usb_dcache_clean((uint32_t)g_usb_write_buffer, USB_ALIGN_UP(g_usb_tx_count, 64)); + usbd_ep_start_write(0, CDC_IN_EP, (uint8_t *)core_local_mem_to_sys_address(0, (uint32_t)g_usb_write_buffer), g_usb_tx_count); + while (g_usb_tx_busy_flag) { + } + g_usb_tx_count = 0; +} + +static int __gdb_if_getchar(void) +{ + if (dtr_enable == false) { + return '\04'; + } + + if (g_usb_rx_count > 0) { + if (g_usb_rx_offset < g_usb_rx_count) { + return g_usb_read_buffer[g_usb_rx_offset++]; + } else { + g_usb_rx_count = 0; + /* setup first out ep read transfer */ + usbd_ep_start_read(0, CDC_OUT_EP, g_usb_read_buffer, USB_RX_BUFFER_SIZE); + return -1; + } + } else { + return -1; + } +} + +char gdb_if_getchar(void) +{ + int c; + + while ((c = __gdb_if_getchar()) == -1) { + } + + return (char)c; +} + +char gdb_if_getchar_to(const uint32_t timeout) +{ + int c = 0; + platform_timeout_s receive_timeout; + platform_timeout_set(&receive_timeout, timeout); + + /* Wait while we need more data or until the timeout expires */ + while (!platform_timeout_is_expired(&receive_timeout)) { + c = __gdb_if_getchar(); + if (c != -1) { + return (char)c; + } + } + return -1; +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/platform/daplink/dap_main.c b/components/drivers/usb/cherryusb/platform/daplink/dap_main.c new file mode 100644 index 00000000000..f977cffd3d1 --- /dev/null +++ b/components/drivers/usb/cherryusb/platform/daplink/dap_main.c @@ -0,0 +1,553 @@ +/* + * Copyright (c) 2023 ~ 2025, sakumisu + * Copyright (c) 2023 ~ 2025, HalfSweet + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "dap_main.h" +#include "DAP_config.h" +#include "DAP.h" + +#define USB_CONFIG_SIZE (9 + CMSIS_DAP_INTERFACE_SIZE + CDC_ACM_DESCRIPTOR_LEN + CONFIG_MSC_DESCRIPTOR_LEN) +#define INTF_NUM (2 + 1 + CONFIG_MSC_INTF_NUM) + +__ALIGN_BEGIN const uint8_t USBD_WinUSBDescriptorSetDescriptor[] = { + WBVAL(WINUSB_DESCRIPTOR_SET_HEADER_SIZE), /* wLength */ + WBVAL(WINUSB_SET_HEADER_DESCRIPTOR_TYPE), /* wDescriptorType */ + 0x00, 0x00, 0x03, 0x06, /* >= Win 8.1 */ /* dwWindowsVersion*/ + WBVAL(USBD_WINUSB_DESC_SET_LEN), /* wDescriptorSetTotalLength */ +#if (USBD_WEBUSB_ENABLE) + WBVAL(WINUSB_FUNCTION_SUBSET_HEADER_SIZE), // wLength + WBVAL(WINUSB_SUBSET_HEADER_FUNCTION_TYPE), // wDescriptorType + 0, // bFirstInterface USBD_WINUSB_IF_NUM + 0, // bReserved + WBVAL(FUNCTION_SUBSET_LEN), // wSubsetLength + WBVAL(WINUSB_FEATURE_COMPATIBLE_ID_SIZE), // wLength + WBVAL(WINUSB_FEATURE_COMPATIBLE_ID_TYPE), // wDescriptorType + 'W', 'I', 'N', 'U', 'S', 'B', 0, 0, // CompatibleId + 0, 0, 0, 0, 0, 0, 0, 0, // SubCompatibleId + WBVAL(DEVICE_INTERFACE_GUIDS_FEATURE_LEN), // wLength + WBVAL(WINUSB_FEATURE_REG_PROPERTY_TYPE), // wDescriptorType + WBVAL(WINUSB_PROP_DATA_TYPE_REG_MULTI_SZ), // wPropertyDataType + WBVAL(42), // wPropertyNameLength + 'D', 0, 'e', 0, 'v', 0, 'i', 0, 'c', 0, 'e', 0, + 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'f', 0, 'a', 0, 'c', 0, 'e', 0, + 'G', 0, 'U', 0, 'I', 0, 'D', 0, 's', 0, 0, 0, + WBVAL(80), // wPropertyDataLength + '{', 0, + '9', 0, '2', 0, 'C', 0, 'E', 0, '6', 0, '4', 0, '6', 0, '2', 0, '-', 0, + '9', 0, 'C', 0, '7', 0, '7', 0, '-', 0, + '4', 0, '6', 0, 'F', 0, 'E', 0, '-', 0, + '9', 0, '3', 0, '3', 0, 'B', 0, '-', + 0, '3', 0, '1', 0, 'C', 0, 'B', 0, '9', 0, 'C', 0, '5', 0, 'A', 0, 'A', 0, '3', 0, 'B', 0, '9', 0, + '}', 0, 0, 0, 0, 0 +#endif +#if USBD_BULK_ENABLE + WBVAL(WINUSB_FUNCTION_SUBSET_HEADER_SIZE), /* wLength */ + WBVAL(WINUSB_SUBSET_HEADER_FUNCTION_TYPE), /* wDescriptorType */ + 0, /* bFirstInterface USBD_BULK_IF_NUM*/ + 0, /* bReserved */ + WBVAL(FUNCTION_SUBSET_LEN), /* wSubsetLength */ + WBVAL(WINUSB_FEATURE_COMPATIBLE_ID_SIZE), /* wLength */ + WBVAL(WINUSB_FEATURE_COMPATIBLE_ID_TYPE), /* wDescriptorType */ + 'W', 'I', 'N', 'U', 'S', 'B', 0, 0, /* CompatibleId*/ + 0, 0, 0, 0, 0, 0, 0, 0, /* SubCompatibleId*/ + WBVAL(DEVICE_INTERFACE_GUIDS_FEATURE_LEN), /* wLength */ + WBVAL(WINUSB_FEATURE_REG_PROPERTY_TYPE), /* wDescriptorType */ + WBVAL(WINUSB_PROP_DATA_TYPE_REG_MULTI_SZ), /* wPropertyDataType */ + WBVAL(42), /* wPropertyNameLength */ + 'D', 0, 'e', 0, 'v', 0, 'i', 0, 'c', 0, 'e', 0, + 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'f', 0, 'a', 0, 'c', 0, 'e', 0, + 'G', 0, 'U', 0, 'I', 0, 'D', 0, 's', 0, 0, 0, + WBVAL(80), /* wPropertyDataLength */ + '{', 0, + 'C', 0, 'D', 0, 'B', 0, '3', 0, 'B', 0, '5', 0, 'A', 0, 'D', 0, '-', 0, + '2', 0, '9', 0, '3', 0, 'B', 0, '-', 0, + '4', 0, '6', 0, '6', 0, '3', 0, '-', 0, + 'A', 0, 'A', 0, '3', 0, '6', 0, '-', + 0, '1', 0, 'A', 0, 'A', 0, 'E', 0, '4', 0, '6', 0, '4', 0, '6', 0, '3', 0, '7', 0, '7', 0, '6', 0, + '}', 0, 0, 0, 0, 0 +#endif +}; + +__ALIGN_BEGIN const uint8_t USBD_BinaryObjectStoreDescriptor[] = { + 0x05, /* bLength */ + 0x0f, /* bDescriptorType */ + WBVAL(USBD_BOS_WTOTALLENGTH), /* wTotalLength */ + USBD_NUM_DEV_CAPABILITIES, /* bNumDeviceCaps */ +#if (USBD_WEBUSB_ENABLE) + USBD_WEBUSB_DESC_LEN, /* bLength */ + 0x10, /* bDescriptorType */ + USB_DEVICE_CAPABILITY_PLATFORM, /* bDevCapabilityType */ + 0x00, /* bReserved */ + 0x38, 0xB6, 0x08, 0x34, /* PlatformCapabilityUUID */ + 0xA9, 0x09, 0xA0, 0x47, + 0x8B, 0xFD, 0xA0, 0x76, + 0x88, 0x15, 0xB6, 0x65, + WBVAL(0x0100), /* 1.00 */ /* bcdVersion */ + USBD_WINUSB_VENDOR_CODE, /* bVendorCode */ + 0, /* iLandingPage */ +#endif +#if (USBD_WINUSB_ENABLE) + USBD_WINUSB_DESC_LEN, /* bLength */ + 0x10, /* bDescriptorType */ + USB_DEVICE_CAPABILITY_PLATFORM, /* bDevCapabilityType */ + 0x00, /* bReserved */ + 0xDF, 0x60, 0xDD, 0xD8, /* PlatformCapabilityUUID */ + 0x89, 0x45, 0xC7, 0x4C, + 0x9C, 0xD2, 0x65, 0x9D, + 0x9E, 0x64, 0x8A, 0x9F, + 0x00, 0x00, 0x03, 0x06, /* >= Win 8.1 */ /* dwWindowsVersion*/ + WBVAL(USBD_WINUSB_DESC_SET_LEN), /* wDescriptorSetTotalLength */ + USBD_WINUSB_VENDOR_CODE, /* bVendorCode */ + 0, /* bAltEnumCode */ +#endif +}; + +static const uint8_t device_descriptor[] = { + USB_DEVICE_DESCRIPTOR_INIT(USB_2_1, 0xEF, 0x02, 0x01, USBD_VID, USBD_PID, 0x0100, 0x01), +}; + +static const uint8_t config_descriptor[] = { + USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, INTF_NUM, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + /* Interface 0 */ + USB_INTERFACE_DESCRIPTOR_INIT(0x00, 0x00, 0x02, 0xFF, 0x00, 0x00, 0x02), + /* Endpoint OUT 2 */ + USB_ENDPOINT_DESCRIPTOR_INIT(DAP_OUT_EP, USB_ENDPOINT_TYPE_BULK, DAP_PACKET_SIZE, 0x00), + /* Endpoint IN 1 */ + USB_ENDPOINT_DESCRIPTOR_INIT(DAP_IN_EP, USB_ENDPOINT_TYPE_BULK, DAP_PACKET_SIZE, 0x00), + CDC_ACM_DESCRIPTOR_INIT(0x01, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP, DAP_PACKET_SIZE, 0x00), +#ifdef CONFIG_CHERRYDAP_USE_MSC + MSC_DESCRIPTOR_INIT(MSC_INTF_NUM, MSC_OUT_EP, MSC_IN_EP, DAP_PACKET_SIZE, 0x00), +#endif +}; + +static const uint8_t other_speed_config_descriptor[] = { + USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE, INTF_NUM, 0x01, USB_CONFIG_BUS_POWERED, USBD_MAX_POWER), + /* Interface 0 */ + USB_INTERFACE_DESCRIPTOR_INIT(0x00, 0x00, 0x02, 0xFF, 0x00, 0x00, 0x02), + /* Endpoint OUT 2 */ + USB_ENDPOINT_DESCRIPTOR_INIT(DAP_OUT_EP, USB_ENDPOINT_TYPE_BULK, DAP_PACKET_SIZE, 0x00), + /* Endpoint IN 1 */ + USB_ENDPOINT_DESCRIPTOR_INIT(DAP_IN_EP, USB_ENDPOINT_TYPE_BULK, DAP_PACKET_SIZE, 0x00), + CDC_ACM_DESCRIPTOR_INIT(0x01, CDC_INT_EP, CDC_OUT_EP, CDC_IN_EP, DAP_PACKET_SIZE, 0x00), +#ifdef CONFIG_CHERRYDAP_USE_MSC + MSC_DESCRIPTOR_INIT(MSC_INTF_NUM, MSC_OUT_EP, MSC_IN_EP, DAP_PACKET_SIZE, 0x00), +#endif +}; + +char *string_descriptors[] = { + (char[]) {0x09, 0x04}, /* Langid */ + "CherryUSB", /* Manufacturer */ + "CherryUSB CMSIS-DAP", /* Product */ + "00000000000000000123456789ABCDEF", /* Serial Number */ +}; + +static const uint8_t device_quality_descriptor[] = { + USB_DEVICE_QUALIFIER_DESCRIPTOR_INIT(USB_2_1, 0x00, 0x00, 0x00, 0x01), +}; + +__WEAK const uint8_t *device_descriptor_callback(uint8_t speed) +{ + (void) speed; + return device_descriptor; +} + +__WEAK const uint8_t *config_descriptor_callback(uint8_t speed) +{ + (void) speed; + return config_descriptor; +} + +__WEAK const uint8_t *device_quality_descriptor_callback(uint8_t speed) +{ + (void) speed; + return device_quality_descriptor; +} + +__WEAK const uint8_t *other_speed_config_descriptor_callback(uint8_t speed) +{ + (void) speed; + return other_speed_config_descriptor; +} + +__WEAK const char *string_descriptor_callback(uint8_t speed, uint8_t index) +{ + (void) speed; + + if (index >= (sizeof(string_descriptors) / sizeof(char *))) { + return NULL; + } + return string_descriptors[index]; +} + +static volatile uint16_t USB_RequestIndexI = 0; // Request Index In +static volatile uint16_t USB_RequestIndexO = 0; // Request Index Out +static volatile uint16_t USB_RequestCountI = 0; // Request Count In +static volatile uint16_t USB_RequestCountO = 0; // Request Count Out +static volatile uint8_t USB_RequestIdle = 1; // Request Idle Flag + +static volatile uint16_t USB_ResponseIndexI = 0; // Response Index In +static volatile uint16_t USB_ResponseIndexO = 0; // Response Index Out +static volatile uint16_t USB_ResponseCountI = 0; // Response Count In +static volatile uint16_t USB_ResponseCountO = 0; // Response Count Out +static volatile uint8_t USB_ResponseIdle = 1; // Response Idle Flag + +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t USB_Request[DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Request Buffer +static USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t USB_Response[DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Response Buffer +static uint16_t USB_RespSize[DAP_PACKET_COUNT]; // Response Size + +volatile struct cdc_line_coding g_cdc_lincoding; +volatile uint8_t config_uart = 0; +volatile uint8_t config_uart_transfer = 0; + +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t uartrx_ringbuffer[CONFIG_UARTRX_RINGBUF_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t usbrx_ringbuffer[CONFIG_USBRX_RINGBUF_SIZE]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t usb_tmpbuffer[DAP_PACKET_SIZE]; + +static volatile uint8_t usbrx_idle_flag = 0; +static volatile uint8_t usbtx_idle_flag = 0; +static volatile uint8_t uarttx_idle_flag = 0; + +USB_NOCACHE_RAM_SECTION chry_ringbuffer_t g_uartrx; +USB_NOCACHE_RAM_SECTION chry_ringbuffer_t g_usbrx; + +void usbd_event_handler(uint8_t busid, uint8_t event) +{ + (void) busid; + switch (event) { + case USBD_EVENT_RESET: + usbrx_idle_flag = 0; + usbtx_idle_flag = 0; + uarttx_idle_flag = 0; + config_uart_transfer = 0; + break; + case USBD_EVENT_CONNECTED: + break; + case USBD_EVENT_DISCONNECTED: + break; + case USBD_EVENT_RESUME: + break; + case USBD_EVENT_SUSPEND: + break; + case USBD_EVENT_CONFIGURED: + /* setup first out ep read transfer */ + USB_RequestIdle = 0U; + + usbd_ep_start_read(0, DAP_OUT_EP, USB_Request[0], DAP_PACKET_SIZE); + usbd_ep_start_read(0, CDC_OUT_EP, usb_tmpbuffer, DAP_PACKET_SIZE); + + break; + case USBD_EVENT_SET_REMOTE_WAKEUP: + break; + case USBD_EVENT_CLR_REMOTE_WAKEUP: + break; + + default: + break; + } +} + +void dap_out_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + (void) busid; + if (USB_Request[USB_RequestIndexI][0] == ID_DAP_TransferAbort) { + DAP_TransferAbort = 1U; + } else { + USB_RequestIndexI++; + if (USB_RequestIndexI == DAP_PACKET_COUNT) { + USB_RequestIndexI = 0U; + } + USB_RequestCountI++; + } + + // Start reception of next request packet + if ((uint16_t) (USB_RequestCountI - USB_RequestCountO) != DAP_PACKET_COUNT) { + usbd_ep_start_read(0, DAP_OUT_EP, USB_Request[USB_RequestIndexI], DAP_PACKET_SIZE); + } else { + USB_RequestIdle = 1U; + } +} + +void dap_in_callback(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + (void) busid; + if (USB_ResponseCountI != USB_ResponseCountO) { + // Load data from response buffer to be sent back + usbd_ep_start_write(0, DAP_IN_EP, USB_Response[USB_ResponseIndexO], USB_RespSize[USB_ResponseIndexO]); + USB_ResponseIndexO++; + if (USB_ResponseIndexO == DAP_PACKET_COUNT) { + USB_ResponseIndexO = 0U; + } + USB_ResponseCountO++; + } else { + USB_ResponseIdle = 1U; + } +} + +void usbd_cdc_acm_bulk_out(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + (void) busid; + chry_ringbuffer_write(&g_usbrx, usb_tmpbuffer, nbytes); + if (chry_ringbuffer_get_free(&g_usbrx) >= DAP_PACKET_SIZE) { + usbd_ep_start_read(0, CDC_OUT_EP, usb_tmpbuffer, DAP_PACKET_SIZE); + } else { + usbrx_idle_flag = 1; + } +} + +void usbd_cdc_acm_bulk_in(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + (void) busid; + uint32_t size; + uint8_t *buffer; + + chry_ringbuffer_linear_read_done(&g_uartrx, nbytes); + if ((nbytes % DAP_PACKET_SIZE) == 0 && nbytes) { + /* send zlp */ + usbd_ep_start_write(0, CDC_IN_EP, NULL, 0); + } else { + if (chry_ringbuffer_get_used(&g_uartrx)) { + buffer = chry_ringbuffer_linear_read_setup(&g_uartrx, &size); + usbd_ep_start_write(0, CDC_IN_EP, buffer, size); + } else { + usbtx_idle_flag = 1; + } + } +} + +struct usbd_endpoint dap_out_ep = { + .ep_addr = DAP_OUT_EP, + .ep_cb = dap_out_callback +}; + +struct usbd_endpoint dap_in_ep = { + .ep_addr = DAP_IN_EP, + .ep_cb = dap_in_callback +}; + +struct usbd_endpoint cdc_out_ep = { + .ep_addr = CDC_OUT_EP, + .ep_cb = usbd_cdc_acm_bulk_out +}; + +struct usbd_endpoint cdc_in_ep = { + .ep_addr = CDC_IN_EP, + .ep_cb = usbd_cdc_acm_bulk_in +}; + +struct usbd_interface dap_intf; +struct usbd_interface intf1; +struct usbd_interface intf2; +struct usbd_interface intf3; +struct usbd_interface hid_intf; + +struct usb_msosv2_descriptor msosv2_desc = { + .vendor_code = USBD_WINUSB_VENDOR_CODE, + .compat_id = USBD_WinUSBDescriptorSetDescriptor, + .compat_id_len = USBD_WINUSB_DESC_SET_LEN, +}; + +struct usb_bos_descriptor bos_desc = { + .string = USBD_BinaryObjectStoreDescriptor, + .string_len = USBD_BOS_WTOTALLENGTH +}; + +const struct usb_descriptor cmsisdap_descriptor = { + .device_descriptor_callback = device_descriptor_callback, + .config_descriptor_callback = config_descriptor_callback, + .device_quality_descriptor_callback = device_quality_descriptor_callback, + .other_speed_descriptor_callback = other_speed_config_descriptor_callback, + .string_descriptor_callback = string_descriptor_callback, + .bos_descriptor = &bos_desc, + .msosv2_descriptor = &msosv2_desc, +}; + +void chry_dap_handle(void) +{ + uint32_t n; + + // Process pending requests + while (USB_RequestCountI != USB_RequestCountO) { + // Handle Queue Commands + n = USB_RequestIndexO; + while (USB_Request[n][0] == ID_DAP_QueueCommands) { + USB_Request[n][0] = ID_DAP_ExecuteCommands; + n++; + if (n == DAP_PACKET_COUNT) { + n = 0U; + } + if (n == USB_RequestIndexI) { + // flags = osThreadFlagsWait(0x81U, osFlagsWaitAny, osWaitForever); + // if (flags & 0x80U) { + // break; + // } + } + } + + // Execute DAP Command (process request and prepare response) + USB_RespSize[USB_ResponseIndexI] = + (uint16_t) DAP_ExecuteCommand(USB_Request[USB_RequestIndexO], USB_Response[USB_ResponseIndexI]); + + // Update Request Index and Count + USB_RequestIndexO++; + if (USB_RequestIndexO == DAP_PACKET_COUNT) { + USB_RequestIndexO = 0U; + } + USB_RequestCountO++; + + if (USB_RequestIdle) { + if ((uint16_t) (USB_RequestCountI - USB_RequestCountO) != DAP_PACKET_COUNT) { + USB_RequestIdle = 0U; + usbd_ep_start_read(0, DAP_OUT_EP, USB_Request[USB_RequestIndexI], DAP_PACKET_SIZE); + } + } + + // Update Response Index and Count + USB_ResponseIndexI++; + if (USB_ResponseIndexI == DAP_PACKET_COUNT) { + USB_ResponseIndexI = 0U; + } + USB_ResponseCountI++; + + if (USB_ResponseIdle) { + if (USB_ResponseCountI != USB_ResponseCountO) { + // Load data from response buffer to be sent back + n = USB_ResponseIndexO++; + if (USB_ResponseIndexO == DAP_PACKET_COUNT) { + USB_ResponseIndexO = 0U; + } + USB_ResponseCountO++; + USB_ResponseIdle = 0U; + usbd_ep_start_write(0, DAP_IN_EP, USB_Response[n], USB_RespSize[n]); + } + } + } +} + +void usbd_cdc_acm_set_line_coding(uint8_t busid, uint8_t intf, struct cdc_line_coding *line_coding) +{ + (void) busid; + if (memcmp(line_coding, (uint8_t *) &g_cdc_lincoding, sizeof(struct cdc_line_coding)) != 0) { + memcpy((uint8_t *) &g_cdc_lincoding, line_coding, sizeof(struct cdc_line_coding)); + config_uart = 1; + config_uart_transfer = 0; + } +} + +void usbd_cdc_acm_get_line_coding(uint8_t busid, uint8_t intf, struct cdc_line_coding *line_coding) +{ + (void) busid; + memcpy(line_coding, (uint8_t *) &g_cdc_lincoding, sizeof(struct cdc_line_coding)); +} + +void chry_dap_usb2uart_handle(void) +{ + uint32_t size; + uint8_t *buffer; + + if (config_uart) { + /* disable irq here */ + config_uart = 0; + /* config uart here */ + chry_dap_usb2uart_uart_config_callback((struct cdc_line_coding *) &g_cdc_lincoding); + usbtx_idle_flag = 1; + uarttx_idle_flag = 1; + config_uart_transfer = 1; + //chry_ringbuffer_reset_read(&g_uartrx); + /* enable irq here */ + } + + if (config_uart_transfer == 0) { + return; + } + + /* why we use chry_ringbuffer_linear_read_setup? + * becase we use dma and we do not want to use temp buffer to memcpy from ringbuffer + * + */ + + /* uartrx to usb tx */ + if (usbtx_idle_flag) { + if (chry_ringbuffer_get_used(&g_uartrx)) { + usbtx_idle_flag = 0; + /* start first transfer */ + buffer = chry_ringbuffer_linear_read_setup(&g_uartrx, &size); + usbd_ep_start_write(0, CDC_IN_EP, buffer, size); + } + } + + /* usbrx to uart tx */ + if (uarttx_idle_flag) { + if (chry_ringbuffer_get_used(&g_usbrx)) { + uarttx_idle_flag = 0; + /* start first transfer */ + buffer = chry_ringbuffer_linear_read_setup(&g_usbrx, &size); + chry_dap_usb2uart_uart_send_bydma(buffer, size); + } + } + + /* check whether usb rx ringbuffer have space to store */ + if (usbrx_idle_flag) { + if (chry_ringbuffer_get_free(&g_usbrx) >= DAP_PACKET_SIZE) { + usbrx_idle_flag = 0; + usbd_ep_start_read(0, CDC_OUT_EP, usb_tmpbuffer, DAP_PACKET_SIZE); + } + } +} + +/* implment by user */ +__WEAK void chry_dap_usb2uart_uart_config_callback(struct cdc_line_coding *line_coding) +{ +} + +/* called by user */ +void chry_dap_usb2uart_uart_send_complete(uint32_t size) +{ + uint8_t *buffer; + + chry_ringbuffer_linear_read_done(&g_usbrx, size); + + if (chry_ringbuffer_get_used(&g_usbrx)) { + buffer = chry_ringbuffer_linear_read_setup(&g_usbrx, &size); + chry_dap_usb2uart_uart_send_bydma(buffer, size); + } else { + uarttx_idle_flag = 1; + } +} + +/* implment by user */ +__WEAK void chry_dap_usb2uart_uart_send_bydma(uint8_t *data, uint16_t len) +{ +} + +#ifdef CONFIG_CHERRYDAP_USE_MSC +#define BLOCK_SIZE 512 +#define BLOCK_COUNT 10 + +typedef struct +{ + uint8_t BlockSpace[BLOCK_SIZE]; +} BLOCK_TYPE; + +BLOCK_TYPE mass_block[BLOCK_COUNT]; + +void usbd_msc_get_cap(uint8_t lun, uint32_t *block_num, uint16_t *block_size) +{ + *block_num = 1000; //Pretend having so many buffer,not has actually. + *block_size = BLOCK_SIZE; +} +int usbd_msc_sector_read(uint32_t sector, uint8_t *buffer, uint32_t length) +{ + if (sector < 10) + memcpy(buffer, mass_block[sector].BlockSpace, length); + return 0; +} + +int usbd_msc_sector_write(uint32_t sector, uint8_t *buffer, uint32_t length) +{ + if (sector < 10) + memcpy(mass_block[sector].BlockSpace, buffer, length); + return 0; +} +#endif diff --git a/components/drivers/usb/cherryusb/platform/daplink/dap_main.h b/components/drivers/usb/cherryusb/platform/daplink/dap_main.h new file mode 100644 index 00000000000..082cb996e70 --- /dev/null +++ b/components/drivers/usb/cherryusb/platform/daplink/dap_main.h @@ -0,0 +1,151 @@ +/* + * Copyright (c) 2023 ~ 2025, sakumisu + * Copyright (c) 2023 ~ 2025, HalfSweet + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef DAP_MAIN_H +#define DAP_MAIN_H + +#include "usbd_core.h" +#include "usbd_cdc.h" +#include "usbd_msc.h" +#include "chry_ringbuffer.h" +#include "DAP_config.h" +#include "DAP.h" + +#define DAP_IN_EP 0x81 +#define DAP_OUT_EP 0x02 + +#define CDC_IN_EP 0x83 +#define CDC_OUT_EP 0x04 +#define CDC_INT_EP 0x85 + +#define MSC_IN_EP 0x86 +#define MSC_OUT_EP 0x07 + +#define USBD_VID 0x0D28 +#define USBD_PID 0x0204 +#define USBD_MAX_POWER 500 +#define USBD_LANGID_STRING 1033 + +#define CMSIS_DAP_INTERFACE_SIZE (9 + 7 + 7) + +#ifdef CONFIG_CHERRYDAP_USE_MSC +#define CONFIG_MSC_DESCRIPTOR_LEN CDC_ACM_DESCRIPTOR_LEN +#define CONFIG_MSC_INTF_NUM 1 +#define MSC_INTF_NUM (0x02 + 1) +#else +#define CONFIG_MSC_DESCRIPTOR_LEN 0 +#define CONFIG_MSC_INTF_NUM 0 +#define MSC_INTF_NUM (0x02) +#endif + +#ifdef CONFIG_USB_HS +#if DAP_PACKET_SIZE != 512 +#error "DAP_PACKET_SIZE must be 512 in hs" +#endif +#else +#if DAP_PACKET_SIZE != 64 +#error "DAP_PACKET_SIZE must be 64 in fs" +#endif +#endif + +#define USBD_WINUSB_VENDOR_CODE 0x20 + +#define USBD_WEBUSB_ENABLE 0 +#define USBD_BULK_ENABLE 1 +#define USBD_WINUSB_ENABLE 1 + +/* WinUSB Microsoft OS 2.0 descriptor sizes */ +#define WINUSB_DESCRIPTOR_SET_HEADER_SIZE 10 +#define WINUSB_FUNCTION_SUBSET_HEADER_SIZE 8 +#define WINUSB_FEATURE_COMPATIBLE_ID_SIZE 20 + +#define FUNCTION_SUBSET_LEN 160 +#define DEVICE_INTERFACE_GUIDS_FEATURE_LEN 132 + +#define USBD_WINUSB_DESC_SET_LEN (WINUSB_DESCRIPTOR_SET_HEADER_SIZE + USBD_WEBUSB_ENABLE * FUNCTION_SUBSET_LEN + USBD_BULK_ENABLE * FUNCTION_SUBSET_LEN) + +#define USBD_NUM_DEV_CAPABILITIES (USBD_WEBUSB_ENABLE + USBD_WINUSB_ENABLE) + +#define USBD_WEBUSB_DESC_LEN 24 +#define USBD_WINUSB_DESC_LEN 28 + +#define USBD_BOS_WTOTALLENGTH (0x05 + \ + USBD_WEBUSB_DESC_LEN * USBD_WEBUSB_ENABLE + \ + USBD_WINUSB_DESC_LEN * USBD_WINUSB_ENABLE) + +#define CONFIG_UARTRX_RINGBUF_SIZE (8 * 1024) +#define CONFIG_USBRX_RINGBUF_SIZE (8 * 1024) + +#ifdef __cplusplus +extern "C" +{ +#endif + +extern USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t uartrx_ringbuffer[CONFIG_UARTRX_RINGBUF_SIZE]; +extern USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t usbrx_ringbuffer[CONFIG_USBRX_RINGBUF_SIZE]; +extern USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t usb_tmpbuffer[DAP_PACKET_SIZE]; + +extern const struct usb_descriptor cmsisdap_descriptor; +extern __ALIGN_BEGIN const uint8_t USBD_WinUSBDescriptorSetDescriptor[]; +extern __ALIGN_BEGIN const uint8_t USBD_BinaryObjectStoreDescriptor[]; +extern char *string_descriptors[]; + +extern struct usbd_interface dap_intf; +extern struct usbd_interface intf1; +extern struct usbd_interface intf2; +extern struct usbd_interface intf3; +extern struct usbd_interface hid_intf; + +extern struct usbd_endpoint dap_out_ep; +extern struct usbd_endpoint dap_in_ep; +extern struct usbd_endpoint cdc_out_ep; +extern struct usbd_endpoint cdc_in_ep; + +extern chry_ringbuffer_t g_uartrx; +extern chry_ringbuffer_t g_usbrx; + +__STATIC_INLINE void chry_dap_init(uint8_t busid, uint32_t reg_base) +{ + chry_ringbuffer_init(&g_uartrx, uartrx_ringbuffer, CONFIG_UARTRX_RINGBUF_SIZE); + chry_ringbuffer_init(&g_usbrx, usbrx_ringbuffer, CONFIG_USBRX_RINGBUF_SIZE); + + DAP_Setup(); + + usbd_desc_register(0, &cmsisdap_descriptor); + + /*!< winusb */ + usbd_add_interface(0, &dap_intf); + usbd_add_endpoint(0, &dap_out_ep); + usbd_add_endpoint(0, &dap_in_ep); + + /*!< cdc acm */ + usbd_add_interface(0, usbd_cdc_acm_init_intf(0, &intf1)); + usbd_add_interface(0, usbd_cdc_acm_init_intf(0, &intf2)); + usbd_add_endpoint(0, &cdc_out_ep); + usbd_add_endpoint(0, &cdc_in_ep); + +#ifdef CONFIG_CHERRYDAP_USE_MSC + usbd_add_interface(0, usbd_msc_init_intf(0, &intf3, MSC_OUT_EP, MSC_IN_EP)); +#endif + extern void usbd_event_handler(uint8_t busid, uint8_t event); + usbd_initialize(busid, reg_base, usbd_event_handler); +} + +void chry_dap_handle(void); + +void chry_dap_usb2uart_handle(void); + +void chry_dap_usb2uart_uart_config_callback(struct cdc_line_coding *line_coding); + +void chry_dap_usb2uart_uart_send_bydma(uint8_t *data, uint16_t len); + +void chry_dap_usb2uart_uart_send_complete(uint32_t size); + +#ifdef __cplusplus +} +#endif + +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/platform/lvgl/image_cursor.c b/components/drivers/usb/cherryusb/platform/lvgl/image_cursor.c new file mode 100644 index 00000000000..205930efeff --- /dev/null +++ b/components/drivers/usb/cherryusb/platform/lvgl/image_cursor.c @@ -0,0 +1,172 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * Copyright (c) 2025 RCSN + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifdef __has_include +#if __has_include("lvgl.h") +#ifndef LV_LVGL_H_INCLUDE_SIMPLE +#define LV_LVGL_H_INCLUDE_SIMPLE +#endif +#endif +#endif + +#if defined(LV_LVGL_H_INCLUDE_SIMPLE) +#include "lvgl.h" +#else +#include "lvgl/lvgl.h" +#endif + + +#ifndef LV_ATTRIBUTE_MEM_ALIGN +#define LV_ATTRIBUTE_MEM_ALIGN +#endif + +#ifndef LV_ATTRIBUTE_IMG_DUST +#define LV_ATTRIBUTE_IMG_DUST +#endif + +#if defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 9) +static const +LV_ATTRIBUTE_MEM_ALIGN LV_ATTRIBUTE_LARGE_CONST LV_ATTRIBUTE_IMG_DUST +uint8_t img_cursor_20px_map[] = { + + 0x00, 0x00, 0x00, 0xb2, 0x00, 0x00, 0x00, 0xcc, 0x00, 0x00, 0x00, 0x71, 0x00, 0x00, 0x00, 0x3a, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0xcc, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x00, 0x00, 0xe4, 0x00, 0x00, 0x00, 0xae, 0x00, 0x00, 0x00, 0x6b, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x00, 0x00, 0xf0, 0x7e, 0x7e, 0x7e, 0xf5, 0x73, 0x73, 0x73, 0xfc, 0x00, 0x00, 0x00, 0xee, 0x00, 0x00, 0x00, 0xdd, 0x2b, 0x2b, 0x2b, 0xfc, 0xb0, 0xb0, 0xb0, 0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xb1, 0xb1, 0xb1, 0xef, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0xd7, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0xcb, 0x12, 0x12, 0x12, 0xfd, 0x12, 0x12, 0x12, 0xfd, 0x00, 0x00, 0x00, 0x9d, 0x00, 0x00, 0x00, 0x37, 0x03, 0x03, 0x03, 0xdd, 0x2b, 0x2b, 0x2b, 0xfd, 0xca, 0xca, 0xca, 0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xfc, 0xfc, 0xfc, 0x86, 0x86, 0x86, 0xf2, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0xb6, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0xe7, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 0x00, 0x00, 0x00, 0xc2, 0x2b, 0x2b, 0x2b, 0xfc, 0xb0, 0xb0, 0xb0, 0xfa, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xfc, 0xfc, 0xfc, 0x74, 0x74, 0x74, 0xf8, 0x06, 0x06, 0x06, 0xfe, 0x00, 0x00, 0x00, 0x9d, 0x00, 0x00, 0x00, 0x16, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, 0xed, 0x00, 0x00, 0x00, 0x79, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2c, 0x03, 0x03, 0x03, 0xdd, 0x2b, 0x2b, 0x2b, 0xfc, 0xb1, 0xb1, 0xb1, 0xef, 0x86, 0x86, 0x86, 0xf2, 0x06, 0x06, 0x06, 0xfe, 0x00, 0x00, 0x00, 0xb9, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 0x00, 0x00, 0x00, 0xc2, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x9d, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2c, 0x00, 0x00, 0x00, 0xd7, 0x00, 0x00, 0x00, 0xb6, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + +}; + +const lv_img_dsc_t img_cursor = { + .header.magic = LV_IMAGE_HEADER_MAGIC, + .header.cf = LV_COLOR_FORMAT_ARGB8888, + .header.flags = 0, + .header.w = 20, + .header.h = 20, + .header.stride = 80, + .data_size = 1600, + .data = img_cursor_20px_map, +}; +#elif defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 8) +const uint8_t mouse_cursor_icon_map[] = { +#if LV_COLOR_DEPTH == 1 || LV_COLOR_DEPTH == 8 + /*Pixel format: Alpha 8 bit, Red: 3 bit, Green: 3 bit, Blue: 2 bit*/ + 0x24, 0xb8, 0x24, 0xc8, 0x00, 0x13, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcc, 0xdb, 0xff, 0x49, 0xcc, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xc8, 0xff, 0xff, 0xff, 0xff, 0x49, 0xe0, 0x00, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcb, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xff, 0x6d, 0xf3, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x92, 0xff, 0x00, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x92, 0xff, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0xb6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xb7, 0xff, 0x24, 0xab, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xdb, 0xff, 0x24, 0xbb, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xdb, 0xff, 0x49, 0xd8, 0x00, 0x37, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x6d, 0xef, 0x00, 0x4f, 0x00, 0x00, + 0x49, 0xcc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x92, 0xff, 0x00, 0x6b, + 0x49, 0xcc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xdb, 0xff, 0x92, 0xf7, 0x92, 0xf8, 0x6e, 0xfb, 0x92, 0xf8, 0x6d, 0xff, 0x00, 0xb3, + 0x49, 0xcc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xdb, 0xff, 0x24, 0xb7, 0x00, 0x1b, 0x00, 0x14, 0x00, 0x13, 0x00, 0x0c, 0x25, 0x07, + 0x49, 0xcc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x6d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x6e, 0xf0, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0xcc, 0xff, 0xff, 0xff, 0xff, 0x49, 0xd8, 0x00, 0x78, 0x92, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xdb, 0xff, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x6d, 0xd3, 0xff, 0xff, 0x6d, 0xef, 0x00, 0x34, 0x00, 0x00, 0x49, 0xc7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x6d, 0xdc, 0x00, 0x14, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x49, 0xe0, 0x6d, 0xff, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x57, 0x92, 0xff, 0xff, 0xff, 0xff, 0xff, 0xb7, 0xff, 0x00, 0x78, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, + 0x00, 0x68, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x49, 0xd0, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xff, 0x6d, 0xd8, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6f, 0xb7, 0xff, 0xff, 0xff, 0x92, 0xff, 0x49, 0xac, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x03, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x25, 0xd7, 0x49, 0xc7, 0x00, 0x47, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +#endif +#if LV_COLOR_DEPTH == 16 && LV_COLOR_16_SWAP == 0 + /*Pixel format: Alpha 8 bit, Red: 5 bit, Green: 6 bit, Blue: 5 bit*/ + 0xc3, 0x18, 0xb8, 0xe4, 0x20, 0xc8, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x49, 0x4a, 0xcc, 0x96, 0xb5, 0xff, 0xc7, 0x39, 0xcc, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xe7, 0x39, 0xc8, 0xbf, 0xff, 0xff, 0xfb, 0xde, 0xff, 0x28, 0x42, 0xe0, 0x00, 0x00, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xe7, 0x39, 0xcb, 0x3d, 0xef, 0xff, 0xff, 0xff, 0xfc, 0x3d, 0xef, 0xff, 0xcb, 0x5a, 0xf3, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xe7, 0x39, 0xcb, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xbf, 0xff, 0xff, 0x8e, 0x73, 0xff, 0x00, 0x00, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xe8, 0x41, 0xcb, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x51, 0x8c, 0xff, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd3, 0x9c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xe8, 0x41, 0xcb, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x14, 0xa5, 0xff, 0xa2, 0x10, 0xab, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x08, 0x42, 0xcb, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xd7, 0xbd, 0xff, 0x04, 0x21, 0xbb, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x08, 0x42, 0xcc, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x59, 0xce, 0xff, 0xe8, 0x41, 0xd8, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x08, 0x42, 0xcc, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xe6, 0xff, 0xab, 0x5a, 0xef, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, + 0x08, 0x42, 0xcc, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xbe, 0xf7, 0xff, 0xaf, 0x7b, 0xff, 0x00, 0x00, 0x6b, + 0x28, 0x42, 0xcc, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7a, 0xd6, 0xff, 0x10, 0x84, 0xf7, 0xae, 0x73, 0xf8, 0x6e, 0x73, 0xfb, 0x8e, 0x73, 0xf8, 0xcb, 0x5a, 0xff, 0x61, 0x08, 0xb3, + 0x28, 0x42, 0xcc, 0x7d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x59, 0xce, 0xff, 0xa2, 0x10, 0xb7, 0x00, 0x00, 0x1b, 0x00, 0x00, 0x14, 0x00, 0x00, 0x13, 0x00, 0x00, 0x0c, 0x45, 0x29, 0x07, + 0x29, 0x4a, 0xcc, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xdb, 0xde, 0xff, 0xec, 0x62, 0xff, 0x1c, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0c, 0x63, 0xf0, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x29, 0x4a, 0xcc, 0xdf, 0xff, 0xff, 0x7d, 0xef, 0xff, 0x49, 0x4a, 0xd8, 0x00, 0x00, 0x78, 0x51, 0x8c, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x38, 0xc6, 0xff, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xcb, 0x5a, 0xd3, 0xdb, 0xde, 0xff, 0xec, 0x62, 0xef, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0xe7, 0x39, 0xc7, 0x5d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xbe, 0xf7, 0xff, 0xaa, 0x52, 0xdc, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0xe8, 0x41, 0xe0, 0xaa, 0x52, 0xff, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x57, 0x72, 0x94, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x96, 0xb5, 0xff, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x61, 0x08, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x68, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x69, 0x4a, 0xd0, 0x7d, 0xef, 0xff, 0xff, 0xff, 0xfc, 0xbe, 0xf7, 0xff, 0xaa, 0x52, 0xd8, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe4, 0x20, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6f, 0x75, 0xad, 0xff, 0xbf, 0xff, 0xff, 0x10, 0x84, 0xff, 0x86, 0x31, 0xac, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x41, 0x08, 0x03, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x66, 0x31, 0xd7, 0xc7, 0x39, 0xc7, 0x00, 0x00, 0x47, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +#endif +#if LV_COLOR_DEPTH == 16 && LV_COLOR_16_SWAP != 0 + /*Pixel format: Alpha 8 bit, Red: 5 bit, Green: 6 bit, Blue: 5 bit BUT the 2 color bytes are swapped*/ + 0x18, 0xc3, 0xb8, 0x20, 0xe4, 0xc8, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4a, 0x49, 0xcc, 0xb5, 0x96, 0xff, 0x39, 0xc7, 0xcc, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0xe7, 0xc8, 0xff, 0xbf, 0xff, 0xde, 0xfb, 0xff, 0x42, 0x28, 0xe0, 0x00, 0x00, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0xe7, 0xcb, 0xef, 0x3d, 0xff, 0xff, 0xff, 0xfc, 0xef, 0x3d, 0xff, 0x5a, 0xcb, 0xf3, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0xe7, 0xcb, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xbf, 0xff, 0x73, 0x8e, 0xff, 0x00, 0x00, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x41, 0xe8, 0xcb, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8c, 0x51, 0xff, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9c, 0xd3, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x41, 0xe8, 0xcb, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xa5, 0x14, 0xff, 0x10, 0xa2, 0xab, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x42, 0x08, 0xcb, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xbd, 0xd7, 0xff, 0x21, 0x04, 0xbb, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x42, 0x08, 0xcc, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xce, 0x59, 0xff, 0x41, 0xe8, 0xd8, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x42, 0x08, 0xcc, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe6, 0xfc, 0xff, 0x5a, 0xab, 0xef, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, + 0x42, 0x08, 0xcc, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xbe, 0xff, 0x7b, 0xaf, 0xff, 0x00, 0x00, 0x6b, + 0x42, 0x28, 0xcc, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xd6, 0x7a, 0xff, 0x84, 0x10, 0xf7, 0x73, 0xae, 0xf8, 0x73, 0x6e, 0xfb, 0x73, 0x8e, 0xf8, 0x5a, 0xcb, 0xff, 0x08, 0x61, 0xb3, + 0x42, 0x28, 0xcc, 0xef, 0x7d, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xce, 0x59, 0xff, 0x10, 0xa2, 0xb7, 0x00, 0x00, 0x1b, 0x00, 0x00, 0x14, 0x00, 0x00, 0x13, 0x00, 0x00, 0x0c, 0x29, 0x45, 0x07, + 0x4a, 0x29, 0xcc, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xde, 0xdb, 0xff, 0x62, 0xec, 0xff, 0xe7, 0x1c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x63, 0x0c, 0xf0, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4a, 0x29, 0xcc, 0xff, 0xdf, 0xff, 0xef, 0x7d, 0xff, 0x4a, 0x49, 0xd8, 0x00, 0x00, 0x78, 0x8c, 0x51, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc6, 0x38, 0xff, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x5a, 0xcb, 0xd3, 0xde, 0xdb, 0xff, 0x62, 0xec, 0xef, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x39, 0xe7, 0xc7, 0xef, 0x5d, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xbe, 0xff, 0x52, 0xaa, 0xdc, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x41, 0xe8, 0xe0, 0x52, 0xaa, 0xff, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x57, 0x94, 0x72, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xb5, 0x96, 0xff, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x08, 0x61, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x68, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x4a, 0x69, 0xd0, 0xef, 0x7d, 0xff, 0xff, 0xff, 0xfc, 0xf7, 0xbe, 0xff, 0x52, 0xaa, 0xd8, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xe4, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6f, 0xad, 0x75, 0xff, 0xff, 0xbf, 0xff, 0x84, 0x10, 0xff, 0x31, 0x86, 0xac, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x08, 0x41, 0x03, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x31, 0x66, 0xd7, 0x39, 0xc7, 0xc7, 0x00, 0x00, 0x47, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +#endif +#if LV_COLOR_DEPTH == 32 + 0x19, 0x19, 0x19, 0xb8, 0x1e, 0x1e, 0x1e, 0xc8, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x48, 0x48, 0x48, 0xcc, 0xb2, 0xb2, 0xb2, 0xff, 0x3a, 0x3a, 0x3a, 0xcc, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3b, 0x3b, 0x3b, 0xc8, 0xf6, 0xf6, 0xf6, 0xff, 0xdc, 0xdc, 0xdc, 0xff, 0x43, 0x43, 0x43, 0xe0, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3b, 0x3b, 0x3b, 0xcb, 0xe6, 0xe6, 0xe6, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xe5, 0xe5, 0xe5, 0xff, 0x59, 0x59, 0x59, 0xf3, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3c, 0x3c, 0x3c, 0xcb, 0xe9, 0xe9, 0xe9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xf5, 0xf5, 0xff, 0x72, 0x72, 0x72, 0xff, 0x00, 0x00, 0x00, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3d, 0x3d, 0x3d, 0xcb, 0xe9, 0xe9, 0xe9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8a, 0x8a, 0x8a, 0xff, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x99, 0x99, 0x99, 0x00, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3e, 0x3e, 0x3e, 0xcb, 0xe9, 0xe9, 0xe9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xa2, 0xa2, 0xa2, 0xff, 0x13, 0x13, 0x13, 0xab, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3f, 0x3f, 0x3f, 0xcb, 0xe9, 0xe9, 0xe9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xb7, 0xb7, 0xb7, 0xff, 0x1f, 0x1f, 0x1f, 0xbb, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x41, 0x41, 0x41, 0xcc, 0xea, 0xea, 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xca, 0xca, 0xca, 0xff, 0x3d, 0x3d, 0x3d, 0xd8, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x41, 0x41, 0x41, 0xcc, 0xea, 0xea, 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xde, 0xde, 0xde, 0xff, 0x56, 0x56, 0x56, 0xef, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, + 0x42, 0x42, 0x42, 0xcc, 0xea, 0xea, 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xf3, 0xf3, 0xff, 0x76, 0x76, 0x76, 0xff, 0x00, 0x00, 0x00, 0x6b, + 0x43, 0x43, 0x43, 0xcc, 0xea, 0xea, 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xce, 0xce, 0xce, 0xff, 0x80, 0x80, 0x80, 0xf7, 0x74, 0x74, 0x74, 0xf8, 0x6d, 0x6d, 0x6d, 0xfb, 0x72, 0x72, 0x72, 0xf8, 0x57, 0x57, 0x57, 0xff, 0x0c, 0x0c, 0x0c, 0xb3, + 0x44, 0x44, 0x44, 0xcc, 0xeb, 0xeb, 0xeb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xfb, 0xfb, 0xfb, 0xff, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc9, 0xc9, 0xc9, 0xff, 0x13, 0x13, 0x13, 0xb7, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x0c, 0x29, 0x29, 0x29, 0x07, + 0x45, 0x45, 0x45, 0xcc, 0xe8, 0xe8, 0xe8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xd9, 0xd9, 0xd9, 0xff, 0x5e, 0x5e, 0x5e, 0xff, 0xe2, 0xe2, 0xe2, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x62, 0x62, 0x62, 0xf0, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x45, 0x45, 0x45, 0xcc, 0xf9, 0xf9, 0xf9, 0xff, 0xec, 0xec, 0xec, 0xff, 0x4a, 0x4a, 0x4a, 0xd8, 0x00, 0x00, 0x00, 0x78, 0x8a, 0x8a, 0x8a, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc3, 0xc3, 0xc3, 0xff, 0x00, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x58, 0x58, 0x58, 0xd3, 0xd9, 0xd9, 0xd9, 0xff, 0x5e, 0x5e, 0x5e, 0xef, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x3b, 0x3b, 0xc7, 0xe9, 0xe9, 0xe9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf4, 0xf4, 0xf4, 0xff, 0x54, 0x54, 0x54, 0xdc, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, + 0x3e, 0x3e, 0x3e, 0xe0, 0x54, 0x54, 0x54, 0xff, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x57, 0x8e, 0x8e, 0x8e, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xb0, 0xb0, 0xb0, 0xff, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x0c, 0x0c, 0x04, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x4c, 0x4c, 0x4c, 0xd0, 0xec, 0xec, 0xec, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xf4, 0xf4, 0xf4, 0xff, 0x53, 0x53, 0x53, 0xd8, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x1e, 0x1e, 0x00, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6f, 0xab, 0xab, 0xab, 0xff, 0xf6, 0xf6, 0xf6, 0xff, 0x80, 0x80, 0x80, 0xff, 0x31, 0x31, 0x31, 0xac, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x09, 0x09, 0x09, 0x03, 0x02, 0x02, 0x02, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x2e, 0x2e, 0x2e, 0xd7, 0x38, 0x38, 0x38, 0xc7, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +#endif +}; + +const lv_img_dsc_t img_cursor = { + .header.always_zero = 0, + .header.w = 14, + .header.h = 20, + .data_size = 280 * LV_IMG_PX_SIZE_ALPHA_BYTE, + .header.cf = LV_IMG_CF_TRUE_COLOR_ALPHA, + .data = mouse_cursor_icon_map, +}; +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/platform/lvgl/usbh_hid_lvgl.c b/components/drivers/usb/cherryusb/platform/lvgl/usbh_hid_lvgl.c new file mode 100644 index 00000000000..958dbd44fdf --- /dev/null +++ b/components/drivers/usb/cherryusb/platform/lvgl/usbh_hid_lvgl.c @@ -0,0 +1,455 @@ +/* + * Copyright (c) 2025, sakumisu + * Copyright (c) 2025, RCSN + * + * SPDX-License-Identifier: Apache-2.0 + */ + +//Refer to https://github.com/espressif/esp-bsp/blob/master/components/esp_lvgl_port/src/lvgl9/esp_lvgl_port_usbhid.c + +#include "usbh_core.h" +#include "usbh_hid.h" +#include "usbh_hid_lvgl.h" + +/* LVGL image of cursor */ +LV_IMG_DECLARE(img_cursor) + +const uint8_t keycode2ascii[57][2] = { + {0, 0}, /* HID_KEY_NO_PRESS */ + {0, 0}, /* HID_KEY_ROLLOVER */ + {0, 0}, /* HID_KEY_POST_FAIL */ + {0, 0}, /* HID_KEY_ERROR_UNDEFINED */ + {'a', 'A'}, /* HID_KEY_A */ + {'b', 'B'}, /* HID_KEY_B */ + {'c', 'C'}, /* HID_KEY_C */ + {'d', 'D'}, /* HID_KEY_D */ + {'e', 'E'}, /* HID_KEY_E */ + {'f', 'F'}, /* HID_KEY_F */ + {'g', 'G'}, /* HID_KEY_G */ + {'h', 'H'}, /* HID_KEY_H */ + {'i', 'I'}, /* HID_KEY_I */ + {'j', 'J'}, /* HID_KEY_J */ + {'k', 'K'}, /* HID_KEY_K */ + {'l', 'L'}, /* HID_KEY_L */ + {'m', 'M'}, /* HID_KEY_M */ + {'n', 'N'}, /* HID_KEY_N */ + {'o', 'O'}, /* HID_KEY_O */ + {'p', 'P'}, /* HID_KEY_P */ + {'q', 'Q'}, /* HID_KEY_Q */ + {'r', 'R'}, /* HID_KEY_R */ + {'s', 'S'}, /* HID_KEY_S */ + {'t', 'T'}, /* HID_KEY_T */ + {'u', 'U'}, /* HID_KEY_U */ + {'v', 'V'}, /* HID_KEY_V */ + {'w', 'W'}, /* HID_KEY_W */ + {'x', 'X'}, /* HID_KEY_X */ + {'y', 'Y'}, /* HID_KEY_Y */ + {'z', 'Z'}, /* HID_KEY_Z */ + {'1', '!'}, /* HID_KEY_1 */ + {'2', '@'}, /* HID_KEY_2 */ + {'3', '#'}, /* HID_KEY_3 */ + {'4', '$'}, /* HID_KEY_4 */ + {'5', '%'}, /* HID_KEY_5 */ + {'6', '^'}, /* HID_KEY_6 */ + {'7', '&'}, /* HID_KEY_7 */ + {'8', '*'}, /* HID_KEY_8 */ + {'9', '('}, /* HID_KEY_9 */ + {'0', ')'}, /* HID_KEY_0 */ + {'\r', '\r'}, /* HID_KEY_ENTER */ + {0, 0}, /* HID_KEY_ESC */ + {'\b', 0}, /* HID_KEY_DEL */ + {0, 0}, /* HID_KEY_TAB */ + {' ', ' '}, /* HID_KEY_SPACE */ + {'-', '_'}, /* HID_KEY_MINUS */ + {'=', '+'}, /* HID_KEY_EQUAL */ + {'[', '{'}, /* HID_KEY_OPEN_BRACKET */ + {']', '}'}, /* HID_KEY_CLOSE_BRACKET */ + {'\\', '|'}, /* HID_KEY_BACK_SLASH */ + {'\\', '|'}, /* HID_KEY_SHARP */ + {';', ':'}, /* HID_KEY_COLON */ + {'\'', '"'}, /* HID_KEY_QUOTE */ + {'`', '~'}, /* HID_KEY_TILDE */ + {',', '<'}, /* HID_KEY_LESS */ + {'.', '>'}, /* HID_KEY_GREATER */ + {'/', '?'} /* HID_KEY_SLASH */ +}; + +struct usbh_hid_lvgl { + struct { + lv_indev_t *indev; /* LVGL mouse input device driver */ + uint8_t sensitivity; /* Mouse sensitivity (cannot be zero) */ + int16_t x; /* Mouse X coordinate */ + int16_t y; /* Mouse Y coordinate */ + bool left_button; /* Mouse left button state */ + } mouse; + struct { + lv_indev_t *indev; /* LVGL keyboard input device driver */ + uint32_t last_key; + bool pressed; + } kb; +}; + +static struct usbh_hid_lvgl g_hid_lvgl; + +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t hid_mouse_buffer[64]; +USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t hid_keyboard_buffer[64]; + +#if defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 9) +static void usbh_hid_lvgl_read_mouse(lv_indev_t *indev_drv, lv_indev_data_t *data) +{ + int16_t width = 0; + int16_t height = 0; + struct usbh_hid_lvgl *ctx = &g_hid_lvgl; + + lv_display_t *disp = lv_indev_get_display(indev_drv); + if (lv_display_get_rotation(disp) == LV_DISPLAY_ROTATION_0 || lv_display_get_rotation(disp) == LV_DISPLAY_ROTATION_180) { + width = lv_display_get_physical_horizontal_resolution(disp); + height = lv_display_get_vertical_resolution(disp); + } else { + width = lv_display_get_vertical_resolution(disp); + height = lv_display_get_physical_horizontal_resolution(disp); + } + + /* Screen borders */ + if (ctx->mouse.x < 0) { + ctx->mouse.x = 0; + } else if (ctx->mouse.x >= width * ctx->mouse.sensitivity) { + ctx->mouse.x = (width * ctx->mouse.sensitivity) - 1; + } + if (ctx->mouse.y < 0) { + ctx->mouse.y = 0; + } else if (ctx->mouse.y >= height * ctx->mouse.sensitivity) { + ctx->mouse.y = (height * ctx->mouse.sensitivity) - 1; + } + + /* Get coordinates by rotation with sensitivity */ + switch (lv_display_get_rotation(disp)) { + case LV_DISPLAY_ROTATION_0: + data->point.x = ctx->mouse.x / ctx->mouse.sensitivity; + data->point.y = ctx->mouse.y / ctx->mouse.sensitivity; + break; + case LV_DISPLAY_ROTATION_90: + data->point.y = width - ctx->mouse.x / ctx->mouse.sensitivity; + data->point.x = ctx->mouse.y / ctx->mouse.sensitivity; + break; + case LV_DISPLAY_ROTATION_180: + data->point.x = width - ctx->mouse.x / ctx->mouse.sensitivity; + data->point.y = height - ctx->mouse.y / ctx->mouse.sensitivity; + break; + case LV_DISPLAY_ROTATION_270: + data->point.y = ctx->mouse.x / ctx->mouse.sensitivity; + data->point.x = height - ctx->mouse.y / ctx->mouse.sensitivity; + break; + } + + if (ctx->mouse.left_button) { + data->state = LV_INDEV_STATE_PRESSED; + } else { + data->state = LV_INDEV_STATE_RELEASED; + } +} + +static void usbh_hid_lvgl_read_keyboard(lv_indev_t *indev_drv, lv_indev_data_t *data) +{ + (void)indev_drv; + struct usbh_hid_lvgl *ctx = &g_hid_lvgl; + + data->key = ctx->kb.last_key; + if (ctx->kb.pressed) { + data->state = LV_INDEV_STATE_PRESSED; + ctx->kb.pressed = false; + } else { + data->state = LV_INDEV_STATE_RELEASED; + ctx->kb.last_key = 0; + } +} + +#elif defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 8) +static lv_indev_drv_t indev_drv; +static lv_indev_drv_t keyboard_drv; +static void hpm_lvgl_indev_read_cb(lv_indev_drv_t *indev_drv, lv_indev_data_t *data) +{ + int16_t width = 0; + int16_t height = 0; + struct usbh_hid_lvgl *ctx = &g_hid_lvgl; + + if ((indev_drv->disp->driver->rotated == LV_DISP_ROT_NONE) || (indev_drv->disp->driver->rotated == LV_DISP_ROT_180)) { + width = indev_drv->disp->driver->hor_res; + height = indev_drv->disp->driver->ver_res; + } else { + width = indev_drv->disp->driver->ver_res; + height = indev_drv->disp->driver->hor_res; + } + + + /* Screen borders */ + if (ctx->mouse.x < 0) { + ctx->mouse.x = 0; + } else if (ctx->mouse.x >= width * ctx->mouse.sensitivity) { + ctx->mouse.x = (width * ctx->mouse.sensitivity) - 1; + } + if (ctx->mouse.y < 0) { + ctx->mouse.y = 0; + } else if (ctx->mouse.y >= height * ctx->mouse.sensitivity) { + ctx->mouse.y = (height * ctx->mouse.sensitivity) - 1; + } + + /* Get coordinates by rotation with sensitivity */ + switch (indev_drv->disp->driver->rotated) { + case LV_DISP_ROT_NONE: + data->point.x = ctx->mouse.x / ctx->mouse.sensitivity; + data->point.y = ctx->mouse.y / ctx->mouse.sensitivity; + break; + case LV_DISP_ROT_90: + data->point.y = width - ctx->mouse.x / ctx->mouse.sensitivity; + data->point.x = ctx->mouse.y / ctx->mouse.sensitivity; + break; + case LV_DISP_ROT_180: + data->point.x = width - ctx->mouse.x / ctx->mouse.sensitivity; + data->point.y = height - ctx->mouse.y / ctx->mouse.sensitivity; + break; + case LV_DISP_ROT_270: + data->point.y = ctx->mouse.x / ctx->mouse.sensitivity; + data->point.x = height - ctx->mouse.y / ctx->mouse.sensitivity; + break; + } + + if (ctx->mouse.left_button) { + data->state = LV_INDEV_STATE_PRESSED; + } else { + data->state = LV_INDEV_STATE_RELEASED; + } +} + +static void usbh_hid_lvgl_read_keyboard(lv_indev_drv_t *indev_drv, lv_indev_data_t *data) +{ + (void)indev_drv; + struct usbh_hid_lvgl *ctx = &g_hid_lvgl; + + data->key = ctx->kb.last_key; + if (ctx->kb.pressed) { + data->state = LV_INDEV_STATE_PRESSED; + ctx->kb.pressed = false; + } else { + data->state = LV_INDEV_STATE_RELEASED; + ctx->kb.last_key = 0; + } +} +#endif + +lv_indev_t *usbh_hid_lvgl_add_mouse(uint8_t sensitivity) +{ + int32_t ver_res, hor_res; + lv_indev_t *indev; + + /* Initialize USB HID */ + struct usbh_hid_lvgl *hid_ctx = &g_hid_lvgl; + + /* Mouse sensitivity cannot be zero */ + hid_ctx->mouse.sensitivity = (sensitivity == 0 ? 1 : sensitivity); + +#if defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 9) + ver_res = lv_display_get_vertical_resolution(lv_display_get_default()); + hor_res = lv_display_get_physical_horizontal_resolution(lv_display_get_default()); +#elif defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 8) + lv_disp_t * disp = lv_disp_get_default(); + ver_res = disp->driver->hor_res; + hor_res = disp->driver->ver_res; +#endif + /* Default coordinates to screen center */ + hid_ctx->mouse.x = (hor_res * hid_ctx->mouse.sensitivity) / 2; + hid_ctx->mouse.y = (ver_res * hid_ctx->mouse.sensitivity) / 2; + + /* Register a mouse input device */ +#if defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 9) + indev = lv_indev_create(); + lv_indev_set_type(indev, LV_INDEV_TYPE_POINTER); + lv_indev_set_read_cb(indev, usbh_hid_lvgl_read_mouse); + lv_indev_set_driver_data(indev, hid_ctx); + hid_ctx->mouse.indev = indev; +#elif defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 8) + lv_indev_drv_init(&indev_drv); + indev_drv.read_cb = hpm_lvgl_indev_read_cb; + indev_drv.type = LV_INDEV_TYPE_POINTER; + indev_drv.user_data = (void *)hid_ctx; + indev = lv_indev_drv_register(&indev_drv); +#endif + /* Set image of cursor */ + lv_obj_t *cursor; + cursor = lv_img_create(lv_scr_act()); + lv_img_set_src(cursor, &img_cursor); + lv_indev_set_cursor(indev, cursor); + + return indev; +} + +lv_indev_t *usbh_hid_lvgl_add_keyboard(void) +{ + lv_indev_t *indev; + + /* Initialize USB HID */ + struct usbh_hid_lvgl *hid_ctx = &g_hid_lvgl; + + /* Register a keyboard input device */ +#if defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 9) + indev = lv_indev_create(); + lv_indev_set_type(indev, LV_INDEV_TYPE_KEYPAD); + lv_indev_set_read_cb(indev, usbh_hid_lvgl_read_keyboard); + lv_indev_set_driver_data(indev, hid_ctx); + hid_ctx->kb.indev = indev; +#elif defined(LVGL_VERSION_MAJOR) && (LVGL_VERSION_MAJOR == 8) + lv_indev_drv_init(&keyboard_drv); + keyboard_drv.read_cb = usbh_hid_lvgl_read_keyboard; + keyboard_drv.type = LV_INDEV_TYPE_KEYPAD; + keyboard_drv.user_data = (void *)hid_ctx; + indev = lv_indev_drv_register(&keyboard_drv); +#endif + return indev; +} + +void usbh_hid_mouse_callback(void *arg, int nbytes) +{ + struct usbh_hid *hid_class = (struct usbh_hid *)arg; + + if (nbytes > 0) { + struct usbh_hid_lvgl *hid_ctx = &g_hid_lvgl; + + hid_ctx->mouse.left_button = hid_mouse_buffer[0]; + hid_ctx->mouse.x += (int8_t)hid_mouse_buffer[1]; + hid_ctx->mouse.y += (int8_t)hid_mouse_buffer[2]; + + usbh_int_urb_fill(&hid_class->intin_urb, hid_class->hport, hid_class->intin, hid_mouse_buffer, hid_class->intin->wMaxPacketSize, 0, + usbh_hid_mouse_callback, hid_class); + usbh_submit_urb(&hid_class->intin_urb); + } else if (nbytes == -USB_ERR_NAK) { /* only dwc2 should do this */ + usbh_int_urb_fill(&hid_class->intin_urb, hid_class->hport, hid_class->intin, hid_mouse_buffer, hid_class->intin->wMaxPacketSize, 0, + usbh_hid_mouse_callback, hid_class); + usbh_submit_urb(&hid_class->intin_urb); + } else { + } +} + +static char usb_hid_get_keyboard_char(uint8_t key, uint8_t shift) +{ + char ret_key = 0; + static bool cap_lock = false; + + if (shift > 1) { + shift = 1; + } + + if ((key >= HID_KBD_USAGE_A) && (key <= HID_KBD_USAGE_QUESTION)) { + ret_key = (cap_lock == false) ? keycode2ascii[key][0] : keycode2ascii[key][1]; + } else if ((key >= HID_KBD_USAGE_1) && (key <= HID_KBD_USAGE_QUESTION)) { + ret_key = keycode2ascii[key][shift]; + } else if ((key >= HID_KBD_USAGE_KPD1) && (key <= HID_KBD_USAGE_KPD0)) { + ret_key = keycode2ascii[(key - HID_KBD_USAGE_KPD1) + HID_KBD_USAGE_1][0]; + } else if ((key >= HID_KBD_USAGE_KPDDIV) && (key <= HID_KBD_USAGE_KPDEMTER)) { + switch (key) { + case HID_KBD_USAGE_KPDDIV: + ret_key = '/'; + break; + case HID_KBD_USAGE_KPDMUL: + ret_key = '*'; + break; + case HID_KBD_USAGE_KPDHMINUS: + ret_key = '-'; + break; + case HID_KBD_USAGE_KPDPLUS: + ret_key = '+'; + break; + default: + break; + } + } else if (key == HID_KBD_USAGE_KPDDELETE) { + ret_key = '.'; + } else if (key == HID_KBD_USAGE_CAPSLOCK) { + cap_lock = !cap_lock; + } + + return ret_key; +} + +void usbh_hid_keyboard_callback(void *arg, int nbytes) +{ + struct usbh_hid *hid_class = (struct usbh_hid *)arg; + + if (nbytes > 0) { + struct usbh_hid_lvgl *hid_ctx = &g_hid_lvgl; + struct usb_hid_kbd_report *keyboard = (struct usb_hid_kbd_report *)hid_keyboard_buffer; + + for (int i = 0; i < 6; i++) { + if ((keyboard->key[i] <= HID_KBD_USAGE_MAX) && (keyboard->key[i] > HID_KBD_USAGE_NONE)) { + char key = 0; + + /* LVGL special keys */ + if (keyboard->key[i] == HID_KBD_USAGE_TAB) { + if (((keyboard->modifier & HID_MODIFIER_LSHIFT) || (keyboard->modifier & HID_MODIFIER_RSHIFT))) { + key = LV_KEY_PREV; + } else { + key = LV_KEY_NEXT; + } + } else if (keyboard->key[i] == HID_KBD_USAGE_RIGHT) { + key = LV_KEY_RIGHT; + } else if (keyboard->key[i] == HID_KBD_USAGE_LEFT) { + key = LV_KEY_LEFT; + } else if (keyboard->key[i] == HID_KBD_USAGE_DOWN) { + key = LV_KEY_DOWN; + } else if (keyboard->key[i] == HID_KBD_USAGE_UP) { + key = LV_KEY_UP; + } else if (keyboard->key[i] == HID_KBD_USAGE_ENTER || keyboard->key[i] == HID_KBD_USAGE_KPDEMTER) { + key = LV_KEY_ENTER; + } else if (keyboard->key[i] == HID_KBD_USAGE_DELETE) { + key = LV_KEY_BACKSPACE; + } else if (keyboard->key[i] == HID_KBD_USAGE_HOME) { + key = LV_KEY_HOME; + } else if (keyboard->key[i] == HID_KBD_USAGE_END) { + key = LV_KEY_END; + } else if (keyboard->key[i] == HID_KBD_USAGE_DELFWD) { + key = LV_KEY_DEL; + } else { + /* Get ASCII char */ + key = usb_hid_get_keyboard_char(keyboard->key[i], ((keyboard->modifier & HID_MODIFIER_LSHIFT) || (keyboard->modifier & HID_MODIFIER_RSHIFT))); + } + + if (key == 0) { + USB_LOG_ERR("Not recognized key: %c (%d)\r\n", keyboard->key[i], keyboard->key[i]); + } + hid_ctx->kb.last_key = key; + hid_ctx->kb.pressed = true; + } + } + + usbh_int_urb_fill(&hid_class->intin_urb, hid_class->hport, hid_class->intin, hid_keyboard_buffer, hid_class->intin->wMaxPacketSize, 0, + usbh_hid_keyboard_callback, hid_class); + usbh_submit_urb(&hid_class->intin_urb); + } else if (nbytes == -USB_ERR_NAK) { /* only dwc2 should do this */ + usbh_int_urb_fill(&hid_class->intin_urb, hid_class->hport, hid_class->intin, hid_keyboard_buffer, hid_class->intin->wMaxPacketSize, 0, + usbh_hid_keyboard_callback, hid_class); + usbh_submit_urb(&hid_class->intin_urb); + } else { + } +} + +extern int usbh_hid_set_protocol(struct usbh_hid *hid_class, uint8_t protocol); + +void usbh_hid_run(struct usbh_hid *hid_class) +{ + usbh_hid_set_protocol(hid_class, 0); + + if (hid_class->hport->config.intf[hid_class->intf].altsetting[0].intf_desc.bInterfaceProtocol == HID_PROTOCOL_KEYBOARD) { + usbh_int_urb_fill(&hid_class->intin_urb, hid_class->hport, hid_class->intin, hid_keyboard_buffer, hid_class->intin->wMaxPacketSize, 0, + usbh_hid_keyboard_callback, hid_class); + usbh_submit_urb(&hid_class->intin_urb); + } else if (hid_class->hport->config.intf[hid_class->intf].altsetting[0].intf_desc.bInterfaceProtocol == HID_PROTOCOL_MOUSE) { + usbh_int_urb_fill(&hid_class->intin_urb, hid_class->hport, hid_class->intin, hid_mouse_buffer, hid_class->intin->wMaxPacketSize, 0, + usbh_hid_mouse_callback, hid_class); + usbh_submit_urb(&hid_class->intin_urb); + } else { + } +} + +void usbh_hid_stop(struct usbh_hid *hid_class) +{ + (void)hid_class; +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/platform/lvgl/usbh_hid_lvgl.h b/components/drivers/usb/cherryusb/platform/lvgl/usbh_hid_lvgl.h new file mode 100644 index 00000000000..50d05093ae7 --- /dev/null +++ b/components/drivers/usb/cherryusb/platform/lvgl/usbh_hid_lvgl.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2025, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USBH_HID_LVGL_H +#define USBH_HID_LVGL_H + +#include "lvgl.h" + +lv_indev_t *usbh_hid_lvgl_add_mouse(uint8_t sensitivity); +lv_indev_t *usbh_hid_lvgl_add_keyboard(void); + +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/platform/rtthread/usb_check.c b/components/drivers/usb/cherryusb/platform/rtthread/usb_check.c index b20e17d8755..4a598fe6c0f 100644 --- a/components/drivers/usb/cherryusb/platform/rtthread/usb_check.c +++ b/components/drivers/usb/cherryusb/platform/rtthread/usb_check.c @@ -1,6 +1,7 @@ #include "rtthread.h" +#include "usb_config.h" -#ifdef RT_CHERRYUSB_HOST +#if defined(PKG_CHERRYUSB_HOST) || defined(RT_CHERRYUSB_HOST) #ifndef RT_USING_TIMER_SOFT #error must enable RT_USING_TIMER_SOFT to support timer callback in thread @@ -11,3 +12,20 @@ #endif #endif + +#if defined(ARCH_ARM_CORTEX_M7) || \ + defined(SOC_HPM6000) || defined(SOC_HPM6E00) || defined(SOC_HPM6P00) || \ + defined(BSP_USING_BL61X) || defined(BSP_USING_BL808) +#ifndef RT_USING_CACHE +#error RT_USING_CACHE must be enabled in this chip +#endif +#endif + +#ifdef RT_USING_CACHE +#ifndef CONFIG_USB_DCACHE_ENABLE +#error CONFIG_USB_DCACHE_ENABLE must be enabled +#endif +#if RT_ALIGN_SIZE != 32 && RT_ALIGN_SIZE != 64 +#error RT_ALIGN_SIZE must be cacheline to 32 or 64 +#endif +#endif diff --git a/components/drivers/usb/cherryusb/platform/rtthread/usb_msh.c b/components/drivers/usb/cherryusb/platform/rtthread/usb_msh.c index 4de11054720..a153ed053d2 100644 --- a/components/drivers/usb/cherryusb/platform/rtthread/usb_msh.c +++ b/components/drivers/usb/cherryusb/platform/rtthread/usb_msh.c @@ -5,7 +5,7 @@ */ #include "rtthread.h" -#ifdef RT_CHERRYUSB_HOST +#if defined(PKG_CHERRYUSB_HOST) || defined(RT_CHERRYUSB_HOST) #include "usbh_core.h" diff --git a/components/drivers/usb/cherryusb/platform/rtthread/usbh_dfs.c b/components/drivers/usb/cherryusb/platform/rtthread/usbh_dfs.c index eee64a0bfb2..7cdfe1165c4 100644 --- a/components/drivers/usb/cherryusb/platform/rtthread/usbh_dfs.c +++ b/components/drivers/usb/cherryusb/platform/rtthread/usbh_dfs.c @@ -11,35 +11,14 @@ #define DEV_FORMAT "/dev/sd%c" -#ifndef CONFIG_USB_DFS_MOUNT_POINT -#define CONFIG_USB_DFS_MOUNT_POINT "/" +#ifndef RT_USING_DFS_ELMFAT +#error "RT_USING_DFS_ELMFAT must be enabled to use USB mass storage device" #endif -#if defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) || \ - defined(SOC_HPM5000) || defined(SOC_HPM6000) || defined(SOC_HPM6E00) || defined(BSP_USING_BL61X) -#ifndef RT_USING_CACHE -#error usbh msc must enable RT_USING_CACHE in this chip -#endif -#if RT_ALIGN_SIZE != 32 && RT_ALIGN_SIZE != 64 -#error usbh msc must set cache line to 32 or 64 -#endif -#endif - -#if defined(BSP_USING_BL61X) -#include "bflb_l1c.h" - -void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) -{ - if (ops == RT_HW_CACHE_FLUSH) { - bflb_l1c_dcache_clean_range(addr, size); - } else { - bflb_l1c_dcache_invalidate_range(addr, size); - } -} +#ifndef CONFIG_USB_DFS_MOUNT_POINT +#define CONFIG_USB_DFS_MOUNT_POINT "/" #endif -USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t msc_sector[512]; - static rt_err_t rt_udisk_init(rt_device_t dev) { struct usbh_msc *msc_class = (struct usbh_msc *)dev->user_data; @@ -56,36 +35,29 @@ static ssize_t rt_udisk_read(rt_device_t dev, rt_off_t pos, void *buffer, { struct usbh_msc *msc_class = (struct usbh_msc *)dev->user_data; int ret; + rt_uint8_t *align_buf; + align_buf = (rt_uint8_t *)buffer; #ifdef RT_USING_CACHE - rt_uint32_t *align_buf; - - if ((uint32_t)buffer & (RT_ALIGN_SIZE - 1)) { - align_buf = rt_malloc_align(size * msc_class->blocksize, RT_ALIGN_SIZE); + if ((uint32_t)buffer & (CONFIG_USB_ALIGN_SIZE - 1)) { + align_buf = rt_malloc_align(size * msc_class->blocksize, CONFIG_USB_ALIGN_SIZE); if (!align_buf) { rt_kprintf("msc get align buf failed\n"); return 0; } } else { - align_buf = (rt_uint32_t *)buffer; } - +#endif ret = usbh_msc_scsi_read10(msc_class, pos, (uint8_t *)align_buf, size); if (ret < 0) { rt_kprintf("usb mass_storage read failed\n"); return 0; } - rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, align_buf, size * msc_class->blocksize); - if ((uint32_t)buffer & (RT_ALIGN_SIZE - 1)) { - rt_memcpy(buffer, align_buf, size * msc_class->blocksize); +#ifdef RT_USING_CACHE + if ((uint32_t)buffer & (CONFIG_USB_ALIGN_SIZE - 1)) { + usb_memcpy(buffer, align_buf, size * msc_class->blocksize); rt_free_align(align_buf); } -#else - ret = usbh_msc_scsi_read10(msc_class, pos, buffer, size); - if (ret < 0) { - rt_kprintf("usb mass_storage read failed\n"); - return 0; - } #endif return size; } @@ -95,37 +67,29 @@ static ssize_t rt_udisk_write(rt_device_t dev, rt_off_t pos, const void *buffer, { struct usbh_msc *msc_class = (struct usbh_msc *)dev->user_data; int ret; + rt_uint8_t *align_buf; + align_buf = (rt_uint8_t *)buffer; #ifdef RT_USING_CACHE - rt_uint32_t *align_buf; - - if ((uint32_t)buffer & (RT_ALIGN_SIZE - 1)) { - align_buf = rt_malloc_align(size * msc_class->blocksize, RT_ALIGN_SIZE); + if ((uint32_t)buffer & (CONFIG_USB_ALIGN_SIZE - 1)) { + align_buf = rt_malloc_align(size * msc_class->blocksize, CONFIG_USB_ALIGN_SIZE); if (!align_buf) { rt_kprintf("msc get align buf failed\n"); return 0; } - rt_memcpy(align_buf, buffer, size * msc_class->blocksize); - } else { - align_buf = (rt_uint32_t *)buffer; + usb_memcpy(align_buf, buffer, size * msc_class->blocksize); } - - rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, align_buf, size * msc_class->blocksize); +#endif ret = usbh_msc_scsi_write10(msc_class, pos, (uint8_t *)align_buf, size); if (ret < 0) { rt_kprintf("usb mass_storage write failed\n"); return 0; } - if ((uint32_t)buffer & (RT_ALIGN_SIZE - 1)) { +#ifdef RT_USING_CACHE + if ((uint32_t)buffer & (CONFIG_USB_ALIGN_SIZE - 1)) { rt_free_align(align_buf); } -#else - ret = usbh_msc_scsi_write10(msc_class, pos, buffer, size); - if (ret < 0) { - rt_kprintf("usb mass_storage write failed\n"); - return 0; - } #endif return size; diff --git a/components/drivers/usb/cherryusb/demo/bootuf2/bootuf2.c b/components/drivers/usb/cherryusb/platform/uf2/bootuf2.c similarity index 99% rename from components/drivers/usb/cherryusb/demo/bootuf2/bootuf2.c rename to components/drivers/usb/cherryusb/platform/uf2/bootuf2.c index c4c6ee5f674..80de5592dc9 100644 --- a/components/drivers/usb/cherryusb/demo/bootuf2/bootuf2.c +++ b/components/drivers/usb/cherryusb/platform/uf2/bootuf2.c @@ -196,7 +196,7 @@ static void bootuf2block_state_update(struct bootuf2_STATE *STATE, } USB_LOG_DBG("UF2 block total %d written %d index %d\r\n", - uf2->NumberOfBlock, STATE->NumberOfWritten, uf2->BlockIndex); + uf2->NumberOfBllock, STATE->NumberOfWritten, uf2->BlockIndex); } static bool bootuf2block_state_check(struct bootuf2_STATE *STATE) diff --git a/components/drivers/usb/cherryusb/demo/bootuf2/bootuf2.h b/components/drivers/usb/cherryusb/platform/uf2/bootuf2.h similarity index 100% rename from components/drivers/usb/cherryusb/demo/bootuf2/bootuf2.h rename to components/drivers/usb/cherryusb/platform/uf2/bootuf2.h diff --git a/components/drivers/usb/cherryusb/port/aic/usb_dc_aic.c b/components/drivers/usb/cherryusb/port/aic/usb_dc_aic.c index 46cbfea858c..fafa6118d9f 100644 --- a/components/drivers/usb/cherryusb/port/aic/usb_dc_aic.c +++ b/components/drivers/usb/cherryusb/port/aic/usb_dc_aic.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023, Artinchip Technology Co., Ltd + * Copyright (c) 2023-2024, ArtInChip Technology Co., Ltd * * SPDX-License-Identifier: Apache-2.0 */ @@ -48,12 +48,16 @@ #define USB_NUM_BIDIR_ENDPOINTS 5 /* define with minimum value*/ #endif +/* USB_P_TXFIFO_NUM: + * There are only 2 Periodic_TXFIFO, and each Interrupt/Isochronous In ep + * needs to request one P_TXFIFO. So, only two Interrupt/Isochronous In ep + * can be requested for at most. + */ +#define USB_P_TXFIFO_NUM 2 + #define AIC_UDC_REG ((AIC_UDC_RegDef *)(USB_BASE)) #define AIC_EP_FIFO(i) *(__IO uint32_t *)(USB_BASE + AIC_EP_FIFO_BASE + ((i)*AIC_EP_FIFO_SIZE)) -static uint8_t g_aic_udc_ibuf[USB_RAM_SIZE] __ALIGNED(CACHE_LINE_SIZE); -static uint8_t g_aic_udc_obuf[USB_RAM_SIZE] __ALIGNED(CACHE_LINE_SIZE); - /* Endpoint state */ struct aic_ep_state { uint16_t ep_mps; /* Endpoint max packet size */ @@ -75,13 +79,23 @@ extern uint32_t usbd_clk; USB_MEM_ALIGNX struct usb_setup_packet setup; USB_MEM_ALIGNX struct aic_ep_state in_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< IN endpoint parameters*/ struct aic_ep_state out_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< OUT endpoint parameters */ - uint32_t tx_fifo_map; + struct usb_endpoint_descriptor in_ep_desc[USB_NUM_BIDIR_ENDPOINTS]; + uint32_t p_txfifo_map; /* map which periodic_txfifo is used */ + uint32_t np_txfifo_map; /* map no-periodic_txfifo is used */ } g_aic_udc; -uint8_t rst_allow = 0; +#define AIC_EP0_SETUP 1 +#define AIC_EP0_DATA_IN 2 +#define AIC_EP0_STATUS_OUT 3 +#define AIC_EP0_DATA_OUT 12 +#define AIC_EP0_STATUS_IN 13 + uint8_t ep0_ctrl_stage = 0; /* 1 = setup stage, 2 = data stage, 3 = status stage */ #ifdef CONFIG_USB_AIC_DMA_ENABLE +static uint8_t g_aic_udc_ibuf[USB_RAM_SIZE] __ALIGNED(CACHE_LINE_SIZE); +static uint8_t g_aic_udc_obuf[USB_RAM_SIZE] __ALIGNED(CACHE_LINE_SIZE); + void aic_udc_dcache_clean(uintptr_t addr, uint32_t len) { aicos_dcache_clean_range((size_t *)addr, len); @@ -109,6 +123,7 @@ static int aic_udc_ep_buf_alloc(struct aic_ep_state *ep, uint32_t len, if (ep->xfer_align_len > USB_RAM_SIZE) { ep->xfer_align_buf = aicos_malloc_align(0, ep->xfer_align_len, CACHE_LINE_SIZE); + USB_LOG_DBG("aicos_malloc_align %d bytes.", ep->xfer_align_len); if (!ep->xfer_align_buf) { USB_LOG_ERR("alloc error.\r\n"); return -5; @@ -126,8 +141,10 @@ static void aic_udc_ep_buf_free(struct aic_ep_state *ep, uint8_t *sbuf) return; /* Whether the buf is allocated dynamically */ - if (ep->xfer_align_buf != sbuf) + if (ep->xfer_align_buf != sbuf) { + USB_LOG_DBG("aicos_free_align %d bytes.", ep->xfer_align_len); aicos_free_align(0, ep->xfer_align_buf); + } ep->xfer_align_buf = NULL; ep->xfer_align_len = 0; @@ -161,36 +178,44 @@ static void aic_udc_obuf_free(struct aic_ep_state *ep) static void aic_set_dma_nextep(void) { uint32_t i; + uint32_t inepcfg = 0; /* dma to set the next-endpoint pointer. */ for (i = 0; i < USB_NUM_BIDIR_ENDPOINTS; i++) { uint32_t next = ((i + 1) % USB_NUM_BIDIR_ENDPOINTS) << DEPCTL_NEXT_EP_BIT; - AIC_UDC_REG->inepcfg[i] &= ~DEPCTL_NEXT_EP_MASK; - AIC_UDC_REG->inepcfg[i] |= next; + inepcfg = readl(&AIC_UDC_REG->inepcfg[i]); + inepcfg &= ~DEPCTL_NEXT_EP_MASK; + inepcfg |= next; + writel(inepcfg, &AIC_UDC_REG->inepcfg[i]); } } static inline int aic_reset(void) { uint32_t count = 0U; + uint32_t tmpreg = 0; /* Wait for AHB master IDLE state. */ do { if (++count > 200000U) { return -1; } - } while ((AIC_UDC_REG->ahbbasic & AHBBASIC_AHBIDLE) == 0U); + tmpreg = readl(&AIC_UDC_REG->ahbbasic); + } while ((tmpreg & AHBBASIC_AHBIDLE) == 0U); /* Core Soft Reset */ count = 0U; - AIC_UDC_REG->usbdevinit |= USBDEVINIT_CSFTRST; + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + tmpreg |= USBDEVINIT_CSFTRST; + writel(tmpreg, &AIC_UDC_REG->usbdevinit); do { if (++count > 200000U) { return -1; } - } while ((AIC_UDC_REG->usbdevinit & USBDEVINIT_CSFTRST) == USBDEVINIT_CSFTRST); + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + } while ((tmpreg & USBDEVINIT_CSFTRST) == USBDEVINIT_CSFTRST); return 0; } @@ -213,12 +238,12 @@ static inline int aic_core_init(void) | 0 << 3 /* UTMI+ PHY 0:8bit, 1:16bit (ULPI PHY set 8bit) */ | 0x7 << 0; /* HS/FS timeout calibration**/ + /* Activate the USB Transceiver */ + writel(usb_gusbcfg, &AIC_UDC_REG->usbphyif); + /* Reset after a PHY select */ ret = aic_reset(); - /* Activate the USB Transceiver */ - AIC_UDC_REG->usbphyif = usb_gusbcfg; - aic_set_dma_nextep(); return ret; @@ -227,14 +252,18 @@ static inline int aic_core_init(void) static inline int aic_flush_rxfifo(void) { uint32_t count = 0; + uint32_t tmpreg = 0; - AIC_UDC_REG->usbdevinit |= USBDEVINIT_RXFFLSH; + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + tmpreg |= USBDEVINIT_RXFFLSH; + writel(tmpreg, &AIC_UDC_REG->usbdevinit); do { if (++count > 200000U) { return -1; } - } while ((AIC_UDC_REG->usbdevinit & USBDEVINIT_RXFFLSH) == USBDEVINIT_RXFFLSH); + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + } while ((tmpreg & USBDEVINIT_RXFFLSH) == USBDEVINIT_RXFFLSH); return 0; } @@ -242,14 +271,20 @@ static inline int aic_flush_rxfifo(void) static inline int aic_flush_txfifo(uint32_t num) { uint32_t count = 0U; + uint32_t tmpreg = 0; - AIC_UDC_REG->usbdevinit |= USBDEVINIT_TXFNUM(num & USBDEVINIT_TXFNUM_LIMIT); + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + tmpreg &= ~ USBDEVINIT_TXFNUM(USBDEVINIT_TXFNUM_LIMIT); + tmpreg |= USBDEVINIT_TXFNUM(num & USBDEVINIT_TXFNUM_LIMIT) + | USBDEVINIT_TXFFLSH; + writel(tmpreg, &AIC_UDC_REG->usbdevinit); do { if (++count > 200000U) { return -1; } - } while ((AIC_UDC_REG->usbdevinit & USBDEVINIT_TXFFLSH) == USBDEVINIT_TXFFLSH); + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + } while ((tmpreg & USBDEVINIT_TXFFLSH) == USBDEVINIT_TXFFLSH); return 0; } @@ -257,6 +292,7 @@ static inline int aic_flush_txfifo(uint32_t num) static void aic_set_turnaroundtime(uint32_t hclk, uint8_t speed) { uint32_t UsbTrd; + uint32_t tmpreg = 0; /* The USBTRD is configured according to the tables below, depending on AHB frequency used by application. In the low AHB frequency range it is used to stretch enough the USB response @@ -300,11 +336,12 @@ static void aic_set_turnaroundtime(uint32_t hclk, uint8_t speed) UsbTrd = USBPHYIF_DEFAULT_TRDT_VALUE; } - AIC_UDC_REG->usbphyif |= USBPHYIF_TOUTCAL_LIMIT; - - AIC_UDC_REG->usbphyif &= ~USBPHYIF_USBTRDTIM_MASK; - AIC_UDC_REG->usbphyif |= (uint32_t)((UsbTrd << USBPHYIF_USBTRDTIM_SHIFT) - & USBPHYIF_USBTRDTIM_MASK); + tmpreg = readl(&AIC_UDC_REG->usbphyif); + tmpreg |= USBPHYIF_TOUTCAL_LIMIT; + tmpreg &= ~USBPHYIF_USBTRDTIM_MASK; + tmpreg |= (uint32_t)((UsbTrd << USBPHYIF_USBTRDTIM_SHIFT) + & USBPHYIF_USBTRDTIM_MASK); + writel(tmpreg, &AIC_UDC_REG->usbphyif); } #if 0 @@ -342,8 +379,9 @@ static void aic_set_txfifo(uint8_t fifo, uint16_t size) static uint8_t aic_get_devspeed(void) { uint8_t speed; - uint32_t DevEnumSpeed = AIC_UDC_REG->usblinests & USB_ENUM_SPEED_MASK; + uint32_t DevEnumSpeed = readl(&AIC_UDC_REG->usblinests); + DevEnumSpeed &= USB_ENUM_SPEED_MASK; if (DevEnumSpeed == USB_HIGH_30_60MHZ) { speed = USB_ENUM_SPEED_HIGH; } else if (DevEnumSpeed == USB_FULL_30_60MHZ) { @@ -357,23 +395,28 @@ static uint8_t aic_get_devspeed(void) static void aic_ep0_start_read_setup(uint8_t *psetup) { + uint32_t outepcfg = 0; + g_aic_udc.out_ep[0].xfer_buf = psetup; g_aic_udc.out_ep[0].xfer_len = 8; - ep0_ctrl_stage = 1; + ep0_ctrl_stage = AIC_EP0_SETUP; + + USB_LOG_DBG("\r\n"); + USB_LOG_DBG("[1]: Control transfer start read setup."); aic_udc_dcache_invalidate((uintptr_t)psetup, CACHE_LINE_SIZE); - AIC_UDC_REG->outeptsfsiz[0] = 0U; - AIC_UDC_REG->outeptsfsiz[0] |= (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)); - AIC_UDC_REG->outeptsfsiz[0] |= (3U * 8U); - AIC_UDC_REG->outeptsfsiz[0] |= DXEPTSIZ_MULCNT_MASK; + writel((1<<29) | (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)) | (8U), &AIC_UDC_REG->outeptsfsiz[0]); #ifdef CONFIG_USB_AIC_DMA_ENABLE - AIC_UDC_REG->outepdmaaddr[0] = (uint32_t)(uintptr_t)psetup; + writel((uint32_t)(uintptr_t)psetup, &AIC_UDC_REG->outepdmaaddr[0]); #endif + writel(0xFFFFFFFFU, &AIC_UDC_REG->outepint[0]); /* EP enable */ - AIC_UDC_REG->outepcfg[0] |= DEPCTL_CNAK | DEPCTL_EPENA | DEPCTL_USBACTEP; + outepcfg = readl(&AIC_UDC_REG->outepcfg[0]); + outepcfg |= DEPCTL_CNAK | DEPCTL_EPENA | DEPCTL_USBACTEP; + writel(outepcfg, &AIC_UDC_REG->outepcfg[0]); } void aic_ep_write(uint8_t ep_idx, uint8_t *src, uint16_t len) @@ -435,11 +478,12 @@ static void aic_tx_fifo_empty_procecss(uint8_t ep_idx) static inline uint32_t aic_get_glb_intstatus(void) { uint32_t tmpreg; + uint32_t mask; - tmpreg = AIC_UDC_REG->usbintsts; - tmpreg &= AIC_UDC_REG->usbintmsk; + tmpreg = readl(&AIC_UDC_REG->usbintsts); + mask = readl(&AIC_UDC_REG->usbintmsk); - return tmpreg; + return tmpreg & mask; } /** @@ -449,11 +493,12 @@ static inline uint32_t aic_get_glb_intstatus(void) static inline uint32_t aic_get_outeps_intstatus(void) { uint32_t tmpreg; + uint32_t mask; - tmpreg = AIC_UDC_REG->usbepint; - tmpreg &= AIC_UDC_REG->usbepintmsk; + tmpreg = readl(&AIC_UDC_REG->usbepint); + mask = readl(&AIC_UDC_REG->usbepintmsk); - return ((tmpreg & 0xffff0000U) >> 16); + return (((tmpreg & mask) & 0xffff0000U) >> 16); } /** @@ -463,11 +508,12 @@ static inline uint32_t aic_get_outeps_intstatus(void) static inline uint32_t aic_get_ineps_intstatus(void) { uint32_t tmpreg; + uint32_t mask; - tmpreg = AIC_UDC_REG->usbepint; - tmpreg &= AIC_UDC_REG->usbepintmsk; + tmpreg = readl(&AIC_UDC_REG->usbepint); + mask = readl(&AIC_UDC_REG->usbepintmsk); - return ((tmpreg & 0xFFFFU)); + return ((tmpreg & mask) & 0xFFFFU); } /** @@ -479,11 +525,13 @@ static inline uint32_t aic_get_ineps_intstatus(void) static inline uint32_t aic_get_outep_intstatus(uint8_t epnum) { uint32_t tmpreg; + uint32_t mask; - tmpreg = AIC_UDC_REG->outepint[epnum]; - tmpreg &= AIC_UDC_REG->outepintmsk; + tmpreg = readl(&AIC_UDC_REG->outepint[epnum]); + USB_LOG_DBG("[int]: Out ep%d outepint = 0x%x [%d].", epnum, tmpreg, ep0_ctrl_stage); + mask = readl(&AIC_UDC_REG->outepintmsk); - return tmpreg; + return tmpreg & mask; } /** @@ -495,11 +543,13 @@ static inline uint32_t aic_get_outep_intstatus(uint8_t epnum) static inline uint32_t aic_get_inep_intstatus(uint8_t epnum) { uint32_t tmpreg; + uint32_t mask; - tmpreg = AIC_UDC_REG->inepint[epnum]; - tmpreg &= AIC_UDC_REG->inepintmsk; + tmpreg = readl(&AIC_UDC_REG->inepint[epnum]); + USB_LOG_DBG("[int]: In ep%d inepint = 0x%x [%d].", epnum, tmpreg, ep0_ctrl_stage); + mask = readl(&AIC_UDC_REG->inepintmsk); - return tmpreg; + return tmpreg & mask; } __WEAK void usb_dc_low_level_init(void) @@ -512,29 +562,40 @@ __WEAK void usb_dc_low_level_deinit(void) int usb_dc_rst(void) { + uint32_t outepintmsk = 0; + uint32_t inepintmsk = 0; + + USB_LOG_DBG("usb_dc_rst.\n"); + + usbd_set_address(0); + + aic_flush_txfifo(0x10U); + aic_flush_rxfifo(); + for (uint8_t i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) { if (i == 0U) { - AIC_UDC_REG->inepcfg[i] = DEPCTL_SNAK; - AIC_UDC_REG->outepcfg[i] = DEPCTL_SNAK; + writel(DEPCTL_SNAK, &AIC_UDC_REG->inepcfg[i]); + writel(DEPCTL_SNAK, &AIC_UDC_REG->outepcfg[i]); } else { usbd_ep_close(i); usbd_ep_close(i | 0x80); } - AIC_UDC_REG->ineptsfsiz[i] = 0U; - AIC_UDC_REG->inepint[i] = 0xFBFFU; - AIC_UDC_REG->outeptsfsiz[i] = 0U; - AIC_UDC_REG->outepint[i] = 0xFBFFU; + + writel(0U, &AIC_UDC_REG->ineptsfsiz[i]); + writel(0xFFFFFFFFU, &AIC_UDC_REG->inepint[i]); + writel(0U, &AIC_UDC_REG->outeptsfsiz[i]); + writel(0xFFFFFFFFU, &AIC_UDC_REG->outepint[i]); } - AIC_UDC_REG->usbepintmsk |= 0x10001U; - AIC_UDC_REG->outepintmsk = CTRL_OUT_EP_SETUP_PHASE_DONE | TRANSFER_DONE; - AIC_UDC_REG->inepintmsk = TRANSFER_DONE; + writel(0, &AIC_UDC_REG->usbepintmsk); + outepintmsk = TRANSFER_DONE | CTRL_OUT_EP_SETUP_PHASE_DONE | CTRL_OUT_EP_STATUS_PHASE_RCVD; + inepintmsk = TRANSFER_DONE | NON_ISO_IN_EP_TIMEOUT | INTKNEPMIS; #ifndef CONFIG_USB_AIC_DMA_ENABLE - AIC_UDC_REG->inepintmsk |= INTKN_TXFEMP; + outepintmsk |= CTRL_OUT_EP_SETUP_PHASE_DONE; + inepintmsk |= INTKN_TXFEMP; #endif - - aic_flush_txfifo(0x10U); - aic_flush_rxfifo(); + writel(outepintmsk, &AIC_UDC_REG->outepintmsk); + writel(inepintmsk, &AIC_UDC_REG->inepintmsk); aic_set_dma_nextep(); @@ -557,96 +618,117 @@ int usb_dc_init(uint8_t busid) { int ret; uint32_t base = 0; + uint32_t tmpreg = 0; memset(&g_aic_udc, 0, sizeof(struct aic_udc)); usb_dc_low_level_init(); /* Disconnect */ - AIC_UDC_REG->usbdevfunc |= USBDEVFUNC_SFTDISCON; + tmpreg = readl(&AIC_UDC_REG->usbdevfunc); + tmpreg |= USBDEVFUNC_SFTDISCON; + writel(tmpreg, &AIC_UDC_REG->usbdevfunc); /* Disable Interrupt */ - AIC_UDC_REG->usbdevinit &= ~USBDEVINIT_GLBL_INTR_EN; + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + tmpreg &= ~USBDEVINIT_GLBL_INTR_EN; + writel(tmpreg, &AIC_UDC_REG->usbdevinit); ret = aic_core_init(); for (uint8_t i = 0U; i < 2U; i++) { - AIC_UDC_REG->txfifosiz[i] = 0U; + writel(0, &AIC_UDC_REG->txfifosiz[i]); } /* Device mode configuration */ - AIC_UDC_REG->usbdevconf |= PERIOD_FRAME_INTERVAL_80; + tmpreg = readl(&AIC_UDC_REG->usbdevconf); + tmpreg |= PERIOD_FRAME_INTERVAL_80; #if defined(CONFIG_USB_HS) /* Set Core speed to High speed mode */ - AIC_UDC_REG->usbdevconf |= DEV_SPEED_HIGH_SPEED_20; + tmpreg |= DEV_SPEED_HIGH_SPEED_20; #else - - AIC_UDC_REG->usbdevconf |= DEV_SPEED_FULL_SPEED_20; + tmpreg |= DEV_SPEED_FULL_SPEED_20; #endif + writel(tmpreg, &AIC_UDC_REG->usbdevconf); ret = aic_flush_txfifo(0x10U); ret = aic_flush_rxfifo(); /* Clear all pending Device Interrupts */ - AIC_UDC_REG->inepintmsk = 0U; - AIC_UDC_REG->outepintmsk = 0U; - AIC_UDC_REG->usbepintmsk = 0U; + writel(0, &AIC_UDC_REG->inepintmsk); + writel(0, &AIC_UDC_REG->outepintmsk); + writel(0, &AIC_UDC_REG->usbepintmsk); /* Disable all interrupts. */ - AIC_UDC_REG->usbintmsk = 0U; + writel(0, &AIC_UDC_REG->usbintmsk); /* Clear any pending interrupts */ - AIC_UDC_REG->usbintsts = 0xBFFFFFFFU; + writel(0xBFFFFFFFU, &AIC_UDC_REG->usbintsts); /* Enable interrupts matching to the Device mode ONLY */ - AIC_UDC_REG->usbintmsk = INT_RESET | INT_ENUMDONE | - INT_OUT_EP | INT_IN_EP | - INT_INCOMP_ISO_IN_INT | INT_INCOMP_ISO_OUT_INT; + tmpreg = INT_RESET | INT_ENUMDONE | + INT_OUT_EP | INT_IN_EP | + INT_INCOMP_ISO_IN_INT | INT_INCOMP_ISO_OUT_INT | INT_SUSPEND; + writel(tmpreg, &AIC_UDC_REG->usbintmsk); #ifdef CONFIG_USB_AIC_DMA_ENABLE - AIC_UDC_REG->usbdevinit |= (USBDEVINIT_HBSTLEN_INCR4 << USBDEVINIT_HBSTLEN_SHIFT); - AIC_UDC_REG->usbdevinit |= USBDEVINIT_DMA_EN; + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + tmpreg |= (USBDEVINIT_HBSTLEN_INCR4 << USBDEVINIT_HBSTLEN_SHIFT); + tmpreg |= USBDEVINIT_DMA_EN; + writel(tmpreg, &AIC_UDC_REG->usbdevinit); #else - AIC_UDC_REG->usbintmsk |= INT_RX_FIFO_NOT_EMPTY; + tmpreg = readl(&AIC_UDC_REG->usbintmsk); + tmpreg |= INT_RX_FIFO_NOT_EMPTY; + writel(tmpreg, &AIC_UDC_REG->usbintmsk); #endif /* Assign FIFO */ base = 0; - AIC_UDC_REG->rxfifosiz = AIC_RX_FIFO_SIZE; + writel(AIC_RX_FIFO_SIZE, &AIC_UDC_REG->rxfifosiz); base += AIC_RX_FIFO_SIZE; - AIC_UDC_REG->nptxfifosiz = (AIC_NP_TX_FIFO_SIZE << 16) | base; + writel((AIC_NP_TX_FIFO_SIZE << 16) | base, &AIC_UDC_REG->nptxfifosiz); base += AIC_NP_TX_FIFO_SIZE; - AIC_UDC_REG->txfifosiz[0] = (AIC_PERIOD_TX_FIFO1_SIZE << 16) | base; + writel((AIC_PERIOD_TX_FIFO1_SIZE << 16) | base, &AIC_UDC_REG->txfifosiz[0]); base += AIC_PERIOD_TX_FIFO1_SIZE; - AIC_UDC_REG->txfifosiz[1] = (AIC_PERIOD_TX_FIFO2_SIZE << 16) | base; + writel((AIC_PERIOD_TX_FIFO2_SIZE << 16) | base, &AIC_UDC_REG->txfifosiz[1]); usb_dc_rst(); /* Enable Interrupt */ - AIC_UDC_REG->usbdevinit |= USBDEVINIT_GLBL_INTR_EN; + tmpreg = readl(&AIC_UDC_REG->usbdevinit); + tmpreg |= USBDEVINIT_GLBL_INTR_EN; + writel(tmpreg, &AIC_UDC_REG->usbdevinit); /* Connect */ - AIC_UDC_REG->usbdevfunc &= ~USBDEVFUNC_SFTDISCON; + tmpreg = readl(&AIC_UDC_REG->usbdevfunc); + tmpreg &= ~USBDEVFUNC_SFTDISCON; + writel(tmpreg, &AIC_UDC_REG->usbdevfunc); return ret; } int usb_dc_deinit(uint8_t busid) { + uint32_t tmpreg = 0; + + usbd_event_suspend_handler(); + /* Clear Pending interrupt */ for (uint8_t i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) { - AIC_UDC_REG->outepint[i] = 0xFB7FU; - AIC_UDC_REG->inepint[i] = 0xFB7FU; + writel(0xFB7FU, &AIC_UDC_REG->outepint[i]); + writel(0xFB7FU, &AIC_UDC_REG->inepint[i]); } /* Clear interrupt masks */ - AIC_UDC_REG->inepintmsk = 0U; - AIC_UDC_REG->outepintmsk = 0U; - AIC_UDC_REG->usbepintmsk = 0U; + writel(0, &AIC_UDC_REG->inepintmsk); + writel(0, &AIC_UDC_REG->outepintmsk); + writel(0, &AIC_UDC_REG->usbepintmsk); /* Flush the FIFO */ aic_flush_txfifo(0x10U); aic_flush_rxfifo(); - AIC_UDC_REG->usbdevfunc |= USBDEVFUNC_SFTDISCON; + tmpreg = readl(&AIC_UDC_REG->usbdevfunc); + tmpreg |= USBDEVFUNC_SFTDISCON; + writel(tmpreg, &AIC_UDC_REG->usbdevfunc); usb_dc_low_level_deinit(); return 0; @@ -654,22 +736,22 @@ int usb_dc_deinit(uint8_t busid) int usbd_set_address(uint8_t busid, const uint8_t addr) { - AIC_UDC_REG->usbdevconf &= ~(DEVICE_ADDRESS_MASK); - AIC_UDC_REG->usbdevconf |= ((uint32_t)addr << 4) & DEVICE_ADDRESS_MASK; + uint32_t tmpreg = 0; - rst_allow = 1; - return 0; -} + tmpreg = readl(&AIC_UDC_REG->usbdevconf); + tmpreg &= ~(DEVICE_ADDRESS_MASK); + tmpreg |= ((uint32_t)addr << 4) & DEVICE_ADDRESS_MASK; + writel(tmpreg, &AIC_UDC_REG->usbdevconf); -int usbd_set_remote_wakeup(uint8_t busid) -{ - return -1; + return 0; } -uint8_t usbd_get_port_speed(uint8_t busid) +uint8_t usbd_get_port_speed(uint8_t busid, const uint8_t port) { uint8_t speed; - uint32_t DevEnumSpeed = AIC_UDC_REG->usblinests & USB_ENUM_SPEED_MASK; + uint32_t DevEnumSpeed = readl(&AIC_UDC_REG->usblinests); + + DevEnumSpeed &= USB_ENUM_SPEED_MASK; if (DevEnumSpeed == USB_HIGH_30_60MHZ) { speed = USB_SPEED_HIGH; @@ -688,53 +770,60 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) uint16_t ep_mps; uint8_t tx_fifo_num = 0; uint32_t i; + uint32_t usbepintmsk = 0; + uint32_t epcfg = 0; if (ep_idx > (USB_NUM_BIDIR_ENDPOINTS - 1)) { USB_LOG_ERR("Ep addr %d overflow\r\n", ep->bEndpointAddress); return -1; } + ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + if (ep_idx == 0) { + switch (ep_mps) { + case 8: + ep_mps = DEPCTL0_MPS_8; + break; + case 16: + ep_mps = DEPCTL0_MPS_16; + break; + case 32: + ep_mps = DEPCTL0_MPS_32; + break; + case 64: + ep_mps = DEPCTL0_MPS_64; + break; + } + } + + usbepintmsk = readl(&AIC_UDC_REG->usbepintmsk); if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { g_aic_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); g_aic_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - AIC_UDC_REG->usbepintmsk |= DAINT_OUT_MASK & (uint32_t)(1UL << (16 + ep_idx)); - - ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - if (ep_idx == 0) { - switch (ep_mps) { - case 8: - ep_mps = DEPCTL0_MPS_8; - break; - case 16: - ep_mps = DEPCTL0_MPS_16; - break; - case 32: - ep_mps = DEPCTL0_MPS_32; - break; - case 64: - ep_mps = DEPCTL0_MPS_64; - break; - } - } - - AIC_UDC_REG->outepcfg[ep_idx] |= (ep_mps & DEPCTL_MPS_MASK) | - ((uint32_t)USB_GET_ENDPOINT_TYPE(ep->bmAttributes) << 18) | - DEPCTL_SETD0PID | - DEPCTL_USBACTEP; + usbepintmsk |= DAINT_OUT_MASK & (uint32_t)(1UL << (16 + ep_idx)); + writel(usbepintmsk, &AIC_UDC_REG->usbepintmsk); + epcfg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + epcfg |= (ep_mps & DEPCTL_MPS_MASK) | + ((uint32_t)USB_GET_ENDPOINT_TYPE(ep->bmAttributes) << 18) | + DEPCTL_SETD0PID | + DEPCTL_USBACTEP; + writel(epcfg, &AIC_UDC_REG->outepcfg[ep_idx]); } else { + g_aic_udc.in_ep_desc[ep_idx] = *ep; g_aic_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); g_aic_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - AIC_UDC_REG->usbepintmsk |= DAINT_IN_MASK & (uint32_t)(1UL << ep_idx); + usbepintmsk |= DAINT_IN_MASK & (uint32_t)(1UL << ep_idx); + writel(usbepintmsk, &AIC_UDC_REG->usbepintmsk); /* Period IN EP alloc fifo num */ - if (( USB_GET_ENDPOINT_TYPE(ep->bmAttributes) == USB_ENDPOINT_TYPE_INTERRUPT) || - ( USB_GET_ENDPOINT_TYPE(ep->bmAttributes) == USB_ENDPOINT_TYPE_ISOCHRONOUS)) { - for (i=1; i<=2; i++) { - if (g_aic_udc.tx_fifo_map & (1<bmAttributes) == USB_ENDPOINT_TYPE_INTERRUPT) || + (USB_GET_ENDPOINT_TYPE(ep->bmAttributes) == USB_ENDPOINT_TYPE_ISOCHRONOUS)) { + for (i = 1; i <= USB_P_TXFIFO_NUM; i++) { + if (g_aic_udc.p_txfifo_map & (1 << i)) continue; - g_aic_udc.tx_fifo_map |= (1 << i); + g_aic_udc.p_txfifo_map |= (1 << i); tx_fifo_num = i; break; } @@ -743,13 +832,17 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) return -1; aic_flush_txfifo(tx_fifo_num); + } else { + g_aic_udc.np_txfifo_map |= (1 << ep_idx); } - AIC_UDC_REG->inepcfg[ep_idx] |= (USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize) & DEPCTL_MPS_MASK) | - ((uint32_t)USB_GET_ENDPOINT_TYPE(ep->bmAttributes) << 18) | - (tx_fifo_num << 22) | - DEPCTL_SETD0PID | - DEPCTL_USBACTEP; + epcfg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + epcfg |= (ep_mps & DEPCTL_MPS_MASK) | + ((uint32_t)USB_GET_ENDPOINT_TYPE(ep->bmAttributes) << 18) | + (tx_fifo_num << 22) | + DEPCTL_SETD0PID | + DEPCTL_USBACTEP; + writel(epcfg, &AIC_UDC_REG->inepcfg[ep_idx]); } return 0; } @@ -759,16 +852,30 @@ int usbd_ep_close(uint8_t busid, const uint8_t ep) uint8_t ep_idx = USB_EP_GET_IDX(ep); uint8_t tx_fifo_num = 0; int i = 0; + uint32_t outepcfg = 0; + uint32_t outepint = 0; + uint32_t inepcfg = 0; + uint32_t inepint = 0; + uint32_t usbintsts = 0; + uint32_t usbdevfunc = 0; + uint32_t usbepintmsk = 0; + #define DIS_EP_TIMOUT 100 if (USB_EP_DIR_IS_OUT(ep)) { - if (AIC_UDC_REG->outepcfg[ep_idx] & DEPCTL_EPENA) { + outepcfg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + if (outepcfg & DEPCTL_EPENA) { /* (1) Wait for global nak to take effect */ - if (!(AIC_UDC_REG->usbintsts & INT_GOUTNAKEFF)) - AIC_UDC_REG->usbdevfunc |= USBDEVFUNC_SGOUTNAK; + usbintsts = readl(&AIC_UDC_REG->usbintsts); + if (!(usbintsts & INT_GOUTNAKEFF)) { + usbdevfunc = readl(&AIC_UDC_REG->usbdevfunc); + usbdevfunc |= USBDEVFUNC_SGOUTNAK; + writel(usbdevfunc, &AIC_UDC_REG->usbdevfunc); + } for (i = 0; i < DIS_EP_TIMOUT; i++) { - if (AIC_UDC_REG->usbintsts & INT_GOUTNAKEFF) + usbintsts = readl(&AIC_UDC_REG->usbintsts); + if (usbintsts & INT_GOUTNAKEFF) break; aic_udelay(1); } @@ -777,11 +884,14 @@ int usbd_ep_close(uint8_t busid, const uint8_t ep) USB_LOG_ERR("%s: timeout USBINTSTS.GOUTNAKEFF\n", __func__); /* (2) Disable ep */ - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_SNAK; - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_EPDIS; - - for (i = 0; i < DIS_EP_TIMOUT; i++) { - if (AIC_UDC_REG->outepint[ep_idx] & EPDISBLD) + outepcfg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + outepcfg |= DEPCTL_SNAK; + outepcfg |= DEPCTL_EPDIS; + writel(outepcfg, &AIC_UDC_REG->outepcfg[ep_idx]); + + for (i = 0; i < DIS_EP_TIMOUT*10; i++) { + outepint = readl(&AIC_UDC_REG->outepint[ep_idx]); + if (outepint & EPDISBLD) break; aic_udelay(1); } @@ -790,24 +900,34 @@ int usbd_ep_close(uint8_t busid, const uint8_t ep) USB_LOG_ERR("%s: timeout OUTEPCFG.EPDisable\n", __func__); /* Clear EPDISBLD interrupt */ - AIC_UDC_REG->outepint[ep_idx] |= EPDISBLD; + outepint = readl(&AIC_UDC_REG->outepint[ep_idx]); + outepint |= EPDISBLD; + writel(outepint, &AIC_UDC_REG->outepint[ep_idx]); /* (3) Remove global NAKs */ - AIC_UDC_REG->usbdevfunc |= USBDEVFUNC_CGOUTNAK; + usbdevfunc = readl(&AIC_UDC_REG->usbdevfunc); + usbdevfunc |= USBDEVFUNC_CGOUTNAK; + writel(usbdevfunc, &AIC_UDC_REG->usbdevfunc); } - AIC_UDC_REG->usbepintmsk &= ~(DAINT_OUT_MASK & (uint32_t)(1UL << (16 + ep_idx))); - AIC_UDC_REG->outepcfg[ep_idx] = 0; + usbepintmsk = readl(&AIC_UDC_REG->usbepintmsk); + usbepintmsk &= ~(DAINT_OUT_MASK & (uint32_t)(1UL << (16 + ep_idx))); + writel(usbepintmsk, &AIC_UDC_REG->usbepintmsk); + writel(0, &AIC_UDC_REG->outepcfg[ep_idx]); } else { - tx_fifo_num = (AIC_UDC_REG->inepcfg[ep_idx] & DEPCTL_TXFIFONUM_MASK) >> DEPCTL_TXFIFONUM_SHIFT; + inepcfg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + tx_fifo_num = (inepcfg & DEPCTL_TXFIFONUM_MASK) >> DEPCTL_TXFIFONUM_SHIFT; - if (AIC_UDC_REG->inepcfg[ep_idx] & DEPCTL_EPENA) { + inepcfg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + if (inepcfg & DEPCTL_EPENA) { if (tx_fifo_num) { /* (1) Wait for Nak effect */ - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_SNAK; + inepcfg |= DEPCTL_SNAK; + writel(inepcfg, &AIC_UDC_REG->inepcfg[ep_idx]); for (i = 0; i < DIS_EP_TIMOUT; i++) { - if (AIC_UDC_REG->inepint[ep_idx] & INEP_NAKEFF) + inepint = readl(&AIC_UDC_REG->inepint[ep_idx]); + if (inepint & INEP_NAKEFF) break; aic_udelay(1); } @@ -816,10 +936,13 @@ int usbd_ep_close(uint8_t busid, const uint8_t ep) USB_LOG_ERR("%s: timeout INEPINT.NAKEFF\n", __func__); } else { /* (1) Wait for Nak effect */ - AIC_UDC_REG->usbdevfunc |= USBDEVFUNC_SGNPINNAK; + usbdevfunc = readl(&AIC_UDC_REG->usbdevfunc); + usbdevfunc |= USBDEVFUNC_SGNPINNAK; + writel(usbdevfunc, &AIC_UDC_REG->usbdevfunc); for (i = 0; i < DIS_EP_TIMOUT; i++) { - if (AIC_UDC_REG->usbintsts & INT_GINNAKEFF) + usbintsts = readl(&AIC_UDC_REG->usbintsts); + if (usbintsts & INT_GINNAKEFF) break; aic_udelay(1); } @@ -829,11 +952,14 @@ int usbd_ep_close(uint8_t busid, const uint8_t ep) } /* (2) Disable ep */ - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_SNAK; - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_EPDIS; + inepcfg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + inepcfg |= DEPCTL_SNAK; + inepcfg |= DEPCTL_EPDIS; + writel(inepcfg, &AIC_UDC_REG->inepcfg[ep_idx]); for (i = 0; i < DIS_EP_TIMOUT; i++) { - if (AIC_UDC_REG->inepint[ep_idx] & EPDISBLD) + inepint = readl(&AIC_UDC_REG->inepint[ep_idx]); + if (inepint & EPDISBLD) break; aic_udelay(1); } @@ -842,22 +968,31 @@ int usbd_ep_close(uint8_t busid, const uint8_t ep) USB_LOG_ERR("%s: timeout OUTEPCFG.EPDisable\n", __func__); /* Clear EPDISBLD interrupt */ - AIC_UDC_REG->inepint[ep_idx] |= EPDISBLD; - - /* (3) Clear Global In NP NAK in Shared FIFO for non periodic ep */ - if (!tx_fifo_num) - AIC_UDC_REG->usbdevfunc |= USBDEVFUNC_CGNPINNAK; - } + inepint = readl(&AIC_UDC_REG->inepint[ep_idx]); + inepint |= EPDISBLD; + writel(inepint, &AIC_UDC_REG->inepint[ep_idx]); - AIC_UDC_REG->usbepintmsk &= ~(DAINT_OUT_MASK & (uint32_t)(1UL << ep_idx)); - AIC_UDC_REG->inepcfg[ep_idx] = 0; + /* (3) Flush TX FIFO */ + aic_flush_txfifo(tx_fifo_num); - /* Flush TX FIFO */ - aic_flush_txfifo(tx_fifo_num); + /* Period IN EP free fifo num */ + if (tx_fifo_num > 0) + g_aic_udc.p_txfifo_map &= ~(1 << tx_fifo_num); + else + g_aic_udc.np_txfifo_map &= ~(1 << ep_idx); + + /* (4) Clear Global In NP NAK in Shared FIFO for non periodic ep */ + if (!tx_fifo_num) { + usbdevfunc = readl(&AIC_UDC_REG->usbdevfunc); + usbdevfunc |= USBDEVFUNC_CGNPINNAK; + writel(usbdevfunc, &AIC_UDC_REG->usbdevfunc); + } + } - /* Period IN EP free fifo num */ - if (tx_fifo_num > 0) - g_aic_udc.tx_fifo_map &= ~(1<usbepintmsk); + usbepintmsk &= ~(DAINT_OUT_MASK & (uint32_t)(1UL << ep_idx)); + writel(usbepintmsk, &AIC_UDC_REG->usbepintmsk); + writel(0, &AIC_UDC_REG->inepcfg[ep_idx]); } #ifdef CONFIG_USB_AIC_DMA_ENABLE @@ -871,20 +1006,143 @@ int usbd_ep_close(uint8_t busid, const uint8_t ep) return 0; } +int usbd_npinep_rewrite(const uint8_t ep) +{ + int i = 0; + int j = 0; + int fail = 0; + unsigned int pending_map = 0; + //int data_len = 0; + uint32_t tmpreg = 0; + + for (i = 0U, j = 0; i < USB_NUM_BIDIR_ENDPOINTS; i++) { + tmpreg = readl(&AIC_UDC_REG->inepcfg[i]); + if (!((g_aic_udc.np_txfifo_map & (1 << i)) && + (tmpreg & DEPCTL_EPENA))) + continue; + + j++; + + pending_map |= (1 << i); + } + if (j <= 1) + return 0; + + /* (1) close all no-periodic ep */ + /* (1.1) Set Global In NP NAK in Shared FIFO for non periodic ep */ + tmpreg = readl(&AIC_UDC_REG->usbdevfunc); + tmpreg |= USBDEVFUNC_SGNPINNAK; + writel(tmpreg, &AIC_UDC_REG->usbdevfunc); + + for (i = 0; i < DIS_EP_TIMOUT; i++) { + tmpreg = readl(&AIC_UDC_REG->usbintsts); + if (tmpreg & INT_GINNAKEFF) + break; + aic_udelay(1); + } + + if (i == DIS_EP_TIMOUT) + USB_LOG_ERR("%s: timeout USBINTSTS.GOUTNAKEFF\n", __func__); + + /* (1.2) Disable ep */ + for (i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) { + tmpreg = readl(&AIC_UDC_REG->inepcfg[i]); + if (!((g_aic_udc.np_txfifo_map & (1 << i)) && + (tmpreg & DEPCTL_EPENA))) + continue; + + tmpreg |= DEPCTL_SNAK; + tmpreg |= DEPCTL_EPDIS; + writel(tmpreg, &AIC_UDC_REG->inepcfg[i]); + + /* remain data */ + #if 0 + tmpreg = readl(&AIC_UDC_REG->ineptsfsiz[i]); + data_len = tmpreg & DXEPTSIZ_XFER_SIZE_MASK; + g_aic_udc.in_ep[ep].xfer_buf += g_aic_udc.in_ep[ep].xfer_len - data_len; + g_aic_udc.in_ep[ep].xfer_len = data_len; + #endif + + //pending_map |= (1 << i); + } + + for (j = 0; j < DIS_EP_TIMOUT; j++) { + fail = 0; + for (i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) { + if (!(pending_map & (1 << i))) + continue; + tmpreg = readl(&AIC_UDC_REG->inepint[i]); + if (!(tmpreg & EPDISBLD)) { + fail = i+1; + break; + } + } + if (!fail) + break; + aic_udelay(1); + } + + if (j == DIS_EP_TIMOUT) + USB_LOG_ERR("%s: ep%d timeout OUTEPCFG.EPDisable\n", __func__, fail-1); + + /* Clear EPDISBLD interrupt */ + for (i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) { + if (!(pending_map & (1 << i))) + continue; + tmpreg = readl(&AIC_UDC_REG->inepint[i]); + tmpreg |= EPDISBLD; + writel(tmpreg, &AIC_UDC_REG->inepint[i]); + } + + /* (1.3) Flush TX FIFO0 */ + aic_flush_txfifo(0); + + /* (1.4) Clear Global In NP NAK in Shared FIFO for non periodic ep */ + tmpreg = readl(&AIC_UDC_REG->usbdevfunc); + tmpreg |= USBDEVFUNC_CGNPINNAK; + writel(tmpreg, &AIC_UDC_REG->usbdevfunc); + + /* (2) reopen current ep */ + usbd_ep_open(&g_aic_udc.in_ep_desc[ep]); + + /* (3) rewrite current ep */ + if (pending_map & (1 << ep)) { + usbd_ep_start_write(ep, g_aic_udc.in_ep[ep].xfer_buf, + g_aic_udc.in_ep[ep].xfer_len); + } + + /* (4) reopen & rewrite other ep, let's receive ep mismtach interrupt */ + for (i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) { + if (!(pending_map & (1 << i)) || + (i == ep)) + continue; + usbd_ep_open(&g_aic_udc.in_ep_desc[i]); + usbd_ep_start_write(i, g_aic_udc.in_ep[i].xfer_buf, + g_aic_udc.in_ep[i].xfer_len); + } + + return 0; +} + int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) { uint8_t ep_idx = USB_EP_GET_IDX(ep); + uint32_t tmpreg = 0; if (USB_EP_DIR_IS_OUT(ep)) { - if (((AIC_UDC_REG->outepcfg[ep_idx] & DEPCTL_EPENA) == 0U) && (ep_idx != 0U)) { - AIC_UDC_REG->outepcfg[ep_idx] &= ~(DEPCTL_EPDIS); + tmpreg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + if (((tmpreg & DEPCTL_EPENA) == 0U) && (ep_idx != 0U)) { + tmpreg &= ~(DEPCTL_EPDIS); } - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_STALL; + tmpreg |= DEPCTL_STALL; + writel(tmpreg, &AIC_UDC_REG->outepcfg[ep_idx]); } else { - if (((AIC_UDC_REG->inepcfg[ep_idx] & DEPCTL_EPENA) == 0U) && (ep_idx != 0U)) { - AIC_UDC_REG->inepcfg[ep_idx] &= ~(DEPCTL_EPDIS); + tmpreg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + if (((tmpreg & DEPCTL_EPENA) == 0U) && (ep_idx != 0U)) { + tmpreg &= ~(DEPCTL_EPDIS); } - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_STALL; + tmpreg |= DEPCTL_STALL; + writel(tmpreg, &AIC_UDC_REG->inepcfg[ep_idx]); } #ifdef CONFIG_USB_AIC_DMA_ENABLE @@ -898,19 +1156,24 @@ int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep) { uint8_t ep_idx = USB_EP_GET_IDX(ep); + uint32_t tmpreg = 0; if (USB_EP_DIR_IS_OUT(ep)) { - AIC_UDC_REG->outepcfg[ep_idx] &= ~DEPCTL_STALL; + tmpreg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + tmpreg &= ~DEPCTL_STALL; if ((g_aic_udc.out_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_INTERRUPT) || (g_aic_udc.out_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_BULK)) { - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_SETD0PID; /* DATA0 */ + tmpreg |= DEPCTL_SETD0PID; /* DATA0 */ } + writel(tmpreg, &AIC_UDC_REG->outepcfg[ep_idx]); } else { - AIC_UDC_REG->inepcfg[ep_idx] &= ~DEPCTL_STALL; + tmpreg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + tmpreg &= ~DEPCTL_STALL; if ((g_aic_udc.in_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_INTERRUPT) || (g_aic_udc.in_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_BULK)) { - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_SETD0PID; /* DATA0 */ + tmpreg |= DEPCTL_SETD0PID; /* DATA0 */ } + writel(tmpreg, &AIC_UDC_REG->inepcfg[ep_idx]); } return 0; @@ -924,18 +1187,22 @@ int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) return 0; } -int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) +int usbd_ep_start_write_raw(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint8_t cache_align) { uint8_t ep_idx = USB_EP_GET_IDX(ep); uint32_t pktcnt = 0; + uint32_t inepcfg = 0; + uint32_t ineptsfsiz = 0; + uint32_t usblinests = 0; if (!data && data_len) { return -1; } - if (AIC_UDC_REG->inepcfg[ep_idx] & DEPCTL_EPENA) { + inepcfg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + if (inepcfg & DEPCTL_EPENA) { return -2; } - if (ep_idx && !(AIC_UDC_REG->inepcfg[ep_idx] & DEPCTL_MPS_MASK)) { + if (ep_idx && !(inepcfg & DEPCTL_MPS_MASK)) { return -3; } if ((uint32_t)(uintptr_t)data & 0x03) { @@ -947,7 +1214,7 @@ int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, ui g_aic_udc.in_ep[ep_idx].actual_xfer_len = 0; #ifdef CONFIG_USB_AIC_DMA_ENABLE - if ((ep_idx != 0) && (data_len > 0) && + if (cache_align && (ep_idx != 0) && (data_len > 0) && ((((uint32_t)(uintptr_t)data % CACHE_LINE_SIZE) != 0) || (((uint32_t)(uintptr_t)(data + data_len) % CACHE_LINE_SIZE) != 0))) { @@ -969,13 +1236,15 @@ int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, ui aic_udc_dcache_clean((uintptr_t)data, ALIGN_UP(data_len, CACHE_LINE_SIZE)); #endif - AIC_UDC_REG->ineptsfsiz[ep_idx] &= ~(DXEPTSIZ_PKT_CNT_MASK); - AIC_UDC_REG->ineptsfsiz[ep_idx] &= ~(DXEPTSIZ_XFER_SIZE_MASK); - AIC_UDC_REG->ineptsfsiz[ep_idx] &= ~(DXEPTSIZ_MULCNT_MASK); + ineptsfsiz = readl(&AIC_UDC_REG->ineptsfsiz[ep_idx]); + ineptsfsiz &= ~(DXEPTSIZ_PKT_CNT_MASK); + ineptsfsiz &= ~(DXEPTSIZ_XFER_SIZE_MASK); if (data_len == 0) { - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)); - AIC_UDC_REG->inepcfg[ep_idx] |= (DEPCTL_CNAK | DEPCTL_EPENA); + ineptsfsiz |= (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)); + writel(ineptsfsiz, &AIC_UDC_REG->ineptsfsiz[ep_idx]); + inepcfg |= (DEPCTL_CNAK | DEPCTL_EPENA); + writel(inepcfg, &AIC_UDC_REG->inepcfg[ep_idx]); return 0; } @@ -984,56 +1253,77 @@ int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, ui data_len = g_aic_udc.in_ep[ep_idx].ep_mps; } g_aic_udc.in_ep[ep_idx].xfer_len = data_len; - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)); - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (DXEPTSIZ_XFER_SIZE_MASK & data_len); + ineptsfsiz |= (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)); + ineptsfsiz |= (DXEPTSIZ_XFER_SIZE_MASK & data_len); } else { pktcnt = (uint16_t)((data_len + g_aic_udc.in_ep[ep_idx].ep_mps - 1U) / g_aic_udc.in_ep[ep_idx].ep_mps); - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (DXEPTSIZ_PKT_CNT_MASK & (pktcnt << 19)); - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (DXEPTSIZ_XFER_SIZE_MASK & data_len); - } - - if ((g_aic_udc.in_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_ISOCHRONOUS) || - (g_aic_udc.in_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_INTERRUPT)) { - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (1<usblinests & (1U << 8)) == 0U) { - AIC_UDC_REG->inepcfg[ep_idx] &= ~DEPCTL_SETD0PID; - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_SETD1PID; + usblinests = readl(&AIC_UDC_REG->usblinests); + if ((usblinests & (1U << 8)) == 0U) { + inepcfg &= ~DEPCTL_SETD0PID; + inepcfg |= DEPCTL_SETD1PID; } else { - AIC_UDC_REG->inepcfg[ep_idx] &= ~DEPCTL_SETD1PID; - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_SETD0PID; + inepcfg &= ~DEPCTL_SETD1PID; + inepcfg |= DEPCTL_SETD0PID; } - AIC_UDC_REG->ineptsfsiz[ep_idx] &= ~(DXEPTSIZ_MULCNT_MASK); - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (1U << DXEPTSIZ_MULCNT_SHIFT); + ineptsfsiz &= ~(DXEPTSIZ_MULCNT_MASK); + ineptsfsiz |= ((pktcnt << DXEPTSIZ_MULCNT_SHIFT) & DXEPTSIZ_MULCNT_MASK); } else if (g_aic_udc.in_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_INTERRUPT) { - AIC_UDC_REG->ineptsfsiz[ep_idx] &= ~(DXEPTSIZ_MULCNT_MASK); - AIC_UDC_REG->ineptsfsiz[ep_idx] |= (1U << DXEPTSIZ_MULCNT_SHIFT); + ineptsfsiz &= ~(DXEPTSIZ_MULCNT_MASK); + ineptsfsiz |= (1U << DXEPTSIZ_MULCNT_SHIFT); } + writel(ineptsfsiz, &AIC_UDC_REG->ineptsfsiz[ep_idx]); #ifdef CONFIG_USB_AIC_DMA_ENABLE - AIC_UDC_REG->inepdmaaddr[ep_idx] = (uint32_t)(uintptr_t)data; + writel((uint32_t)(uintptr_t)data, &AIC_UDC_REG->inepdmaaddr[ep_idx]); #endif - AIC_UDC_REG->inepcfg[ep_idx] |= (DEPCTL_CNAK | DEPCTL_EPENA); + writel(0xFFFFFFFFU, &AIC_UDC_REG->inepint[ep_idx]); + + inepcfg |= (DEPCTL_CNAK | DEPCTL_EPENA); + writel(inepcfg, &AIC_UDC_REG->inepcfg[ep_idx]); return 0; } -int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) + +int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) +{ + return usbd_ep_start_write_raw(ep, data, data_len, 1); +} + +int usbd_ep_start_read_raw(const uint8_t ep, uint8_t *data, uint32_t data_len, uint8_t cache_align) { uint8_t ep_idx = USB_EP_GET_IDX(ep); uint32_t pktcnt = 0; + uint32_t i = 0; + uint32_t outepcfg = 0; + uint32_t outeptsfsiz = 0; + uint32_t usblinests = 0; if (!data && data_len) { return -1; } - if (AIC_UDC_REG->outepcfg[ep_idx] & DEPCTL_EPENA) { - return -2; + outepcfg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + if (outepcfg & DEPCTL_EPENA) { + for (i = 0; i < 100000; i++) { + outepcfg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + if (!(outepcfg & DEPCTL_EPENA)) + break; + } + if (i == 1000000) { + g_aic_udc.out_ep[ep_idx].xfer_len = data_len; + USB_LOG_ERR("ep%d AIC_UDC_REG->outepcfg[ep_idx] = 0x%x.\n", + (unsigned int)ep_idx, (unsigned int)outepcfg); + return -2; + } } - if (ep_idx && !(AIC_UDC_REG->outepcfg[ep_idx] & DEPCTL_MPS_MASK)) { + if (ep_idx && !(outepcfg & DEPCTL_MPS_MASK)) { return -3; } if (((uint32_t)(uintptr_t)data) & 0x03) { @@ -1045,7 +1335,7 @@ int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t g_aic_udc.out_ep[ep_idx].actual_xfer_len = 0; #ifdef CONFIG_USB_AIC_DMA_ENABLE - if ((ep_idx != 0) && (data_len > 0) && + if (cache_align && (ep_idx != 0) && (data_len > 0) && ((((uint32_t)(uintptr_t)data % CACHE_LINE_SIZE) != 0) || (((uint32_t)(uintptr_t)(data + data_len) % CACHE_LINE_SIZE) != 0))) { @@ -1066,12 +1356,17 @@ int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t aic_udc_dcache_invalidate((uintptr_t)data, ALIGN_UP(data_len, CACHE_LINE_SIZE)); #endif - AIC_UDC_REG->outeptsfsiz[ep_idx] &= ~(DXEPTSIZ_PKT_CNT_MASK); - AIC_UDC_REG->outeptsfsiz[ep_idx] &= ~(DXEPTSIZ_XFER_SIZE_MASK); + outeptsfsiz = readl(&AIC_UDC_REG->outeptsfsiz[ep_idx]); + outeptsfsiz &= ~(DXEPTSIZ_PKT_CNT_MASK); + outeptsfsiz &= ~(DXEPTSIZ_XFER_SIZE_MASK); + outeptsfsiz &= ~(DXEPTSIZ_MULCNT_MASK); + if (data_len == 0) { - AIC_UDC_REG->outeptsfsiz[ep_idx] |= (DXEPTSIZ_PKT_CNT_MASK & (1 << 19)); - AIC_UDC_REG->outeptsfsiz[ep_idx] |= (DXEPTSIZ_XFER_SIZE_MASK & g_aic_udc.out_ep[ep_idx].ep_mps); - AIC_UDC_REG->outepcfg[ep_idx] |= (DEPCTL_CNAK | DEPCTL_EPENA); + outeptsfsiz |= (DXEPTSIZ_PKT_CNT_MASK & (1 << 19)); + outeptsfsiz |= (DXEPTSIZ_XFER_SIZE_MASK & g_aic_udc.out_ep[ep_idx].ep_mps); + writel(outeptsfsiz, &AIC_UDC_REG->outeptsfsiz[ep_idx]); + outepcfg |= (DEPCTL_CNAK | DEPCTL_EPENA); + writel(outepcfg, &AIC_UDC_REG->outepcfg[ep_idx]); return 0; } @@ -1080,34 +1375,46 @@ int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len = g_aic_udc.out_ep[ep_idx].ep_mps; } g_aic_udc.out_ep[ep_idx].xfer_len = data_len; - AIC_UDC_REG->outeptsfsiz[ep_idx] |= (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)); - AIC_UDC_REG->outeptsfsiz[ep_idx] |= (DXEPTSIZ_XFER_SIZE_MASK & data_len); + outeptsfsiz |= (DXEPTSIZ_PKT_CNT_MASK & (1U << 19)); + outeptsfsiz |= (DXEPTSIZ_XFER_SIZE_MASK & data_len); + writel(outeptsfsiz, &AIC_UDC_REG->outeptsfsiz[ep_idx]); } else { pktcnt = (uint16_t)((data_len + g_aic_udc.out_ep[ep_idx].ep_mps - 1U) / g_aic_udc.out_ep[ep_idx].ep_mps); - AIC_UDC_REG->outeptsfsiz[ep_idx] |= (DXEPTSIZ_PKT_CNT_MASK & (pktcnt << 19)); - AIC_UDC_REG->outeptsfsiz[ep_idx] |= (DXEPTSIZ_XFER_SIZE_MASK & data_len); + outeptsfsiz |= (DXEPTSIZ_PKT_CNT_MASK & (pktcnt << 19)); + outeptsfsiz |= (DXEPTSIZ_XFER_SIZE_MASK & data_len); + writel(outeptsfsiz, &AIC_UDC_REG->outeptsfsiz[ep_idx]); } #ifdef CONFIG_USB_AIC_DMA_ENABLE - AIC_UDC_REG->outepdmaaddr[ep_idx] = (uint32_t)(uintptr_t)data; + writel((uint32_t)(uintptr_t)data, &AIC_UDC_REG->outepdmaaddr[ep_idx]); #endif if (g_aic_udc.out_ep[ep_idx].ep_type == USB_ENDPOINT_TYPE_ISOCHRONOUS) { - if ((AIC_UDC_REG->usblinests & (1U << 8)) == 0U) { - AIC_UDC_REG->outepcfg[ep_idx] &= ~DEPCTL_SETD0PID; - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_SETD1PID; + usblinests = readl(&AIC_UDC_REG->usblinests); + if ((usblinests & (1U << 8)) == 0U) { + outepcfg &= ~DEPCTL_SETD0PID; + outepcfg |= DEPCTL_SETD1PID; } else { - AIC_UDC_REG->outepcfg[ep_idx] &= ~DEPCTL_SETD1PID; - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_SETD0PID; + outepcfg &= ~DEPCTL_SETD1PID; + outepcfg |= DEPCTL_SETD0PID; } } - AIC_UDC_REG->outepcfg[ep_idx] |= (DEPCTL_CNAK | DEPCTL_EPENA); + writel(0xFFFFFFFFU, &AIC_UDC_REG->outepint[ep_idx]); + outepcfg |= (DEPCTL_CNAK | DEPCTL_EPENA); + writel(outepcfg, &AIC_UDC_REG->outepcfg[ep_idx]); + return 0; } + +int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) +{ + return usbd_ep_start_read_raw(ep, data, data_len, 1); +} + void USBD_IRQHandler(void) { - uint32_t gint_status, ep_idx, ep_intr, epint, daintmask; + uint32_t gint_status, ep_idx, ep_intr, epint, daintmask, tmpreg, tmpreg01; gint_status = aic_get_glb_intstatus(); /* Avoid spurious interrupt */ @@ -1121,9 +1428,11 @@ void USBD_IRQHandler(void) /* Handle RxQLevel Interrupt */ if (gint_status & INT_RX_FIFO_NOT_EMPTY) { - AIC_UDC_REG->usbintmsk &= ~(INT_RX_FIFO_NOT_EMPTY); + tmpreg = readl(&AIC_UDC_REG->usbintmsk); + tmpreg &= ~(INT_RX_FIFO_NOT_EMPTY); + writel(tmpreg, &AIC_UDC_REG->usbintmsk); - temp = AIC_UDC_REG->rxfifosts_pop; + temp = readl(&AIC_UDC_REG->rxfifosts_pop); ep_idx = temp & RXFIFOSTS_EPNUM_MASK; if ((temp & RXFIFOSTS_PKTSTS_MASK) == PKTSTS_OUT_DATA_PKT_REC) { @@ -1138,7 +1447,9 @@ void USBD_IRQHandler(void) } else { /* ... */ } - AIC_UDC_REG->usbintmsk |= INT_RX_FIFO_NOT_EMPTY; + tmpreg = readl(&AIC_UDC_REG->usbintmsk); + tmpreg |= INT_RX_FIFO_NOT_EMPTY; + writel(tmpreg, &AIC_UDC_REG->usbintmsk); } #endif if (gint_status & INT_OUT_EP) { @@ -1147,42 +1458,70 @@ void USBD_IRQHandler(void) while (ep_intr != 0U) { if ((ep_intr & 0x1U) != 0U) { epint = aic_get_outep_intstatus(ep_idx); - uint32_t DoepintReg = AIC_UDC_REG->outepint[ep_idx]; - AIC_UDC_REG->outepint[ep_idx] = DoepintReg; + writel(epint, &AIC_UDC_REG->outepint[ep_idx]); struct aic_ep_state *ep = &g_aic_udc.out_ep[ep_idx]; - if ((epint & TRANSFER_DONE) == TRANSFER_DONE) { + + if ((ep_idx == 0)) { #ifdef CONFIG_USB_AIC_DMA_ENABLE + extern void usb_dc_sync_dma(void); + usb_dc_sync_dma(); if (ep->xfer_align_buf) memcpy(ep->xfer_buf, ep->xfer_align_buf, ep->xfer_len); #endif - if ((ep_idx == 0)) { - if (ep0_ctrl_stage == 1) { - ep0_ctrl_stage = 2; + + if (ep0_ctrl_stage == AIC_EP0_SETUP) { + /* Setup data-out will send STATUS_PHASE_RCVD interrupt when next setup. + Attemp to re-read setup data. */ + if (epint & CTRL_OUT_EP_STATUS_PHASE_RCVD) { + aic_ep0_start_read_setup((uint8_t *)&g_aic_udc.setup); + } + + /* Normal setup handle */ + if (epint & CTRL_OUT_EP_SETUP_PHASE_DONE) { + if (g_aic_udc.setup.wLength) + if ((g_aic_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT) + ep0_ctrl_stage = AIC_EP0_DATA_OUT; + else + ep0_ctrl_stage = AIC_EP0_DATA_IN; + else + ep0_ctrl_stage = AIC_EP0_STATUS_IN; usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_aic_udc.setup); - } else { + } + } else { + if ((epint & TRANSFER_DONE) == TRANSFER_DONE) { if (ep->xfer_len == 0) { /* Out status, start reading setup */ aic_ep0_start_read_setup((uint8_t *)&g_aic_udc.setup); } else { - ep->actual_xfer_len = ep->xfer_len - ((AIC_UDC_REG->outeptsfsiz[ep_idx]) & DXEPTSIZ_XFER_SIZE_MASK); + //ep->actual_xfer_len = ep->xfer_len - ((AIC_UDC_REG->outeptsfsiz[ep_idx]) & DXEPTSIZ_XFER_SIZE_MASK); + ep->actual_xfer_len = ep->xfer_len; ep->xfer_len = 0; usbd_event_ep_out_complete_handler(0, 0x00, ep->actual_xfer_len); } } - } else { - ep->actual_xfer_len = ep->xfer_len - ((AIC_UDC_REG->outeptsfsiz[ep_idx]) & DXEPTSIZ_XFER_SIZE_MASK); - ep->xfer_len = 0; - usbd_event_ep_out_complete_handler(0, ep_idx, ep->actual_xfer_len); } + } else { + #ifdef CONFIG_USB_AIC_DMA_ENABLE + extern void usb_dc_sync_dma(void); + usb_dc_sync_dma(); + if (ep->xfer_align_buf) + memcpy(ep->xfer_buf, ep->xfer_align_buf, ep->xfer_len); + #endif + tmpreg = readl(&AIC_UDC_REG->outeptsfsiz[ep_idx]); + ep->actual_xfer_len = ep->xfer_len - (tmpreg & DXEPTSIZ_XFER_SIZE_MASK); + ep->xfer_len = 0; + usbd_event_ep_out_complete_handler(0, ep_idx, ep->actual_xfer_len); } +#ifndef CONFIG_USB_AIC_DMA_ENABLE if ((epint & CTRL_OUT_EP_SETUP_PHASE_DONE) == CTRL_OUT_EP_SETUP_PHASE_DONE) { if (ep0_ctrl_stage == 1) { ep0_ctrl_stage = 2; usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_aic_udc.setup); } } +#endif } ep_intr >>= 1U; ep_idx++; @@ -1191,7 +1530,9 @@ void USBD_IRQHandler(void) #ifndef CONFIG_USB_AIC_DMA_ENABLE if (gint_status & INT_NP_TX_FIFO_EMPTY) { - AIC_UDC_REG->usbintmsk &= ~(INT_NP_TX_FIFO_EMPTY); + tmpreg = readl(&AIC_UDC_REG->usbintmsk); + tmpreg &= ~(INT_NP_TX_FIFO_EMPTY); + writel(tmpreg, &AIC_UDC_REG->usbintmsk); aic_tx_fifo_empty_procecss(0); } #endif @@ -1202,24 +1543,29 @@ void USBD_IRQHandler(void) while (ep_intr != 0U) { if ((ep_intr & 0x1U) != 0U) { epint = aic_get_inep_intstatus(ep_idx); - uint32_t DiepintReg = AIC_UDC_REG->inepint[ep_idx]; - AIC_UDC_REG->inepint[ep_idx] = DiepintReg; + writel(epint, &AIC_UDC_REG->inepint[ep_idx]); + + if (epint & INTKNEPMIS) { + aic_udelay(100); + usbd_npinep_rewrite(ep_idx); + } if ((epint & TRANSFER_DONE) == TRANSFER_DONE) { if (ep_idx == 0) { - g_aic_udc.in_ep[ep_idx].actual_xfer_len = g_aic_udc.in_ep[ep_idx].xfer_len - ((AIC_UDC_REG->ineptsfsiz[ep_idx]) & DXEPTSIZ_XFER_SIZE_MASK); - g_aic_udc.in_ep[ep_idx].xfer_len = 0; - usbd_event_ep_in_complete_handler(0, 0x80, g_aic_udc.in_ep[ep_idx].actual_xfer_len); - if (g_aic_udc.setup.wLength && ((g_aic_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { /* In status, start reading setup */ aic_ep0_start_read_setup((uint8_t *)&g_aic_udc.setup); } else if (g_aic_udc.setup.wLength == 0) { /* In status, start reading setup */ aic_ep0_start_read_setup((uint8_t *)&g_aic_udc.setup); + } else { + g_aic_udc.in_ep[ep_idx].actual_xfer_len = g_aic_udc.in_ep[ep_idx].xfer_len - ((AIC_UDC_REG->ineptsfsiz[ep_idx]) & DXEPTSIZ_XFER_SIZE_MASK); + g_aic_udc.in_ep[ep_idx].xfer_len = 0; + usbd_event_ep_in_complete_handler(0, 0x80, g_aic_udc.in_ep[ep_idx].actual_xfer_len); } } else { - g_aic_udc.in_ep[ep_idx].actual_xfer_len = g_aic_udc.in_ep[ep_idx].xfer_len - ((AIC_UDC_REG->ineptsfsiz[ep_idx]) & DXEPTSIZ_XFER_SIZE_MASK); + tmpreg = readl(&AIC_UDC_REG->ineptsfsiz[ep_idx]); + g_aic_udc.in_ep[ep_idx].actual_xfer_len = g_aic_udc.in_ep[ep_idx].xfer_len - (tmpreg & DXEPTSIZ_XFER_SIZE_MASK); g_aic_udc.in_ep[ep_idx].xfer_len = 0; usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_aic_udc.in_ep[ep_idx].actual_xfer_len); } @@ -1236,69 +1582,80 @@ void USBD_IRQHandler(void) } } if (gint_status & INT_RESET) { - AIC_UDC_REG->usbintsts |= INT_RESET; - AIC_UDC_REG->usbdevfunc &= ~USBDEVFUNC_RMTWKUPSIG; + writel(INT_RESET, &AIC_UDC_REG->usbintsts); + tmpreg = readl(&AIC_UDC_REG->usbdevfunc); + tmpreg &= ~USBDEVFUNC_RMTWKUPSIG; + writel(tmpreg, &AIC_UDC_REG->usbdevfunc); usb_dc_rst(); } if (gint_status & INT_ENUMDONE) { - AIC_UDC_REG->usbintsts |= INT_ENUMDONE; + writel(INT_ENUMDONE, &AIC_UDC_REG->usbintsts); aic_set_turnaroundtime(usbd_clk, aic_get_devspeed()); - AIC_UDC_REG->usbdevfunc |= USBDEVFUNC_CGNPINNAK; + tmpreg = readl(&AIC_UDC_REG->usbdevfunc); + tmpreg |= USBDEVFUNC_CGNPINNAK; + writel(tmpreg, &AIC_UDC_REG->usbdevfunc); } if (gint_status & INT_INCOMP_ISO_OUT_INT) { - daintmask = AIC_UDC_REG->usbepintmsk; + daintmask = readl(&AIC_UDC_REG->usbepintmsk); daintmask >>= 16; for (ep_idx = 1; ep_idx < USB_NUM_BIDIR_ENDPOINTS; ep_idx++) { if ((BIT(ep_idx) & ~daintmask) || (g_aic_udc.out_ep[ep_idx].ep_type != USB_ENDPOINT_TYPE_ISOCHRONOUS)) continue; - if (!(AIC_UDC_REG->outepcfg[ep_idx] & DEPCTL_USBACTEP)) - continue; - if ((AIC_UDC_REG->usblinests & (1U << 8)) != 0U) { - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_SETD0PID; - AIC_UDC_REG->outepcfg[ep_idx] &= ~DEPCTL_SETD1PID; + tmpreg = readl(&AIC_UDC_REG->outepcfg[ep_idx]); + if (!(tmpreg & DEPCTL_USBACTEP)) + continue; + tmpreg01 = readl(&AIC_UDC_REG->usblinests); + if ((tmpreg01 & (1U << 8)) != 0U) { + tmpreg |= DEPCTL_SETD0PID; + tmpreg &= ~DEPCTL_SETD1PID; } else { - AIC_UDC_REG->outepcfg[ep_idx] &= ~DEPCTL_SETD0PID; - AIC_UDC_REG->outepcfg[ep_idx] |= DEPCTL_SETD1PID; + tmpreg &= ~DEPCTL_SETD0PID; + tmpreg |= DEPCTL_SETD1PID; } + writel(tmpreg, &AIC_UDC_REG->outepcfg[ep_idx]); } - AIC_UDC_REG->usbintsts |= INT_INCOMP_ISO_OUT_INT; + writel(INT_INCOMP_ISO_OUT_INT, &AIC_UDC_REG->usbintsts); } if (gint_status & INT_INCOMP_ISO_IN_INT) { - daintmask = AIC_UDC_REG->usbepintmsk; - daintmask >>= 16; + daintmask = readl(&AIC_UDC_REG->usbepintmsk); + daintmask &= 0xFFFF; for (ep_idx = 1; ep_idx < USB_NUM_BIDIR_ENDPOINTS; ep_idx++) { if (((BIT(ep_idx) & ~daintmask)) || (g_aic_udc.in_ep[ep_idx].ep_type != USB_ENDPOINT_TYPE_ISOCHRONOUS)) continue; - if (!(AIC_UDC_REG->inepcfg[ep_idx] & DEPCTL_USBACTEP)) + tmpreg = readl(&AIC_UDC_REG->inepcfg[ep_idx]); + if (!(tmpreg & DEPCTL_USBACTEP)) continue; - - if ((AIC_UDC_REG->usblinests & (1U << 8)) != 0U) { - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_SETD0PID; - AIC_UDC_REG->inepcfg[ep_idx] &= ~DEPCTL_SETD1PID; + tmpreg01 = readl(&AIC_UDC_REG->usblinests); + if ((tmpreg01 & (1U << 8)) != 0U) { + tmpreg |= DEPCTL_SETD0PID; + tmpreg &= ~DEPCTL_SETD1PID; } else { - AIC_UDC_REG->inepcfg[ep_idx] &= ~DEPCTL_SETD0PID; - AIC_UDC_REG->inepcfg[ep_idx] |= DEPCTL_SETD1PID; + tmpreg &= ~DEPCTL_SETD0PID; + tmpreg |= DEPCTL_SETD1PID; } + writel(tmpreg, &AIC_UDC_REG->inepcfg[ep_idx]); } - AIC_UDC_REG->usbintsts |= INT_INCOMP_ISO_IN_INT; + + writel(INT_INCOMP_ISO_IN_INT, &AIC_UDC_REG->usbintsts); } if (gint_status & INT_SOF) { - AIC_UDC_REG->usbintsts |= INT_SOF; + writel(INT_SOF, &AIC_UDC_REG->usbintsts); } if (gint_status & INT_SUSPEND) { - AIC_UDC_REG->usbintsts |= INT_SUSPEND; + writel(INT_SUSPEND, &AIC_UDC_REG->usbintsts); + usbd_event_suspend_handler(0); } if (gint_status & INT_RESUME) { - AIC_UDC_REG->usbintsts |= INT_RESUME; + writel(INT_RESUME, &AIC_UDC_REG->usbintsts); } } diff --git a/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_ll.c b/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_ll.c index d2db1b5d666..e9b5b692f63 100644 --- a/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_ll.c +++ b/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_ll.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, Artinchip Technology Co., Ltd + * Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,12 +13,19 @@ extern irqreturn_t USBD_IRQHandler(int irq, void * data); uint32_t usbd_clk; +static unsigned char dma_sync_buffer[CACHE_LINE_SIZE] __attribute__((aligned(CACHE_LINE_SIZE))); + +void usb_dc_sync_dma(void) +{ + asm volatile("sw t0, (%0)" : : "r"(dma_sync_buffer)); + csi_dcache_clean_range((phy_addr_t)(ptr_t)dma_sync_buffer, CACHE_LINE_SIZE); +} void usb_dc_low_level_init(void) { /* set usb0 phy switch: Host/Device */ -#ifdef AIC_USING_USB0_DEVICE - syscfg_usb_phy0_sw_host(0); +#if defined(AIC_USING_USB0_DEVICE) || defined(AIC_USING_USB0_OTG) + hal_syscfg_usb_phy0_sw_host(0); #endif /* set pin-mux */ @@ -41,3 +48,13 @@ void usb_dc_low_level_init(void) aicos_irq_enable(CONFIG_USB_AIC_DC_IRQ_NUM); } +void usb_dc_low_level_deinit(void) +{ + aicos_irq_disable(CONFIG_USB_AIC_DC_IRQ_NUM); + + hal_reset_assert(CONFIG_USB_AIC_DC_PHY_RESET); + hal_reset_assert(CONFIG_USB_AIC_DC_RESET); + hal_clk_disable(CONFIG_USB_AIC_DC_PHY_CLK); + hal_clk_disable(CONFIG_USB_AIC_DC_CLK); +} + diff --git a/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_reg.h b/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_reg.h index 80e6997ac9c..b35b8d4fc8c 100644 --- a/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_reg.h +++ b/components/drivers/usb/cherryusb/port/aic/usb_dc_aic_reg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, Artinchip Technology Co., Ltd + * Copyright (c) 2022-2024, Artinchip Technology Co., Ltd * * SPDX-License-Identifier: Apache-2.0 */ @@ -142,10 +142,19 @@ typedef struct { #define EPS_NUM 5 #define PERIOD_IN_EP_NUM 2 #define TOTAL_FIFO_SIZE 0x3f6 +#ifdef LPKG_CHERRYUSB_DEVICE_VIDEO_DVP_TEMPLATE +/* video_dvp_template must use 2K Bytes period_tx_fifo */ +#define AIC_RX_FIFO_SIZE 0x99 +#define AIC_NP_TX_FIFO_SIZE 0x100 +#define AIC_PERIOD_TX_FIFO1_SIZE 0x200 +#define AIC_PERIOD_TX_FIFO2_SIZE 0x0 +#else +/* default configuration */ #define AIC_RX_FIFO_SIZE 0x119 #define AIC_NP_TX_FIFO_SIZE 0x100 #define AIC_PERIOD_TX_FIFO1_SIZE 0x100 #define AIC_PERIOD_TX_FIFO2_SIZE 0xDD +#endif #define DEPCTL_TXFNUM_0 (0x0 << 22) #define DEPCTL_TXFNUM_1 (0x1 << 22) @@ -244,9 +253,11 @@ typedef struct { #define DIEPCTL0_NEXT_EP_BIT (11) /* INEPINT/OUTEPINT device IN/OUT endpoint interrupt register */ +#define CTRL_OUT_EP_SETUP_RCVD (0x1 << 15) #define TXFIFO_EMP_INT (0x1 << 7) #define INEP_NAKEFF (0x1 << 6) #define BACK2BACK_SETUP_RECEIVED (0x1 << 6) +#define CTRL_OUT_EP_STATUS_PHASE_RCVD (0x1 << 5) #define INTKNEPMIS (0x1 << 5) #define INTKN_TXFEMP (0x1 << 4) #define NON_ISO_IN_EP_TIMEOUT (0x1 << 3) diff --git a/components/drivers/usb/cherryusb/port/bouffalolab/usb_dc_bl.c b/components/drivers/usb/cherryusb/port/bouffalolab/usb_dc_bl.c index b6859f8d5a8..18cba9302ac 100644 --- a/components/drivers/usb/cherryusb/port/bouffalolab/usb_dc_bl.c +++ b/components/drivers/usb/cherryusb/port/bouffalolab/usb_dc_bl.c @@ -457,6 +457,11 @@ int usb_dc_init(uint8_t busid) bflb_irq_attach(37, USBD_IRQ, NULL); bflb_irq_enable(37); + /* disable device-A for device */ + regval = getreg32(BFLB_PDS_BASE + PDS_USB_CTL_OFFSET); + regval |= PDS_REG_USB_IDDIG; + putreg32(regval, BFLB_PDS_BASE + PDS_USB_CTL_OFFSET); + /* disable global irq */ regval = getreg32(BFLB_USB_BASE + USB_DEV_CTL_OFFSET); regval &= ~USB_GLINT_EN_HOV; @@ -473,6 +478,11 @@ int usb_dc_init(uint8_t busid) regval = getreg32(BFLB_USB_BASE + USB_DEV_CTL_OFFSET); regval |= USB_SFRST_HOV; +#ifdef CONFIG_USB_HS + regval &= ~USB_FORCE_FS; +#else + regval |= USB_FORCE_FS; +#endif putreg32(regval, BFLB_USB_BASE + USB_DEV_CTL_OFFSET); while (getreg32(BFLB_USB_BASE + USB_DEV_CTL_OFFSET) & USB_SFRST_HOV) { diff --git a/components/drivers/usb/cherryusb/port/ch32/README.md b/components/drivers/usb/cherryusb/port/ch32/README.md deleted file mode 100644 index a625d04c3b7..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/README.md +++ /dev/null @@ -1,5 +0,0 @@ -# Note - -## Support Chip List - -- CH32V30x diff --git a/components/drivers/usb/cherryusb/port/ch32/ch585_usbhs_dc.c b/components/drivers/usb/cherryusb/port/ch32/ch585_usbhs_dc.c deleted file mode 100644 index 1ccdfe3ea32..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/ch585_usbhs_dc.c +++ /dev/null @@ -1,525 +0,0 @@ -#include "usbd_core.h" -#include "ch585_usbhs_reg.h" - -/** - * @brief Related register macro - */ -#define USB_BASE 0x40009000u -#define CH585_USBHS_DEV ((USBHSD_TypeDef *)USB_BASE) - -#ifndef USBD_IRQHandler -#define USBD_IRQHandler USB2_DEVICE_IRQHandler //use actual usb irq name instead -#endif - -#define R16_PIN_CONFIG (*((PUINT16V)0x4000101A)) -#define R32_PIN_CONFIG (*((PUINT32V)0x40001018)) // RW, I/O pin configuration -#define RB_PIN_USB2_EN 0x20 - -#define USB_SET_RX_DMA(ep_idx, addr) (*(volatile uint32_t *)((uint32_t)(&CH585_USBHS_DEV->UEP1_RX_DMA) + 4 * (ep_idx - 1)) = addr) -#define USB_SET_TX_DMA(ep_idx, addr) (*(volatile uint32_t *)((uint32_t)(&CH585_USBHS_DEV->UEP1_TX_DMA) + 4 * (ep_idx - 1)) = addr) - -#define USB_SET_MAX_LEN(ep_idx, len) (*(volatile uint16_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_MAX_LEN) + 4 * ep_idx) = len) -#define USB_SET_TX_LEN(ep_idx, len) (*(volatile uint16_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_TX_LEN) + 4 * ep_idx) = len) -#define USB_GET_TX_LEN(ep_idx) (*(volatile uint16_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_TX_LEN) + 4 * ep_idx)) -#define USB_SET_TX_CTRL(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_TX_CTRL) + 4 * ep_idx) = val) -#define USB_GET_TX_CTRL(ep_idx) (*(volatile uint8_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_TX_CTRL) + 4 * ep_idx)) -#define USB_SET_RX_CTRL(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_RX_CTRL) + 4 * ep_idx) = val) -#define USB_GET_RX_CTRL(ep_idx) (*(volatile uint8_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_RX_CTRL) + 4 * ep_idx)) -#define EPn_SET_TX_NAK(ep_idx) USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBHS_UEP_T_RES_MASK) | USBHS_UEP_T_RES_NAK) -#define EPn_SET_TX_VALID(ep_idx) USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBHS_UEP_T_RES_MASK) | USBHS_UEP_T_RES_ACK) -#define EPn_SET_RX_NAK(ep_idx) USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBHS_UEP_R_RES_MASK) | USBHS_UEP_R_RES_NAK) -#define EPn_SET_RX_VALID(ep_idx) USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBHS_UEP_R_RES_MASK) | USBHS_UEP_R_RES_ACK) -#define EPn_GET_RX_LEN(ep_idx) (*(volatile uint16_t *)((uint32_t)(&CH585_USBHS_DEV->USB_EP0_RX_LEN) + 4 * ep_idx)) -#define EPn_SET_TX_LEN(ep_idx, len) (*(volatile uint16_t *)((uint32_t)(&CH585_USBHS_DEV->UEP0_TX_LEN) + 4 * ep_idx) = len) -#define EPn_CLEAR_TX_DONE(ep_idx) USB_SET_TX_CTRL(ep_idx, USB_GET_TX_CTRL(ep_idx) & ~USBHS_UEP_T_DONE) -#define EPn_CLEAR_RX_DONE(ep_idx) USB_SET_RX_CTRL(ep_idx, USB_GET_RX_CTRL(ep_idx) & ~USBHS_UEP_R_DONE) -#define EPn_SET_TX_ISO_VALID(ep_idx) -#define EPn_SET_RX_ISO_VALID(ep_idx) - -/* ep nums */ -#ifndef CONFIG_USBDEV_EP_NUM -#define CONFIG_USBDEV_EP_NUM 8 -#endif - -/** - * @brief Endpoint information structure - */ -typedef struct _usbd_ep_info { - uint8_t mps; /* Maximum packet length of endpoint */ - uint8_t eptype; /* Endpoint Type */ - uint8_t ep_enable; /* Endpoint enable */ - uint8_t *xfer_buf; - uint32_t xfer_len; - uint32_t actual_xfer_len; -} usbd_ep_info; - -/* ch58x usb */ -static struct _ch58x_core_prvi { - uint8_t address; /* Address */ - usbd_ep_info ep_in[CONFIG_USBDEV_EP_NUM]; - usbd_ep_info ep_out[CONFIG_USBDEV_EP_NUM]; - struct usb_setup_packet setup; -} usb_dc_cfg; - -__WEAK void usb_dc_low_level_init(void) -{ -} - -__WEAK void usb_dc_low_level_deinit(void) -{ -} - -/** - * @brief USB initialization - * @pre None - * @param[in] None - * @retval >=0 success otherwise failure - */ -int usb_dc_init(uint8_t busid) -{ - R8_USBHS_PLL_CTRL = USBHS_PLL_EN; - R16_PIN_CONFIG |= RB_PIN_USB2_EN; - CH585_USBHS_DEV->CONTROL = USBHS_UD_RST_LINK | USBHS_UD_PHY_SUSPENDM; - CH585_USBHS_DEV->INT_EN = USBHS_UDIE_BUS_RST | USBHS_UDIE_SUSPEND | USBHS_UDIE_BUS_SLEEP | USBHS_UDIE_LPM_ACT | USBHS_UDIE_TRANSFER | USBHS_UDIE_LINK_RDY; - /* Enable all end points */ - CH585_USBHS_DEV->UEP_TX_EN = 0xffff; - CH585_USBHS_DEV->UEP_RX_EN = 0xffff; - - CH585_USBHS_DEV->BASE_MODE = USBHS_UD_SPEED_HIGH; - CH585_USBHS_DEV->CONTROL = USBHS_UD_DEV_EN | USBHS_UD_DMA_EN | USBHS_UD_LPM_EN | USBHS_UD_PHY_SUSPENDM; - - CH585_USBHS_DEV->UEP_T_TOG_AUTO = 0xfe; - CH585_USBHS_DEV->UEP_R_TOG_AUTO = 0xfe; - usb_dc_low_level_init(); - return 0; -} - -int usb_dc_deinit(uint8_t busid) -{ - R8_USBHS_PLL_CTRL &= ~USBHS_PLL_EN; - R32_PIN_CONFIG &= ~RB_PIN_USB2_EN; - - CH585_USBHS_DEV->CONTROL |= USBHS_UD_RST_SIE; - CH585_USBHS_DEV->CONTROL &= ~USBHS_UD_RST_SIE; - usb_dc_low_level_deinit(); - return 0; -} - -/** - * @brief Set address - * @pre None - * @param[in] address ：8-bit valid address - * @retval >=0 success otherwise failure - */ -int usbd_set_address(uint8_t busid, const uint8_t address) -{ - if (address == 0) { - CH585_USBHS_DEV->DEV_AD = (CH585_USBHS_DEV->DEV_AD & 0x80) | address; - } - usb_dc_cfg.address = address; - return 0; -} - -int usbd_set_remote_wakeup(uint8_t busid) -{ - return -1; -} - -uint8_t usbd_get_port_speed(uint8_t busid) -{ - return USB_SPEED_HIGH; -} - -/** - * @brief Open endpoint - * @pre None - * @param[in] ep_cfg : Endpoint configuration structure pointer - * @retval >=0 success otherwise failure - */ -int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) -{ - uint8_t epid = USB_EP_GET_IDX(ep->bEndpointAddress); - if (epid > (CONFIG_USBDEV_EP_NUM - 1)) { - /** - * If you use ch58x, you can change the CONFIG_USBDEV_EP_NUM set to 8 - */ - USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } - - uint8_t mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - USB_SET_MAX_LEN(epid, mps); - - if (USB_EP_DIR_IS_IN(ep->bEndpointAddress)) { - usb_dc_cfg.ep_in[epid].ep_enable = true; - usb_dc_cfg.ep_in[epid].mps = mps; - usb_dc_cfg.ep_in[epid].eptype = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - USB_SET_TX_CTRL(epid, USBHS_UEP_T_RES_NAK); - EPn_CLEAR_TX_DONE(epid); - } else if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { - usb_dc_cfg.ep_out[epid].ep_enable = true; - usb_dc_cfg.ep_out[epid].mps = mps; - usb_dc_cfg.ep_out[epid].eptype = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - USB_SET_RX_CTRL(epid, USBHS_UEP_R_RES_NAK); - } - - return 0; -} - -/** - * @brief Close endpoint - * @pre None - * @param[in] ep ： Endpoint address - * @retval >=0 success otherwise failure - */ -int usbd_ep_close(uint8_t busid, const uint8_t ep) -{ - uint8_t epid = USB_EP_GET_IDX(ep); - if (USB_EP_DIR_IS_IN(ep)) { - usb_dc_cfg.ep_in[epid].ep_enable = false; - } else if (USB_EP_DIR_IS_OUT(ep)) { - usb_dc_cfg.ep_out[epid].ep_enable = false; - } - return 0; -} - -/** - * @brief Endpoint setting stall - * @pre None - * @param[in] ep ： Endpoint address - * @retval >=0 success otherwise failure - */ -int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - if (USB_EP_DIR_IS_OUT(ep)) { - if (ep_idx == 0) { - CH585_USBHS_DEV->UEP0_RX_CTRL = USBHS_UEP_R_RES_STALL; - } else { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBHS_UEP_R_RES_MASK) | USBHS_UEP_R_RES_STALL); - } - } else { - if (ep_idx == 0) { - CH585_USBHS_DEV->UEP0_TX_CTRL = USBHS_UEP_T_RES_STALL; - } else { - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBHS_UEP_T_RES_MASK) | USBHS_UEP_T_RES_STALL); - } - } - return 0; -} - -/** - * @brief Endpoint clear stall - * @pre None - * @param[in] ep ： Endpoint address - * @retval >=0 success otherwise failure - */ -int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (USB_EP_DIR_IS_OUT(ep)) { - USB_SET_RX_CTRL(ep_idx, USBHS_UEP_R_RES_ACK | USBHS_UEP_R_TOG_DATA0); - } else { - USB_SET_TX_CTRL(ep_idx, USBHS_UEP_T_RES_NAK | USBHS_UEP_T_TOG_DATA0); - } - return 0; -} - -/** - * @brief Check endpoint status - * @pre None - * @param[in] ep ： Endpoint address - * @param[out] stalled ： Outgoing endpoint status - * @retval >=0 success otherwise failure - */ -int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) -{ - if (USB_EP_DIR_IS_OUT(ep)) { - } else { - } - return 0; -} - -/** - * @brief Setup in ep transfer setting and start transfer. - * - * This function is asynchronous. - * This function is similar to uart with tx dma. - * - * This function is called to write data to the specified endpoint. The - * supplied usbd_endpoint_callback function will be called when data is transmitted - * out. - * - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] data Pointer to data to write - * @param[in] data_len Length of the data requested to write. This may - * be zero for a zero length status packet. - * @return 0 on success, negative errno code on fail. - */ -int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!usb_dc_cfg.ep_in[ep_idx].ep_enable) { - return -2; - } - if ((uint32_t)data & 0x03) { - return -3; - } - - usb_dc_cfg.ep_in[ep_idx].xfer_buf = (uint8_t *)data; - usb_dc_cfg.ep_in[ep_idx].xfer_len = data_len; - usb_dc_cfg.ep_in[ep_idx].actual_xfer_len = 0; - - if (ep_idx == 0) { - if (data_len == 0) { - USB_SET_TX_LEN(ep_idx, 0); - } else { - data_len = MIN(data_len, usb_dc_cfg.ep_in[ep_idx].mps); - USB_SET_TX_LEN(ep_idx, data_len); - CH585_USBHS_DEV->UEP0_DMA = (uint32_t)data; - } - } else { - if (data_len == 0) { - USB_SET_TX_LEN(ep_idx, 0); - } else { - data_len = MIN(data_len, usb_dc_cfg.ep_in[ep_idx].mps); - USB_SET_TX_LEN(ep_idx, data_len); - USB_SET_TX_DMA(ep_idx, (uint32_t)data); - } - } - - EPn_SET_TX_VALID(ep_idx); - return 0; -} - -/** - * @brief Setup out ep transfer setting and start transfer. - * - * This function is asynchronous. - * This function is similar to uart with rx dma. - * - * This function is called to read data to the specified endpoint. The - * supplied usbd_endpoint_callback function will be called when data is received - * in. - * - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] data Pointer to data to read - * @param[in] data_len Max length of the data requested to read. - * - * @return 0 on success, negative errno code on fail. - */ -int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!usb_dc_cfg.ep_out[ep_idx].ep_enable) { - return -2; - } - if ((uint32_t)data & 0x03) { - return -3; - } - - usb_dc_cfg.ep_out[ep_idx].xfer_buf = (uint8_t *)data; - usb_dc_cfg.ep_out[ep_idx].xfer_len = data_len; - usb_dc_cfg.ep_out[ep_idx].actual_xfer_len = 0; - - if (ep_idx == 0) { - if (data_len == 0) { - } else { - CH585_USBHS_DEV->UEP0_DMA = (uint32_t)data; - } - } else { - USB_SET_RX_DMA(ep_idx, (uint32_t)data); - } - - EPn_SET_RX_VALID(ep_idx); - return 0; -} - -static inline void handle_ep0_in(void) -{ - switch (usb_dc_cfg.setup.bmRequestType >> USB_REQUEST_DIR_SHIFT) { - case 1: - CH585_USBHS_DEV->UEP0_TX_CTRL ^= USBHS_UEP_T_TOG_DATA1; - EPn_SET_TX_NAK(0); - if (usb_dc_cfg.ep_in[0].xfer_len > usb_dc_cfg.ep_in[0].mps) { - usb_dc_cfg.ep_in[0].xfer_len -= usb_dc_cfg.ep_in[0].mps; - usb_dc_cfg.ep_in[0].actual_xfer_len += usb_dc_cfg.ep_in[0].mps; - usbd_event_ep_in_complete_handler(0, 0 | 0x80, usb_dc_cfg.ep_in[0].actual_xfer_len); - } else { - usb_dc_cfg.ep_in[0].actual_xfer_len += usb_dc_cfg.ep_in[0].xfer_len; - usb_dc_cfg.ep_in[0].xfer_len = 0; - usbd_event_ep_in_complete_handler(0, 0 | 0x80, usb_dc_cfg.ep_in[0].actual_xfer_len); - } - break; - case 0: - /* Set */ - switch (usb_dc_cfg.setup.bRequest) { - case USB_REQUEST_SET_ADDRESS: - /* Fill in the equipment address */ - CH585_USBHS_DEV->DEV_AD = usb_dc_cfg.address; - CH585_USBHS_DEV->UEP0_DMA = (uint32_t)&usb_dc_cfg.setup; - EPn_SET_TX_NAK(0); - EPn_SET_RX_VALID(0); - break; - default: - /* Normal out state phase */ - CH585_USBHS_DEV->UEP0_DMA = (uint32_t)&usb_dc_cfg.setup; - EPn_SET_TX_NAK(0); - EPn_SET_RX_VALID(0); - break; - } - break; - } -} - -static inline void handle_non_ep0_in(uint8_t epid) -{ - EPn_SET_TX_NAK(epid); - if (usb_dc_cfg.ep_in[epid].xfer_len > usb_dc_cfg.ep_in[epid].mps) { - /* Need start in again */ - usb_dc_cfg.ep_in[epid].xfer_buf += usb_dc_cfg.ep_in[epid].mps; - usb_dc_cfg.ep_in[epid].xfer_len -= usb_dc_cfg.ep_in[epid].mps; - usb_dc_cfg.ep_in[epid].actual_xfer_len += usb_dc_cfg.ep_in[epid].mps; - - uint32_t write_count = MIN(usb_dc_cfg.ep_in[epid].xfer_len, usb_dc_cfg.ep_in[epid].mps); - USB_SET_TX_LEN(epid, write_count); - USB_SET_TX_DMA(epid, (uint32_t)usb_dc_cfg.ep_in[epid].xfer_buf); - - if (usb_dc_cfg.ep_in[epid].eptype != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - EPn_SET_TX_VALID(epid); - } else { - EPn_SET_TX_ISO_VALID(epid); - } - } else { - usb_dc_cfg.ep_in[epid].actual_xfer_len += usb_dc_cfg.ep_in[epid].xfer_len; - usb_dc_cfg.ep_in[epid].xfer_len = 0; - usbd_event_ep_in_complete_handler(0, epid | 0x80, usb_dc_cfg.ep_in[epid].actual_xfer_len); - } -} - -static inline void usb_process_ep_in(uint8_t epid) -{ - if (epid == 0) { - handle_ep0_in(); - } else { - handle_non_ep0_in(epid); - } - - EPn_CLEAR_TX_DONE(epid); -} - -static inline void usb_process_ep_out(uint8_t epid) -{ - EPn_SET_RX_NAK(epid); - if (epid == 0) { - if (CH585_USBHS_DEV->UEP0_RX_CTRL & USBHS_UEP_R_SETUP_IS) { - CH585_USBHS_DEV->UEP0_RX_CTRL |= USBHS_UEP_R_TOG_DATA1; - CH585_USBHS_DEV->UEP0_TX_CTRL |= USBHS_UEP_T_TOG_DATA1; - if (usb_dc_cfg.setup.bmRequestType >> USB_REQUEST_DIR_SHIFT == 0) { - /** - * Ep0 The next in must be the status stage. - * The device must reply to the host data 0 length packet. - * Here, set the transmission length to 0 and the transmission status to ACK, - * and wait for the host to send the in token to retrieve - */ - EPn_SET_TX_LEN(0, 0); - EPn_SET_TX_VALID(0); - } - usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&usb_dc_cfg.setup); - } else { - CH585_USBHS_DEV->UEP0_RX_CTRL ^= USBHS_UEP_R_TOG_DATA1; - uint32_t read_count = EPn_GET_RX_LEN(0); - usb_dc_cfg.ep_out[0].actual_xfer_len += read_count; - usb_dc_cfg.ep_out[0].xfer_len -= read_count; - usbd_event_ep_out_complete_handler(0, 0x00, usb_dc_cfg.ep_out[0].actual_xfer_len); - if (read_count == 0) { - /* Out status, start reading setup */ - CH585_USBHS_DEV->UEP0_DMA = (uint32_t)&usb_dc_cfg.setup; - EPn_SET_RX_VALID(0); - } - } - } else { - if (USB_GET_RX_CTRL(epid) & USBHS_UEP_R_TOG_MATCH) { - uint32_t read_count = EPn_GET_RX_LEN(epid); - usb_dc_cfg.ep_out[epid].xfer_buf += read_count; - usb_dc_cfg.ep_out[epid].actual_xfer_len += read_count; - usb_dc_cfg.ep_out[epid].xfer_len -= read_count; - - if ((read_count < usb_dc_cfg.ep_out[epid].mps) || (usb_dc_cfg.ep_out[epid].xfer_len == 0)) { - usbd_event_ep_out_complete_handler(0, ((epid) & 0x7f), usb_dc_cfg.ep_out[epid].actual_xfer_len); - } else { - USB_SET_RX_DMA(epid, (uint32_t)usb_dc_cfg.ep_out[epid].xfer_buf); - if (usb_dc_cfg.ep_out[epid].eptype != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - EPn_SET_RX_VALID(epid); - } else { - EPn_SET_RX_ISO_VALID(epid); - } - } - } - } - - EPn_CLEAR_RX_DONE(epid); -} - -static inline void usb_trans_end_process(void) -{ - uint8_t epid = (CH585_USBHS_DEV->INT_ST & USBHS_UDIS_EP_ID_MASK); - switch (CH585_USBHS_DEV->INT_ST & USBHS_UDIS_EP_DIR) { - case USBHS_UDIS_EP_DIR: /* in */ - usb_process_ep_in(epid); - break; - case 0: /* setup or out */ - usb_process_ep_out(epid); - break; - default: - break; - } -} - -/** - * @brief USB interrupt processing function - * @pre None - * @param[in] None - * @retval None - */ -__attribute__((interrupt("WCH-Interrupt-fast"))) -__attribute__((section(".highcode"))) void -USBD_IRQHandler(void) -{ - volatile uint8_t intflag = 0; - intflag = CH585_USBHS_DEV->INT_FG; - - if (intflag & USBHS_UDIF_TRANSFER) { - usb_trans_end_process(); - } else if (intflag & USBHS_UDIF_BUS_RST) { - /* Reset */ - CH585_USBHS_DEV->DEV_AD = 0; - usbd_event_reset_handler(0); - /* Set ep0 rx vaild to start receive setup packet */ - CH585_USBHS_DEV->UEP0_DMA = (uint32_t)&usb_dc_cfg.setup; - // EPn_SET_RX_VALID(0); - R8_U2EP0_TX_CTRL = USBHS_UEP_T_RES_NAK; - R8_U2EP0_RX_CTRL = USBHS_UEP_R_RES_ACK; - CH585_USBHS_DEV->INT_FG = USBHS_UDIF_BUS_RST; - } else if (intflag & USBHS_UDIF_SUSPEND) { - if (CH585_USBHS_DEV->MIS_ST & 0x04) { - /* Suspend */ - } else { - /* Wake up */ - } - CH585_USBHS_DEV->INT_FG = USBHS_UDIF_SUSPEND; - } else { - CH585_USBHS_DEV->INT_FG = intflag; - } -} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/ch32/ch585_usbhs_reg.h b/components/drivers/usb/cherryusb/port/ch32/ch585_usbhs_reg.h deleted file mode 100644 index 29ed6db0e59..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/ch585_usbhs_reg.h +++ /dev/null @@ -1,450 +0,0 @@ -#pragma once - -/**********************************/ -/*********USB high speed**********/ -/**********************************/ -typedef volatile unsigned short *PUINT16V; -typedef volatile unsigned long *PUINT32V; -typedef volatile unsigned char *PUINT8V; - -/* USB high speed device register */ -#define R8_USB2_CTRL (*((PUINT8V)0x40009000)) // RW, USB_high_speed control register -#define USBHS_UD_LPM_EN 0x80 // RW, enable LPM -#define USBHS_UD_DEV_EN 0x20 // RW, enable USB equipment -#define USBHS_UD_DMA_EN 0x10 // RW, enable DMA transmit -#define USBHS_UD_PHY_SUSPENDM 0x08 // RW, suspeng USB PHY -#define USBHS_UD_CLR_ALL 0x04 // RW, clear all interupt flag -#define USBHS_UD_RST_SIE 0x02 // RW, reset USB protocol processor,including end point register -#define USBHS_UD_RST_LINK 0x01 // RW, enable LNK layer reset -#define R8_USB2_BASE_MODE (*((PUINT8V)0x40009001)) // RW, USB_high_speed mode control register -#define USBHS_UD_SPEED_FULL 0x00 -#define USBHS_UD_SPEED_HIGH 0x01 -#define USBHS_UD_SPEED_LOW 0x02 -#define USBHS_UD_SPEED_TYPE 0x03 // RW, speed mode excpeted by the equipment,00:full speed, 01:high speed, 10:low speed -#define R8_USB2_INT_EN (*((PUINT8V)0x40009002)) // RW, USB_high_speed intreurpt enable register -#define USBHS_UDIE_FIFO_OVER 0x80 // RW, enable fifo overflow interupt -#define USBHS_UDIE_LINK_RDY 0x40 // RW, enable USB conect interupt -#define USBHS_UDIE_SOF_ACT 0x20 // RW, enable SOF package received interupt -#define USBHS_UDIE_TRANSFER 0x10 // RW, enable USB transmit end interupt -#define USBHS_UDIE_LPM_ACT 0x08 // RW, enable lpm transmit end interupt -#define USBHS_UDIE_BUS_SLEEP 0x04 // RW, enable usb bus sleep interupt -#define USBHS_UDIE_SUSPEND 0x02 // RW, enable usb bus suspend interupt -#define USBHS_UDIE_BUS_RST 0x01 // RW, enable usb bus reset interupt -#define R8_USB2_DEV_AD (*((PUINT8V)0x40009003)) // RW, USB_high_speed device adress register -#define USBHS_UD_DEV_ADDR 0x7F // RW, adress of usb equipment -#define R8_USB2_WAKE_CTRL (*((PUINT8V)0x40009004)) // RW, USB_high_speed wake up remotely register -#define USBHS_UD_UD_REMOTE_WKUP 0x01 // RW1, wake up remotely and auto reset hardware -#define R8_USB2_TEST_MODE (*((PUINT8V)0x40009005)) // RW, USB_high_speed test mode register -#define USBHS_UD_TEST_EN 0x80 // RW, enable test mode -#define USBHS_UD_TEST_SE0NAK 0x08 // RW, output SE0 when in test mode -#define USBHS_UD_TEST_PKT 0x04 // RW, output one package(including DATA0,data and length of end pont4) when in test mode,not work on virtual equipment -#define USBHS_UD_TEST_K 0x02 // RW, output K when in test mode -#define USBHS_UD_TEST_J 0x01 // RW, output J when in test mode -#define R16_USB2_LPM_DATA (*((PUINT16V)0x40009006)) // RW, USB_high_speed power control register -#define USBHS_UD_LPM_BUSY 0x8000 // RW, power control busy -#define USBHS_UD_LPM_DATA 0x07FF // RO, power control data -#define R8_USB2_INT_FG (*((PUINT8V)0x40009008)) // RW, USB_high_speed interupt flag register -#define USBHS_UDIF_FIFO_OV 0x80 // RW1, clear fifo overflow interupt flag -#define USBHS_UDIF_LINK_RDY 0x40 // RW1, clear USB conect interupt flag -#define USBHS_UDIF_RX_SOF 0x20 // RW1, clear SOF package received interupt flag -#define USBHS_UDIF_TRANSFER 0x10 // RO, USB transmit end interupt flag,cleared by USBHS_UDMS_HS_MOD -#define USBHS_UDIF_LPM_ACT 0x08 // RW1, clear lpm transmit end interupt flag -#define USBHS_UDIF_BUS_SLEEP 0x04 // RW1, clear usb bus sleep interupt flag -#define USBHS_UDIF_SUSPEND 0x02 // RW1, clear usb bus suspend interupt flag -#define USBHS_UDIF_BUS_RST 0x01 // RW1, clear usb bus reset interupt flag -#define R8_USB2_INT_ST (*((PUINT8V)0x40009009)) // RW, USB_high_speed interupt status register -#define USBHS_UDIS_EP_DIR 0x10 // RO, end point tranfer diector of data -#define USBHS_UDIS_EP_ID_MASK 0x07 // RO, number of end point which data transmission occured -#define R8_USB2_MIS_ST (*((PUINT8V)0x4000900A)) // RW, USB_high_speed miscellaneous register -#define USBHS_UDMS_HS_MOD 0x80 // RO, host with high speed -#define USBHS_UDMS_SUSP_REQ 0x10 // RO, requirment of suspending USB -#define USBHS_UDMS_SIE_FREE 0x08 // RO, USB free state -#define USBHS_UDMS_SLEEP 0x04 // RO, USB sleep state -#define USBHS_UDMS_SUSPEND 0x02 // RO, USB in suspend state -#define USBHS_UDMS_READY 0x01 // RO, USB in connected state -#define R16_USB2_FRAME_NO (*((PUINT16V)0x4000900C)) // RW, USB_high_speed frame number register -#define USBHS_UD_MFRAME_NO 0xE000 -#define USBHS_UD_FRAME_NO 0x07FF -#define R16_USB2_BUS (*((PUINT16V)0x4000900E)) // RW, USB_high_speed bus status register -#define USBHS_USB_DM_ST 0x08 -#define USBHS_USB_DP_ST 0x04 -#define USB_WAKEUP 0x01 -#define R16_U2EP_TX_EN (*((PUINT16V)0x40009010)) // RW, USB_high_speed end point transmit enable register -/* Bit definition for R16_U2EP_TX_EN & R16_U2EP_RX_EN register */ -#define RB_EP0_EN 0x0001 -#define RB_EP1_EN 0x0002 -#define RB_EP2_EN 0x0004 -#define RB_EP3_EN 0x0008 -#define RB_EP4_EN 0x0010 -#define RB_EP5_EN 0x0020 -#define RB_EP6_EN 0x0040 -#define RB_EP7_EN 0x0080 -#define RB_EP8_EN 0x0100 -#define RB_EP9_EN 0x0200 -#define RB_EP10_EN 0x0400 -#define RB_EP11_EN 0x0800 -#define RB_EP12_EN 0x1000 -#define RB_EP13_EN 0x2000 -#define RB_EP14_EN 0x4000 -#define RB_EP15_EN 0x8000 - -#define R16_U2EP_RX_EN (*((PUINT16V)0x40009012)) // RW, USB_high_speed end point receive enableregister -#define USBHS_UEP_RX_EN 0xFFFF -#define R16_U2EP_T_TOG_AUTO (*((PUINT16V)0x40009014)) // RW, USB_high_speed end point transmit auto toggle enable register -#define USBHS_UEP_T_TOG_AUTO 0xFF -#define R16_U2EP_R_TOG_AUTO (*((PUINT16V)0x40009016)) // RW, USB_high_speed end point receive auto toggle enable register -#define USBHS_UEP_R_TOG_AUTO 0xFF -#define R8_U2EP_T_BURST (*((PUINT8V)0x40009018)) // RW, USB_high_speed end point transmit burst register -#define USBHS_UEP_T_BURST_EN 0xFF -#define R8_U2EP_T_BURST_MODE (*((PUINT8V)0x40009019)) // RW, USB_high_speed end point transmit burst mode register -#define USBHS_UEP_T_BURST_MODE 0xFF -#define R8_U2EP_R_BURST (*((PUINT8V)0x4000901A)) // RW, USB_high_speed end point receive burst register -#define USBHS_UEP_R_BURST_EN 0xFF -#define R8_U2EP_R_RES_MODE (*((PUINT8V)0x4000901B)) // RW, USB_high_speed end point transmit reply mode register -#define USBHS_UEP_R_RES_MODE 0xFF -#define R32_U2EP_AF_MODE (*((PUINT32V)0x4000901C)) // RW, USB_high_speed end point multiplexing register -#define USBHS_UEP_T_AF 0xFE -#define R32_U2EP0_DMA (*((PUINT32V)0x40009020)) // RW, USB_high_speed end point0 begin adress of DMA buffer register -#define UEPn_DMA 0x01FFFF -#define R32_U2EP1_RX_DMA (*((PUINT32V)0x40009024)) // RW, USB_high_speed end point1 begin adress of DMA receive buffer register -#define R32_U2EP2_RX_DMA (*((PUINT32V)0x40009028)) // RW, USB_high_speed end point2 begin adress of DMA receive buffer register -#define R32_U2EP3_RX_DMA (*((PUINT32V)0x4000902C)) // RW, USB_high_speed end point3 begin adress of DMA receive buffer register -#define R32_U2EP4_RX_DMA (*((PUINT32V)0x40009030)) // RW, USB_high_speed end point4 begin adress of DMA receive buffer register -#define R32_U2EP5_RX_DMA (*((PUINT32V)0x40009034)) // RW, USB_high_speed end point5 begin adress of DMA receive buffer register -#define R32_U2EP6_RX_DMA (*((PUINT32V)0x40009038)) // RW, USB_high_speed end point6 begin adress of DMA receive buffer register -#define R32_U2EP7_RX_DMA (*((PUINT32V)0x4000903C)) // RW, USB_high_speed end point7 begin adress of DMA receive buffer register -#define UEPn_RX_DMA 0x01FFFF -#define R32_U2EP1_TX_DMA (*((PUINT32V)0x40009040)) // RW, USB_high_speed end point1 begin adress of DMA transmit buffer register -#define R32_U2EP2_TX_DMA (*((PUINT32V)0x40009044)) // RW, USB_high_speed end point2 begin adress of DMA transmit buffer register -#define R32_U2EP3_TX_DMA (*((PUINT32V)0x40009048)) // RW, USB_high_speed end point3 begin adress of DMA transmit buffer register -#define R32_U2EP4_TX_DMA (*((PUINT32V)0x4000904C)) // RW, USB_high_speed end point4 begin adress of DMA transmit buffer register -#define R32_U2EP5_TX_DMA (*((PUINT32V)0x40009050)) // RW, USB_high_speed end point5 begin adress of DMA transmit buffer register -#define R32_U2EP6_TX_DMA (*((PUINT32V)0x40009054)) // RW, USB_high_speed end point6 begin adress of DMA transmit buffer register -#define R32_U2EP7_TX_DMA (*((PUINT32V)0x40009058)) // RW, USB_high_speed end point7 begin adress of DMA transmit buffer register -#define UEPn_TX_DMA 0x01FFFF -#define R32_U2EP0_MAX_LEN (*((PUINT32V)0x4000905C)) // RW, USB_high_speed end point0 max length package register -#define R32_U2EP1_MAX_LEN (*((PUINT32V)0x40009060)) // RW, USB_high_speed end point1 max length package register -#define R32_U2EP2_MAX_LEN (*((PUINT32V)0x40009064)) // RW, USB_high_speed end point2 max length package register -#define R32_U2EP3_MAX_LEN (*((PUINT32V)0x40009068)) // RW, USB_high_speed end point3 max length package register -#define R32_U2EP4_MAX_LEN (*((PUINT32V)0x4000906C)) // RW, USB_high_speed end point4 max length package register -#define R32_U2EP5_MAX_LEN (*((PUINT32V)0x40009070)) // RW, USB_high_speed end point5 max length package register -#define R32_U2EP6_MAX_LEN (*((PUINT32V)0x40009074)) // RW, USB_high_speed end point6 max length package register -#define R32_U2EP7_MAX_LEN (*((PUINT32V)0x40009078)) // RW, USB_high_speed end point7 max length package register -#define UEPn_MAX_LEN 0x007F -#define R16_U2EP0_RX_LEN (*((PUINT16V)0x4000907C)) // RW, USB_high_speed end point0 length of receive register -#define UEP0_RX_LEN 0x007F -#define R16_U2EP1_RX_LEN (*((PUINT16V)0x40009080)) // RW, USB_high_speed end point1 single received length register -#define R16_U2EP1_R_SIZE (*((PUINT16V)0x40009082)) // RW, USB_high_speed end point1 total received length register -#define R16_U2EP2_RX_LEN (*((PUINT16V)0x40009084)) // RW, USB_high_speed end point2 single received length register -#define R16_U2EP2_R_SIZE (*((PUINT16V)0x40009086)) // RW, USB_high_speed end point2 total received length register -#define R16_U2EP3_RX_LEN (*((PUINT16V)0x40009088)) // RW, USB_high_speed end point3 single received length register -#define R16_U2EP3_R_SIZE (*((PUINT16V)0x4000908A)) // RW, USB_high_speed end point3 total received length register -#define R16_U2EP4_RX_LEN (*((PUINT16V)0x4000908C)) // RW, USB_high_speed end point4 single received length register -#define R16_U2EP4_R_SIZE (*((PUINT16V)0x4000908E)) // RW, USB_high_speed end point4 total received length register -#define R16_U2EP5_RX_LEN (*((PUINT16V)0x40009090)) // RW, USB_high_speed end point5 single received length register -#define R16_U2EP5_R_SIZE (*((PUINT16V)0x40009092)) // RW, USB_high_speed end point5 total received length register -#define R16_U2EP6_RX_LEN (*((PUINT16V)0x40009094)) // RW, USB_high_speed end point6 single received length register -#define R16_U2EP6_R_SIZE (*((PUINT16V)0x40009096)) // RW, USB_high_speed end point6 total received length register -#define R16_U2EP7_RX_LEN (*((PUINT16V)0x40009098)) // RW, USB_high_speed end point7 single received length register -#define R16_U2EP7_R_SIZE (*((PUINT16V)0x4000909A)) // RW, USB_high_speed end point7 total received length register -#define UEPn_RX_LEN 0xFFFF -#define UEPn_R_SIZE 0xFFFF -#define R16_U2EP0_T_LEN (*((PUINT16V)0x4000909C)) // RW, USB_high_speed end point0 length of transmission register -#define UEP0_T_LEN 0x7F -#define R8_U2EP0_TX_CTRL (*((PUINT8V)0x4000909E)) // RW, USB_high_speed end point0 transmit control register -#define R8_U2EP0_RX_CTRL (*((PUINT8V)0x4000909F)) // RW, USB_high_speed end point0 receive control register -#define R16_U2EP1_T_LEN (*((PUINT16V)0x400090A0)) // RW, USB_high_speed end point1 length of transmission register -#define R8_U2EP1_TX_CTRL (*((PUINT8V)0x400090A2)) // RW, USB_high_speed end point1 transmit control register -#define R8_U2EP1_RX_CTRL (*((PUINT8V)0x400090A3)) // RW, USB_high_speed end point1 receive control register -#define R16_U2EP2_T_LEN (*((PUINT16V)0x400090A4)) // RW, USB_high_speed end point2 length of transmission register -#define R8_U2EP2_TX_CTRL (*((PUINT8V)0x400090A6)) // RW, USB_high_speed end point2 transmit control register -#define R8_U2EP2_RX_CTRL (*((PUINT8V)0x400090A7)) // RW, USB_high_speed end point2 receive control register -#define R16_U2EP3_T_LEN (*((PUINT16V)0x400090A8)) // RW, USB_high_speed end point3 length of transmission register -#define R8_U2EP3_TX_CTRL (*((PUINT8V)0x400090AA)) // RW, USB_high_speed end point3 transmit control register -#define R8_U2EP3_RX_CTRL (*((PUINT8V)0x400090AB)) // RW, USB_high_speed end point3 receive control register -#define R16_U2EP4_T_LEN (*((PUINT16V)0x400090AC)) // RW, USB_high_speed end point4 length of transmission register -#define R8_U2EP4_TX_CTRL (*((PUINT8V)0x400090AE)) // RW, USB_high_speed end point4 transmit control register -#define R8_U2EP4_RX_CTRL (*((PUINT8V)0x400090AF)) // RW, USB_high_speed end point4 receive control register -#define R16_U2EP5_T_LEN (*((PUINT16V)0x400090B0)) // RW, USB_high_speed end point5 length of transmission register -#define R8_U2EP5_TX_CTRL (*((PUINT8V)0x400090B2)) // RW, USB_high_speed end point5 transmit control register -#define R8_U2EP5_RX_CTRL (*((PUINT8V)0x400090B3)) // RW, USB_high_speed end point5 receive control register -#define R16_U2EP6_T_LEN (*((PUINT16V)0x400090B4)) // RW, USB_high_speed end point6 length of transmission register -#define R8_U2EP6_TX_CTRL (*((PUINT8V)0x400090B6)) // RW, USB_high_speed end point6 transmit control register -#define R8_U2EP6_RX_CTRL (*((PUINT8V)0x400090B7)) // RW, USB_high_speed end point6 receive control register -#define R16_U2EP7_T_LEN (*((PUINT16V)0x400090B8)) // RW, USB_high_speed end point7 length of transmission register -#define R8_U2EP7_TX_CTRL (*((PUINT8V)0x400090BA)) // RW, USB_high_speed end point7 transmit control register -#define R8_U2EP7_RX_CTRL (*((PUINT8V)0x400090BB)) // RW, USB_high_speed end point7 receive control register -/**R16_UEPn_T_LEN**/ -#define UEPn_T_LEN 0xFFFF -/**R8_UEPn_TX_CTRL**/ -#define USBHS_UEP_T_DONE 0x80 -#define USBHS_UEP_T_NAK_ACT 0x40 -#define USBHS_UEP_T_TOG_MASK 0x0C -#define USBHS_UEP_T_TOG_MDATA 0x0C -#define USBHS_UEP_T_TOG_DATA2 0x08 -#define USBHS_UEP_T_TOG_DATA1 0x04 -#define USBHS_UEP_T_TOG_DATA0 0x00 -#define USBHS_UEP_T_RES_MASK 0x03 -#define USBHS_UEP_T_RES_ACK 0x02 -#define USBHS_UEP_T_RES_STALL 0x01 -#define USBHS_UEP_T_RES_NAK 0x00 - -/**R8_UEPn_RX_CTRL**/ -#define USBHS_UEP_R_DONE 0x80 -#define USBHS_UEP_R_NAK_ACT 0x40 -#define USBHS_UEP_R_NAK_TOG 0x20 -#define USBHS_UEP_R_TOG_MATCH 0x10 -#define USBHS_UEP_R_SETUP_IS 0x08 -#define USBHS_UEP_R_TOG_MASK 0x0C -#define USBHS_UEP_R_TOG_MDATA 0x0C -#define USBHS_UEP_R_TOG_DATA2 0x08 -#define USBHS_UEP_R_TOG_DATA1 0x04 -#define USBHS_UEP_R_TOG_DATA0 0x00 -#define USBHS_UEP_R_RES_MASK 0x03 -#define USBHS_UEP_R_RES_ACK 0x02 -#define USBHS_UEP_R_RES_STALL 0x01 -#define USBHS_UEP_R_RES_NAK 0x00 - -#define R16_U2EP_T_ISO (*((PUINT16V)0x400090BC)) // RW, USB_high_speed end point transmit sync mode register -#define USBHS_UEP1_T_ISO_EN 0x02 -#define USBHS_UEP2_T_ISO_EN 0x04 -#define USBHS_UEP3_T_ISO_EN 0x08 -#define USBHS_UEP4_T_ISO_EN 0x10 -#define USBHS_UEP5_T_ISO_EN 0x20 -#define USBHS_UEP6_T_ISO_EN 0x40 -#define USBHS_UEP7_T_ISO_EN 0x80 -#define R16_U2EP_R_ISO (*((PUINT16V)0x400090BE)) // RW, USB_high_speed end point receive sync mode register -#define USBHS_UEP1_R_ISO_EN 0x02 -#define USBHS_UEP2_R_ISO_EN 0x04 -#define USBHS_UEP3_R_ISO_EN 0x08 -#define USBHS_UEP4_R_ISO_EN 0x10 -#define USBHS_UEP5_R_ISO_EN 0x20 -#define USBHS_UEP6_R_ISO_EN 0x40 -#define USBHS_UEP7_R_ISO_EN 0x80 - -/* USB high speed host register */ -#define R8_U2H_CFG (*((PUINT8V)0x40009100)) // RW, USB_high_speed register -#define USBHS_UH_LPM_EN 0x80 -#define USBHS_UH_FORCE_FS 0x40 -#define USBHS_UH_SOF_EN 0x20 -#define USBHS_UH_DMA_EN 0x10 -#define USBHS_UH_PHY_SUSPENDM 0x08 -#define USBHS_UH_CLR_ALL 0x04 -#define USBHS_RST_SIE 0x02 -#define USBHS_RST_LINK 0x01 -#define R8_U2H_INT_EN (*((PUINT8V)0x40009102)) // RW, USB_high_speed register -#define USBHS_UHIE_FIFO_OVER 0x80 -#define USBHS_UHIE_TX_HALT 0x40 -#define USBHS_UHIE_SOF_ACT 0x20 -#define USBHS_UHIE_TRANSFER 0x10 -#define USBHS_UHIE_RESUME_ACT 0x08 -#define USBHS_UHIE_WKUP_ACT 0x04 -#define R8_U2H_DEV_AD (*((PUINT8V)0x40009103)) // RW, USB_high_speed register -#define USBHS_UH_DEV_ADDR 0xFF -#define R32_U2H_CONTROL (*((PUINT32V)0x40009104)) // RW, USB_high_speed register -#define USBHS_UH_RX_NO_RES 0x800000 -#define USBHS_UH_TX_NO_RES 0x400000 -#define USBHS_UH_RX_NO_DATA 0x200000 -#define USBHS_UH_TX_NO_DATA 0x100000 -#define USBHS_UH_PRE_PID_EN 0x080000 -#define USBHS_UH_SPLIT_VALID 0x040000 -#define USBHS_UH_LPM_VALID 0x020000 -#define USBHS_UH_HOST_ACTION 0x010000 -#define USBHS_UH_BUF_MODE 0x0400 -#define USBHS_UH_T_TOG_MASK 0x0300 -#define USBHS_UH_T_TOG_MDATA 0x0300 -#define USBHS_UH_T_TOG_DATA2 0x0200 -#define USBHS_UH_T_TOG_DATA1 0x0100 -#define USBHS_UH_T_TOG_DATA0 0x0000 -#define USBHS_UH_T_ENDP_MASK 0xF0 -#define USBHS_UH_T_TOKEN_MASK 0x0F - -#define R8_U2H_INT_FLAG (*((PUINT8V)0x40009108)) // RW, USB_high_speed register -#define USBHS_UHIF_FIFO_OVER 0x80 -#define USBHS_UHIF_TX_HALT 0x40 -#define USBHS_UHIF_SOF_ACT 0x20 -#define USBHS_UHIF_TRANSFER 0x10 -#define USBHS_UHIF_RESUME_ACT 0x08 -#define USBHS_UHIF_WKUP_ACT 0x04 -#define R8_U2H_INT_ST (*((PUINT8V)0x40009109)) // RW, USB_high_speed register -#define USBHS_UHIF_PORT_RX_RESUME 0x10 -#define USBHS_UH_R_TOKEN_MASK 0x0F -#define R8_U2H_MIS_ST (*((PUINT8V)0x4000910A)) // RW, USB_high_speed register -#define USBHS_UHMS_BUS_SE0 0x80 -#define USBHS_UHMS_BUS_J 0x40 -#define USBHS_UHMS_LINESTATE 0x30 -#define USBHS_UHMS_USB_WAKEUP 0x08 -#define USBHS_UHMS_SOF_ACT 0x04 -#define USBHS_UHMS_SOF_PRE 0x02 -#define USBHS_UHMS_SOF_FREE 0x01 -#define R32_U2H_LPM_DATA (*((PUINT32V)0x4000910C)) // RW, USB_high_speed register -#define USBHS_UH_LPM_DATA 0x07FF -#define R32_U2H_SPLIT_DATA (*((PUINT32V)0x40009110)) // RW, USB_high_speed register -#define USBHS_UH_SPLIT_DATA 0x07FFFF -#define R32_U2H_FRAME (*((PUINT32V)0x40009114)) // RW, USB_high_speed register -#define USBHS_UH_SOF_CNT_CLR 0x02000000 -#define USBHS_UH_SOF_CNT_EN 0x01000000 -#define USBHS_UH_MFRAME_NO 0x070000 -#define USBHS_UH_FRAME_NO 0x07FF -#define R32_U2H_TX_LEN (*((PUINT32V)0x40009118)) // RW, USB_high_speed register -#define USBHS_UH_TX_LEN 0x07FF -#define R32_U2H_RX_LEN (*((PUINT32V)0x4000911C)) // RW, USB_high_speed register -#define USBHS_UH_RX_LEN 0x07FF -#define R32_U2H_RX_MAX_LEN (*((PUINT32V)0x40009120)) // RW, USB_high_speed register -#define USBHS_UH_RX_MAX_LEN 0x07FF -#define R32_U2H_RX_DMA (*((PUINT32V)0x40009124)) // RW, USB_high_speed register -#define USBHS_R32_UH_RX_DMA 0x01FFFF -#define R32_U2H_TX_DMA (*((PUINT32V)0x40009128)) // RW, USB_high_speed register -#define USBHS_R32_UH_TX_DMA 0x01FFFF -#define R32_U2H_PORT_CTRL (*((PUINT32V)0x4000912C)) // RW, USB_high_speed register -#define USBHS_UH_BUS_RST_LONG 0x010000 -#define USBHS_UH_PORT_SLEEP_BESL 0xF000 -#define USBHS_UH_CLR_PORT_SLEEP 0x0100 -#define USBHS_UH_CLR_PORT_CONNECT 0x20 -#define USBHS_UH_CLR_PORT_EN 0x10 -#define USBHS_UH_SET_PORT_SLEEP 0x08 -#define USBHS_UH_CLR_PORT_SUSP 0x04 -#define USBHS_UH_SET_PORT_SUSP 0x02 -#define USBHS_UH_SET_PORT_RESET 0x01 -#define R8_U2H_PORT_CFG (*((PUINT8V)0x40009130)) // RW, USB_high_speed register -#define USBHS_UH_PD_EN 0x80 -#define USBHS_UH_HOST_EN 0x01 -#define R8_U2H_PORT_INT_EN (*((PUINT8V)0x40009132)) // RW, USB_high_speed register -#define USBHS_UHIE_PORT_SLP 0x20 -#define USBHS_UHIE_PORT_RESET 0x10 -#define USBHS_UHIE_PORT_SUSP 0x04 -#define USBHS_UHIE_PORT_EN 0x02 -#define USBHS_UHIE_PORT_CONNECT 0x01 -#define R8_U2H_PORT_TEST_CT (*((PUINT8V)0x40009133)) // RW, USB_high_speed register -#define USBHS_UH_TEST_FORCE_EN 0x04 -#define USBHS_UH_TEST_K 0x02 -#define USBHS_UH_TEST_J 0x01 -#define R16_U2H_PORT_ST (*((PUINT16V)0x40009134)) // RW, USB_high_speed register -#define USBHS_UHIS_PORT_TEST 0x0800 -#define USBHS_UHIS_PORT_SPEED_MASK 0x0600 -#define USBHS_UHIS_PORT_HS 0x0400 -#define USBHS_UHIS_PORT_LS 0x0200 -#define USBHS_UHIS_PORT_FS 0x0000 -#define USBHS_UHIS_PORT_SLP 0x20 -#define USBHS_UHIS_PORT_RST 0x10 -#define USBHS_UHIS_PORT_SUSP 0x04 -#define USBHS_UHIS_PORT_EN 0x02 -#define USBHS_UHIS_PORT_CONNECT 0x01 -#define R8_U2H_PORT_CHG (*((PUINT8V)0x40009136)) -#define USBHS_UHIF_PORT_SLP 0x20 -#define USBHS_UHIF_PORT_RESET 0x10 -#define USBHS_UHIF_PORT_SUSP 0x04 -#define USBHS_UHIF_PORT_EN 0x02 -#define USBHS_UHIF_PORT_CONNECT 0x01 -#define R32_U2H_BC_CTRL (*((PUINT32V)0x4000913C)) -#define UDM_VSRC_ACT 0x0400 -#define UDM_BC_VSRC 0x0200 -#define UDP_BC_VSRC 0x0100 -#define BC_AUTO_MODE 0x40 -#define UDM_BC_CMPE 0x20 -#define UDP_BC_CMPE 0x10 -#define UDM_BC_CMPO 0x02 -#define UDP_BC_CMPO 0x01 -#define R8_USBHS_PLL_CTRL (*((PUINT8V)0x40009200)) -#define USBHS_PLL_EN 0x04 -#define USBHS_PLL_LOWPOW 0x02 -#define USBHS_PLL_CKSEL 0x01 - -#define __IO volatile /* defines 'read / write' permissions */ - -typedef struct -{ - __IO uint8_t CONTROL; /* 0x40009000 */ - __IO uint8_t BASE_MODE; /* 0x40009001 */ - __IO uint8_t INT_EN; /* 0x40009002 */ - __IO uint8_t DEV_AD; /* 0x40009003 */ - __IO uint8_t WAKE_CTRL; /* 0x40009004 远程唤醒寄存器 */ - __IO uint8_t TEST_MODE; /* 0x40009005 测试模式寄存器 */ - __IO uint16_t LPM_DATA; /* 0x40009006 */ - __IO uint8_t INT_FG; /* 0x40009008 */ - __IO uint8_t INT_ST; /* 0x40009009 */ - __IO uint8_t MIS_ST; /* 0x4000900a */ - __IO uint8_t RESERVE0; /* 0x4000900b */ - __IO uint16_t FRAME_NO; /* 0x4000900c */ - __IO uint16_t USB_BUS; /* 0x4000900e */ - __IO uint16_t UEP_TX_EN; /* 0x40009010 */ - __IO uint16_t UEP_RX_EN; /* 0x40009012 */ - - __IO uint16_t UEP_T_TOG_AUTO; /* 0x40009014 */ - __IO uint16_t UEP_R_TOG_AUTO; /* 0x40009016 */ - __IO uint8_t UEP_T_BURST; /* 0x40009018 */ - __IO uint8_t UEP_T_BURST_MODE; /* 0x40009019 */ - __IO uint8_t UEP_R_BURST; /* 0x4000901a */ - __IO uint8_t UEP_R_RES_MODE; /* 0x4000901b */ - __IO uint32_t UEP_AF_MODE; /* 0x4000901c */ - - __IO uint32_t UEP0_DMA; /* 0x40009020 */ - __IO uint32_t UEP1_RX_DMA; /* 0x40009024 */ - __IO uint32_t UEP2_RX_DMA; /* 0x40009028 */ - __IO uint32_t UEP3_RX_DMA; /* 0x4000902c */ - __IO uint32_t UEP4_RX_DMA; /* 0x40009030 */ - __IO uint32_t UEP5_RX_DMA; /* 0x40009034 */ - __IO uint32_t UEP6_RX_DMA; /* 0x40009038 */ - __IO uint32_t UEP7_RX_DMA; /* 0x4000903c */ - - __IO uint32_t UEP1_TX_DMA; /* 0x40009040 */ - __IO uint32_t UEP2_TX_DMA; /* 0x40009044 */ - __IO uint32_t UEP3_TX_DMA; /* 0x40009048 */ - __IO uint32_t UEP4_TX_DMA; /* 0x4000904c */ - __IO uint32_t UEP5_TX_DMA; /* 0x40009050 */ - __IO uint32_t UEP6_TX_DMA; /* 0x40009054 */ - __IO uint32_t UEP7_TX_DMA; /* 0x40009058 */ - - __IO uint32_t UEP0_MAX_LEN; /* 0x4000905c */ - __IO uint32_t UEP1_MAX_LEN; /* 0x40009060 */ - __IO uint32_t UEP2_MAX_LEN; /* 0x40009064 */ - __IO uint32_t UEP3_MAX_LEN; /* 0x40009068 */ - __IO uint32_t UEP4_MAX_LEN; /* 0x4000906c */ - __IO uint32_t UEP5_MAX_LEN; /* 0x40009070 */ - __IO uint32_t UEP6_MAX_LEN; /* 0x40009074 */ - __IO uint32_t UEP7_MAX_LEN; /* 0x40009078 */ - - __IO uint16_t USB_EP0_RX_LEN; /* 0x4000907c */ - __IO uint16_t RESERVE1; /* 0x4000907e */ - __IO uint16_t UEP1_RX_LEN; /* 0x40009080 */ - __IO uint16_t UEP1_R_SIZE; /* 0x40009082 */ - __IO uint16_t UEP2_RX_LEN; /* 0x40009084 */ - __IO uint16_t UEP2_R_SIZE; /* 0x40009086 */ - __IO uint16_t UEP3_RX_LEN; /* 0x40009088 */ - __IO uint16_t UEP3_R_SIZE; /* 0x4000908a */ - __IO uint16_t UEP4_RX_LEN; /* 0x4000908c */ - __IO uint16_t UEP4_R_SIZE; /* 0x4000908e */ - __IO uint16_t UEP5_RX_LEN; /* 0x40009090 */ - __IO uint16_t UEP5_R_SIZE; /* 0x40009092 */ - __IO uint16_t UEP6_RX_LEN; /* 0x40009094 */ - __IO uint16_t UEP6_R_SIZE; /* 0x40009096 */ - __IO uint16_t UEP7_RX_LEN; /* 0x40009098 */ - __IO uint16_t UEP7_R_SIZE; /* 0x4000909a */ - - __IO uint16_t UEP0_TX_LEN; /* 0x4000909c */ - __IO uint8_t UEP0_TX_CTRL; /* 0x4000909e */ - __IO uint8_t UEP0_RX_CTRL; /* 0x4000909f */ - __IO uint16_t UEP1_TX_LEN; /* 0x400090a0 */ - __IO uint8_t UEP1_TX_CTRL; /* 0x400090a2 */ - __IO uint8_t UEP1_RX_CTRL; /* 0x400090a3 */ - __IO uint16_t UEP2_TX_LEN; /* 0x400090a4 */ - __IO uint8_t UEP2_TX_CTRL; /* 0x400090a6 */ - __IO uint8_t UEP2_RX_CTRL; /* 0x400090a7 */ - __IO uint16_t UEP3_TX_LEN; /* 0x400090a8 */ - __IO uint8_t UEP3_TX_CTRL; /* 0x400090aa */ - __IO uint8_t UEP3_RX_CTRL; /* 0x400090ab */ - __IO uint16_t UEP4_TX_LEN; /* 0x400090ac */ - __IO uint8_t UEP4_TX_CTRL; /* 0x400090ae */ - __IO uint8_t UEP4_RX_CTRL; /* 0x400090af */ - __IO uint16_t UEP5_TX_LEN; /* 0x400090b0 */ - __IO uint8_t UEP5_TX_CTRL; /* 0x400090b2 */ - __IO uint8_t UEP5_RX_CTRL; /* 0x400090b3 */ - __IO uint16_t UEP6_TX_LEN; /* 0x400090b4 */ - __IO uint8_t UEP6_TX_CTRL; /* 0x400090b6 */ - __IO uint8_t UEP6_RX_CTRL; /* 0x400090b7 */ - __IO uint16_t UEP7_TX_LEN; /* 0x400090b8 */ - __IO uint8_t UEP7_TX_CTRL; /* 0x400090ba */ - __IO uint8_t UEP7_RX_CTRL; /* 0x400090bb */ - __IO uint16_t UEP_TX_ISO; /* 0x400090bc */ - __IO uint16_t UEP_RX_ISO; /* 0x400090be */ -} USBHSD_TypeDef; \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/ch32/usb_ch32_usbfs_reg.h b/components/drivers/usb/cherryusb/port/ch32/usb_ch32_usbfs_reg.h deleted file mode 100644 index 34a960725fa..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/usb_ch32_usbfs_reg.h +++ /dev/null @@ -1,409 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef _USB_CH32_USBFS_REG_H -#define _USB_CH32_USBFS_REG_H - -#define __IO volatile /* defines 'read / write' permissions */ - -/* USBOTG_FS Registers */ -typedef struct -{ - __IO uint8_t BASE_CTRL; - __IO uint8_t UDEV_CTRL; - __IO uint8_t INT_EN; - __IO uint8_t DEV_ADDR; - __IO uint8_t Reserve0; - __IO uint8_t MIS_ST; - __IO uint8_t INT_FG; - __IO uint8_t INT_ST; - __IO uint16_t RX_LEN; - __IO uint16_t Reserve1; - __IO uint8_t UEP4_1_MOD; - __IO uint8_t UEP2_3_MOD; - __IO uint8_t UEP5_6_MOD; - __IO uint8_t UEP7_MOD; - __IO uint32_t UEP0_DMA; - __IO uint32_t UEP1_DMA; - __IO uint32_t UEP2_DMA; - __IO uint32_t UEP3_DMA; - __IO uint32_t UEP4_DMA; - __IO uint32_t UEP5_DMA; - __IO uint32_t UEP6_DMA; - __IO uint32_t UEP7_DMA; - __IO uint16_t UEP0_TX_LEN; - __IO uint8_t UEP0_TX_CTRL; - __IO uint8_t UEP0_RX_CTRL; - __IO uint16_t UEP1_TX_LEN; - __IO uint8_t UEP1_TX_CTRL; - __IO uint8_t UEP1_RX_CTRL; - __IO uint16_t UEP2_TX_LEN; - __IO uint8_t UEP2_TX_CTRL; - __IO uint8_t UEP2_RX_CTRL; - __IO uint16_t UEP3_TX_LEN; - __IO uint8_t UEP3_TX_CTRL; - __IO uint8_t UEP3_RX_CTRL; - __IO uint16_t UEP4_TX_LEN; - __IO uint8_t UEP4_TX_CTRL; - __IO uint8_t UEP4_RX_CTRL; - __IO uint16_t UEP5_TX_LEN; - __IO uint8_t UEP5_TX_CTRL; - __IO uint8_t UEP5_RX_CTRL; - __IO uint16_t UEP6_TX_LEN; - __IO uint8_t UEP6_TX_CTRL; - __IO uint8_t UEP6_RX_CTRL; - __IO uint16_t UEP7_TX_LEN; - __IO uint8_t UEP7_TX_CTRL; - __IO uint8_t UEP7_RX_CTRL; - __IO uint32_t Reserve2; - __IO uint32_t OTG_CR; - __IO uint32_t OTG_SR; -} USBOTG_FS_TypeDef; - -typedef struct __attribute__((packed)) { - __IO uint8_t BASE_CTRL; - __IO uint8_t HOST_CTRL; - __IO uint8_t INT_EN; - __IO uint8_t DEV_ADDR; - __IO uint8_t Reserve0; - __IO uint8_t MIS_ST; - __IO uint8_t INT_FG; - __IO uint8_t INT_ST; - __IO uint16_t RX_LEN; - __IO uint16_t Reserve1; - __IO uint8_t Reserve2; - __IO uint8_t HOST_EP_MOD; - __IO uint16_t Reserve3; - __IO uint32_t Reserve4; - __IO uint32_t Reserve5; - __IO uint32_t HOST_RX_DMA; - __IO uint32_t HOST_TX_DMA; - __IO uint32_t Reserve6; - __IO uint32_t Reserve7; - __IO uint32_t Reserve8; - __IO uint32_t Reserve9; - __IO uint32_t Reserve10; - __IO uint16_t Reserve11; - __IO uint16_t HOST_SETUP; - __IO uint8_t HOST_EP_PID; - __IO uint8_t Reserve12; - __IO uint8_t Reserve13; - __IO uint8_t HOST_RX_CTRL; - __IO uint16_t HOST_TX_LEN; - __IO uint8_t HOST_TX_CTRL; - __IO uint8_t Reserve14; - __IO uint32_t Reserve15; - __IO uint32_t Reserve16; - __IO uint32_t Reserve17; - __IO uint32_t Reserve18; - __IO uint32_t Reserve19; - __IO uint32_t OTG_CR; - __IO uint32_t OTG_SR; -} USBOTGH_FS_TypeDef; - -typedef struct -{ - __IO uint8_t BASE_CTRL; /*!< 0x40008000 */ - __IO uint8_t HOST_CTRL; /*!< 0x40008001 */ - __IO uint8_t INT_EN; /*!< 0x40008002 */ - __IO uint8_t DEV_ADDR; /*!< 0x40008003 */ - __IO uint8_t USB_STATUS0; /*!< 0x40008004 */ - __IO uint8_t MIS_ST; /*!< 0x40008005 */ - __IO uint8_t INT_FG; /*!< 0x40008006 */ - __IO uint8_t INT_ST; /*!< 0x40008007 */ - __IO uint8_t RX_LEN; /*!< 0x40008008 */ - __IO uint8_t Reserve1; /*!< 0x40008009 */ - __IO uint8_t Reserve2; /*!< 0x4000800a */ - __IO uint8_t Reserve3; /*!< 0x4000800b */ - __IO uint8_t UEP4_1_MOD; /*!< 0x4000800c */ - __IO uint8_t HOST_EP_MOD; /*!< 0x4000800d */ - __IO uint8_t UEP567_MOD; /*!< 0x4000800e */ - __IO uint8_t Reserve4; /*!< 0x4000800f */ - __IO uint16_t UEP0_DMA; /*!< 0x40008010 */ - __IO uint16_t Reserve5; /*!< 0x40008012 */ - __IO uint16_t UEP1_DMA; /*!< 0x40008014 */ - __IO uint16_t Reserve6; /*!< 0x40008016 */ - __IO uint16_t HOST_RX_DMA; /*!< 0x40008018 */ - __IO uint16_t Reserve7; /*!< 0x4000801a */ - __IO uint16_t HOST_TX_DMA; /*!< 0x4000801c */ - __IO uint16_t Reserve8; /*!< 0x4000801e */ - __IO uint8_t UEP0_T_LEN; /*!< 0x40008020 */ - __IO uint8_t Reserve9; /*!< 0x40008021 */ - __IO uint8_t UEP0_CTRL; /*!< 0x40008022 */ - __IO uint8_t Reserve10; /*!< 0x40008023 */ - __IO uint8_t UEP1_T_LEN; /*!< 0x40008024 */ - __IO uint8_t Reserve11; /*!< 0x40008025 */ - __IO uint8_t HOST_SETUP; /*!< 0x40008026 */ - __IO uint8_t Reserve12; /*!< 0x40008027 */ - __IO uint8_t HOST_EP_PID; /*!< 0x40008028 */ - __IO uint8_t Reserve13; /*!< 0x40008029 */ - __IO uint8_t HOST_RX_CTRL; /*!< 0x4000802a */ - __IO uint8_t Reserve14; /*!< 0x4000802b */ - __IO uint8_t HOST_TX_LEN; /*!< 0x4000802c */ - __IO uint8_t Reserve15; /*!< 0x4000802d */ - __IO uint8_t HOST_TX_CTRL; /*!< 0x4000802e */ - __IO uint8_t Reserve16; /*!< 0x4000802f */ - __IO uint8_t UEP4_T_LEN; /*!< 0x40008030 */ - __IO uint8_t Reserve17; /*!< 0x40008031 */ - __IO uint8_t UEP4_CTRL; /*!< 0x40008032 */ - __IO uint8_t Reserve18[33]; /*!< 0x40008033 */ - __IO uint16_t UEP5_DMA; /*!< 0x40008054 */ - __IO uint16_t Reserve19; /*!< 0x40008056 */ - __IO uint16_t UEP6_DMA; /*!< 0x40008058 */ - __IO uint16_t Reserve20; /*!< 0x4000805a */ - __IO uint16_t UEP7_DMA; /*!< 0x4000805c */ - __IO uint8_t Reserve21[6]; /*!< 0x4000805e */ - __IO uint8_t UEP5_T_LEN; /*!< 0x40008064 */ - __IO uint8_t Reserve22; /*!< 0x40008065 */ - __IO uint8_t UEP5_CTRL; /*!< 0x40008066 */ - __IO uint8_t Reserve23; /*!< 0x40008067 */ - __IO uint8_t UEP6_T_LEN; /*!< 0x40008068 */ - __IO uint8_t Reserve24; /*!< 0x40008069 */ - __IO uint8_t UEP6_CTRL; /*!< 0x4000806a */ - __IO uint8_t Reserve25; /*!< 0x4000806b */ - __IO uint8_t UEP7_T_LEN; /*!< 0x4000806c */ - __IO uint8_t Reserve26; /*!< 0x4000806d */ - __IO uint8_t UEP7_CTRL; /*!< 0x4000806e */ -} USB_FS_TypeDef; - -#define USBFS_BASE ((uint32_t)0x50000000) - -#define USBFS_DEVICE ((USBOTG_FS_TypeDef *)USBFS_BASE) -#define USBFS_HOST ((USBOTGH_FS_TypeDef *)USBFS_BASE) - -/******************* GLOBAL ******************/ - -/* BASE USB_CTRL */ -#define USBFS_BASE_CTRL_OFFSET 0x00 // USB base control -#define USBFS_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode -#define USBFS_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps -#define USBFS_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable -#define USBFS_UC_SYS_CTRL1 0x20 // USB system control high bit -#define USBFS_UC_SYS_CTRL0 0x10 // USB system control low bit -#define USBFS_UC_SYS_CTRL_MASK 0x30 // bit mask of USB system control -// UC_HOST_MODE & UC_SYS_CTRL1 & UC_SYS_CTRL0: USB system control -// 0 00: disable USB device and disable internal pullup resistance -// 0 01: enable USB device and disable internal pullup resistance, need external pullup resistance -// 0 1x: enable USB device and enable internal pullup resistance -// 1 00: enable USB host and normal status -// 1 01: enable USB host and force UDP/UDM output SE0 state -// 1 10: enable USB host and force UDP/UDM output J state -// 1 11: enable USB host and force UDP/UDM output resume or K state -#define USBFS_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid -#define USBFS_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear -#define USBFS_UC_CLR_ALL 0x02 // force clear FIFO and count of USB -#define USBFS_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB - -/* USB INT EN */ -#define USBFS_INT_EN_OFFSET 0x02 -#define USBFS_UIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode -#define USBFS_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode -#define USBFS_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow -#define USBFS_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode -#define USBFS_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event -#define USBFS_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion -#define USBFS_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode -#define USBFS_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode -/* USB_DEV_ADDR */ -#define USBFS_DEV_ADDR_OFFSET 0x03 -#define USBFS_UDA_GP_BIT 0x80 // general purpose bit -#define USBFS_USB_ADDR_MASK 0x7F // bit mask for USB device address - -/* USB_STATUS */ -#define USBFS_USB_STATUS_OFFSET 0x04 - -/* USB_MIS_ST */ -#define USBFS_MIS_ST_OFFSET 0x05 -#define USBFS_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status -#define USBFS_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host -#define USBFS_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status -#define USBFS_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty) -#define USBFS_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status -#define USBFS_UMS_SUSPEND 0x04 // RO, indicate USB suspend status -#define USBFS_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host -#define USBFS_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host - -/* USB_INT_FG */ -#define USBFS_INT_FG_OFFSET 0x06 -#define USBFS_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received -#define USBFS_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK -#define USBFS_U_SIE_FREE 0x20 // RO, indicate USB SIE free status -#define USBFS_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear -#define USBFS_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear -#define USBFS_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear -#define USBFS_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear -#define USBFS_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear -#define USBFS_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear - -/* USB_INT_ST */ -#define USBFS_INT_ST_OFFSET 0x07 -#define USBFS_UIS_IS_SETUP 0x80 // RO, indicate current USB transfer is setup received for USB device mode -#define USBFS_UIS_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received for USB device mode -#define USBFS_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK -#define USBFS_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode -#define USBFS_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode -#define USBFS_UIS_TOKEN_MASK 0x30 // RO, bit mask of current token PID code received for USB device mode -#define USBFS_UIS_TOKEN_OUT 0x00 -#define USBFS_UIS_TOKEN_SOF 0x10 -#define USBFS_UIS_TOKEN_IN 0x20 -#define USBFS_UIS_TOKEN_SETUP 0x30 -// UIS_TOKEN1 & UIS_TOKEN0: current token PID code received for USB device mode -// 00: OUT token PID received -// 01: SOF token PID received -// 10: IN token PID received -// 11: SETUP token PID received -#define USBFS_UIS_ENDP_MASK 0x0F // RO, bit mask of current transfer endpoint number for USB device mode -/* USB_RX_LEN */ -#define USBFS_RX_LEN_OFFSET 0x08 - -/******************* DEVICE ******************/ - -/* UDEV_CTRL */ -#define USBFS_UDEV_CTRL_OFFSET 0x01 -#define USBFS_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable -#define USBFS_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level -#define USBFS_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level -#define USBFS_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed -#define USBFS_UD_GP_BIT 0x02 // general purpose bit -#define USBFS_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable - -/* UEP4_1_MOD */ -#define USBFS_UEP4_1_MOD_OFFSET 0x0C -#define USBFS_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT) -#define USBFS_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN) -#define USBFS_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1 -// UEPn_RX_EN & UEPn_TX_EN & UEPn_BUF_MOD: USB endpoint 1/2/3 buffer mode, buffer start address is UEPn_DMA -// 0 0 x: disable endpoint and disable buffer -// 1 0 0: 64 bytes buffer for receiving (OUT endpoint) -// 1 0 1: dual 64 bytes buffer by toggle bit bUEP_R_TOG selection for receiving (OUT endpoint), total=128bytes -// 0 1 0: 64 bytes buffer for transmittal (IN endpoint) -// 0 1 1: dual 64 bytes buffer by toggle bit bUEP_T_TOG selection for transmittal (IN endpoint), total=128bytes -// 1 1 0: 64 bytes buffer for receiving (OUT endpoint) + 64 bytes buffer for transmittal (IN endpoint), total=128bytes -// 1 1 1: dual 64 bytes buffer by bUEP_R_TOG selection for receiving (OUT endpoint) + dual 64 bytes buffer by bUEP_T_TOG selection for transmittal (IN endpoint), total=256bytes -#define USBFS_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT) -#define USBFS_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN) -// UEP4_RX_EN & UEP4_TX_EN: USB endpoint 4 buffer mode, buffer start address is UEP0_DMA -// 0 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) -// 1 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 receiving (OUT endpoint), total=128bytes -// 0 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=128bytes -// 1 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) -// + 64 bytes buffer for endpoint 4 receiving (OUT endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=192bytes - -/* UEP2_3_MOD */ -#define USBFS_UEP2_3_MOD_OFFSET 0x0D -#define USBFS_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT) -#define USBFS_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN) -#define USBFS_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3 -#define USBFS_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT) -#define USBFS_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN) -#define USBFS_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2 - -/* UEP5_6_MOD */ -#define USBFS_UEP5_6_MOD_OFFSET 0x0E -#define USBFS_UEP6_RX_EN 0x80 // enable USB endpoint 6 receiving (OUT) -#define USBFS_UEP6_TX_EN 0x40 // enable USB endpoint 6 transmittal (IN) -#define USBFS_UEP6_BUF_MOD 0x10 // buffer mode of USB endpoint 6 -#define USBFS_UEP5_RX_EN 0x08 // enable USB endpoint 5 receiving (OUT) -#define USBFS_UEP5_TX_EN 0x04 // enable USB endpoint 5 transmittal (IN) -#define USBFS_UEP5_BUF_MOD 0x01 // buffer mode of USB endpoint 5 - -/* UEP7_MOD */ -#define USBFS_UEP7_MOD_OFFSET 0x0F -#define USBFS_UEP7_RX_EN 0x08 // enable USB endpoint 7 receiving (OUT) -#define USBFS_UEP7_TX_EN 0x04 // enable USB endpoint 7 transmittal (IN) -#define USBFS_UEP7_BUF_MOD 0x01 // buffer mode of USB endpoint 7 - -/* USB_DMA */ -#define USBFS_UEPx_DMA_OFFSET(n) (0x10 + 4 * (n)) // endpoint x DMA buffer address -#define USBFS_UEP0_DMA_OFFSET 0x10 // endpoint 0 DMA buffer address -#define USBFS_UEP1_DMA_OFFSET 0x14 // endpoint 1 DMA buffer address -#define USBFS_UEP2_DMA_OFFSET 0x18 // endpoint 2 DMA buffer address -#define USBFS_UEP3_DMA_OFFSET 0x1c // endpoint 3 DMA buffer address -#define USBFS_UEP4_DMA_OFFSET 0x20 // endpoint 4 DMA buffer address -#define USBFS_UEP5_DMA_OFFSET 0x24 // endpoint 5 DMA buffer address -#define USBFS_UEP6_DMA_OFFSET 0x28 // endpoint 6 DMA buffer address -#define USBFS_UEP7_DMA_OFFSET 0x2c // endpoint 7 DMA buffer address -/* USB_EP_CTRL */ -#define USBFS_UEPx_T_LEN_OFFSET(n) (0x30 + 4 * (n)) // endpoint x DMA buffer address -#define USBFS_UEPx_TX_CTRL_OFFSET(n) (0x30 + 4 * (n) + 2) // endpoint x DMA buffer address -#define USBFS_UEPx_RX_CTRL_OFFSET(n) (0x30 + 4 * (n) + 3) // endpoint x DMA buffer address - -#define USBFS_UEP_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle -#define USBFS_UEP_R_TOG 0x04 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1 -#define USBFS_UEP_T_TOG 0x04 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1 - -#define USBFS_UEP_R_RES1 0x02 // handshake response type high bit for USB endpoint X receiving (OUT) -#define USBFS_UEP_R_RES0 0x01 // handshake response type low bit for USB endpoint X receiving (OUT) -#define USBFS_UEP_R_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X receiving (OUT) -#define USBFS_UEP_R_RES_ACK 0x00 -#define USBFS_UEP_R_RES_TOUT 0x01 -#define USBFS_UEP_R_RES_NAK 0x02 -#define USBFS_UEP_R_RES_STALL 0x03 -// RB_UEP_R_RES1 & RB_UEP_R_RES0: handshake response type for USB endpoint X receiving (OUT) -// 00: ACK (ready) -// 01: no response, time out to host, for non-zero endpoint isochronous transactions -// 10: NAK (busy) -// 11: STALL (error) -#define USBFS_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN) -#define USBFS_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN) -#define USBFS_UEP_T_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN) -#define USBFS_UEP_T_RES_ACK 0x00 -#define USBFS_UEP_T_RES_TOUT 0x01 -#define USBFS_UEP_T_RES_NAK 0x02 -#define USBFS_UEP_T_RES_STALL 0x03 -// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmittal (IN) -// 00: DATA0 or DATA1 then expecting ACK (ready) -// 01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions -// 10: NAK (busy) -// 11: TALL (error) - -/******************* HOST ******************/ - -#define USBFS_UHOST_CTRL_OFFSET 0x01 // USB host physical prot control -#define USBFS_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable -#define USBFS_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level -#define USBFS_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level -#define USBFS_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed -#define USBFS_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset -#define USBFS_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached - -#define USBFS_UH_EP_MOD_OFFSET USBFS_UEP2_3_MOD_OFFSET -#define USBFS_UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal -#define USBFS_UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint -// bUH_EP_TX_EN & bUH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA -// 0 x: disable endpoint and disable buffer -// 1 0: 64 bytes buffer for transmittal (OUT endpoint) -// 1 1: dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmittal (OUT endpoint), total=128bytes -#define USBFS_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving -#define USBFS_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint -// bUH_EP_RX_EN & bUH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA -// 0 x: disable endpoint and disable buffer -// 1 0: 64 bytes buffer for receiving (IN endpoint) -// 1 1: dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receiving (IN endpoint), total=128bytes - -#define USBFS_UH_RX_DMA_OFFSET USBFS_UEPx_DMA_OFFSET(2) // host rx endpoint buffer high address -#define USBFS_UH_TX_DMA_OFFSET USBFS_UEPx_DMA_OFFSET(3) // host tx endpoint buffer high address - -#define USBFS_UH_SETUP_OFFSET USBFS_UEPx_TX_CTRL_OFFSET(1) -#define USBFS_UH_PRE_PID_EN 0x0400 // USB host PRE PID enable for low speed device via hub -#define USBFS_UH_SOF_EN 0x04 // USB host automatic SOF enable - -#define USBFS_UH_EP_PID_OFFSET USBFS_UEPx_T_LEN_OFFSET(2) -#define USBFS_UH_TOKEN_MASK 0xF0 // bit mask of token PID for USB host transfer -#define USBFS_UH_ENDP_MASK 0x0F // bit mask of endpoint number for USB host transfer - -#define USBFS_UH_RX_CTRL_OFFSET USBFS_UEPx_RX_CTRL_OFFSET(2) // host receiver endpoint control -#define USBFS_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle -#define USBFS_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1 -#define USBFS_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions - -#define USBFS_UH_TX_LEN_OFFSET USBFS_UEPx_T_LEN_OFFSET(3) - -#define USBFS_UH_TX_CTRL_OFFSET USBFS_UEPx_TX_CTRL_OFFSET(3) // host transmittal endpoint control -#define USBFS_UH_T_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle -#define USBFS_UH_T_TOG 0x04 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1 -#define USBFS_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions - -#endif diff --git a/components/drivers/usb/cherryusb/port/ch32/usb_ch32_usbhs_reg.h b/components/drivers/usb/cherryusb/port/ch32/usb_ch32_usbhs_reg.h deleted file mode 100644 index 1dca5d1b87a..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/usb_ch32_usbhs_reg.h +++ /dev/null @@ -1,564 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef _USB_CH32_USBHS_REG_H -#define _USB_CH32_USBHS_REG_H - -#define __IO volatile /* defines 'read / write' permissions */ - -/* USBHS Registers */ -typedef struct -{ - __IO uint8_t CONTROL; - __IO uint8_t HOST_CTRL; - __IO uint8_t INT_EN; - __IO uint8_t DEV_AD; - __IO uint16_t FRAME_NO; - __IO uint8_t SUSPEND; - __IO uint8_t RESERVED0; - __IO uint8_t SPEED_TYPE; - __IO uint8_t MIS_ST; - __IO uint8_t INT_FG; - __IO uint8_t INT_ST; - __IO uint16_t RX_LEN; - __IO uint16_t RESERVED1; - __IO uint32_t ENDP_CONFIG; - __IO uint32_t ENDP_TYPE; - __IO uint32_t BUF_MODE; - __IO uint32_t UEP0_DMA; - __IO uint32_t UEP1_RX_DMA; - __IO uint32_t UEP2_RX_DMA; - __IO uint32_t UEP3_RX_DMA; - __IO uint32_t UEP4_RX_DMA; - __IO uint32_t UEP5_RX_DMA; - __IO uint32_t UEP6_RX_DMA; - __IO uint32_t UEP7_RX_DMA; - __IO uint32_t UEP8_RX_DMA; - __IO uint32_t UEP9_RX_DMA; - __IO uint32_t UEP10_RX_DMA; - __IO uint32_t UEP11_RX_DMA; - __IO uint32_t UEP12_RX_DMA; - __IO uint32_t UEP13_RX_DMA; - __IO uint32_t UEP14_RX_DMA; - __IO uint32_t UEP15_RX_DMA; - __IO uint32_t UEP1_TX_DMA; - __IO uint32_t UEP2_TX_DMA; - __IO uint32_t UEP3_TX_DMA; - __IO uint32_t UEP4_TX_DMA; - __IO uint32_t UEP5_TX_DMA; - __IO uint32_t UEP6_TX_DMA; - __IO uint32_t UEP7_TX_DMA; - __IO uint32_t UEP8_TX_DMA; - __IO uint32_t UEP9_TX_DMA; - __IO uint32_t UEP10_TX_DMA; - __IO uint32_t UEP11_TX_DMA; - __IO uint32_t UEP12_TX_DMA; - __IO uint32_t UEP13_TX_DMA; - __IO uint32_t UEP14_TX_DMA; - __IO uint32_t UEP15_TX_DMA; - __IO uint16_t UEP0_MAX_LEN; - __IO uint16_t RESERVED2; - __IO uint16_t UEP1_MAX_LEN; - __IO uint16_t RESERVED3; - __IO uint16_t UEP2_MAX_LEN; - __IO uint16_t RESERVED4; - __IO uint16_t UEP3_MAX_LEN; - __IO uint16_t RESERVED5; - __IO uint16_t UEP4_MAX_LEN; - __IO uint16_t RESERVED6; - __IO uint16_t UEP5_MAX_LEN; - __IO uint16_t RESERVED7; - __IO uint16_t UEP6_MAX_LEN; - __IO uint16_t RESERVED8; - __IO uint16_t UEP7_MAX_LEN; - __IO uint16_t RESERVED9; - __IO uint16_t UEP8_MAX_LEN; - __IO uint16_t RESERVED10; - __IO uint16_t UEP9_MAX_LEN; - __IO uint16_t RESERVED11; - __IO uint16_t UEP10_MAX_LEN; - __IO uint16_t RESERVED12; - __IO uint16_t UEP11_MAX_LEN; - __IO uint16_t RESERVED13; - __IO uint16_t UEP12_MAX_LEN; - __IO uint16_t RESERVED14; - __IO uint16_t UEP13_MAX_LEN; - __IO uint16_t RESERVED15; - __IO uint16_t UEP14_MAX_LEN; - __IO uint16_t RESERVED16; - __IO uint16_t UEP15_MAX_LEN; - __IO uint16_t RESERVED17; - __IO uint16_t UEP0_TX_LEN; - __IO uint8_t UEP0_TX_CTRL; - __IO uint8_t UEP0_RX_CTRL; - __IO uint16_t UEP1_TX_LEN; - __IO uint8_t UEP1_TX_CTRL; - __IO uint8_t UEP1_RX_CTRL; - __IO uint16_t UEP2_TX_LEN; - __IO uint8_t UEP2_TX_CTRL; - __IO uint8_t UEP2_RX_CTRL; - __IO uint16_t UEP3_TX_LEN; - __IO uint8_t UEP3_TX_CTRL; - __IO uint8_t UEP3_RX_CTRL; - __IO uint16_t UEP4_TX_LEN; - __IO uint8_t UEP4_TX_CTRL; - __IO uint8_t UEP4_RX_CTRL; - __IO uint16_t UEP5_TX_LEN; - __IO uint8_t UEP5_TX_CTRL; - __IO uint8_t UEP5_RX_CTRL; - __IO uint16_t UEP6_TX_LEN; - __IO uint8_t UEP6_TX_CTRL; - __IO uint8_t UEP6_RX_CTRL; - __IO uint16_t UEP7_TX_LEN; - __IO uint8_t UEP7_TX_CTRL; - __IO uint8_t UEP7_RX_CTRL; - __IO uint16_t UEP8_TX_LEN; - __IO uint8_t UEP8_TX_CTRL; - __IO uint8_t UEP8_RX_CTRL; - __IO uint16_t UEP9_TX_LEN; - __IO uint8_t UEP9_TX_CTRL; - __IO uint8_t UEP9_RX_CTRL; - __IO uint16_t UEP10_TX_LEN; - __IO uint8_t UEP10_TX_CTRL; - __IO uint8_t UEP10_RX_CTRL; - __IO uint16_t UEP11_TX_LEN; - __IO uint8_t UEP11_TX_CTRL; - __IO uint8_t UEP11_RX_CTRL; - __IO uint16_t UEP12_TX_LEN; - __IO uint8_t UEP12_TX_CTRL; - __IO uint8_t UEP12_RX_CTRL; - __IO uint16_t UEP13_TX_LEN; - __IO uint8_t UEP13_TX_CTRL; - __IO uint8_t UEP13_RX_CTRL; - __IO uint16_t UEP14_TX_LEN; - __IO uint8_t UEP14_TX_CTRL; - __IO uint8_t UEP14_RX_CTRL; - __IO uint16_t UEP15_TX_LEN; - __IO uint8_t UEP15_TX_CTRL; - __IO uint8_t UEP15_RX_CTRL; -} USBHSD_TypeDef; - -typedef struct __attribute__((packed)) { - __IO uint8_t CONTROL; - __IO uint8_t HOST_CTRL; - __IO uint8_t INT_EN; - __IO uint8_t DEV_AD; - __IO uint16_t FRAME_NO; - __IO uint8_t SUSPEND; - __IO uint8_t RESERVED0; - __IO uint8_t SPEED_TYPE; - __IO uint8_t MIS_ST; - __IO uint8_t INT_FG; - __IO uint8_t INT_ST; - __IO uint16_t RX_LEN; - __IO uint16_t RESERVED1; - __IO uint32_t HOST_EP_CONFIG; - __IO uint32_t HOST_EP_TYPE; - __IO uint32_t RESERVED2; - __IO uint32_t RESERVED3; - __IO uint32_t RESERVED4; - __IO uint32_t HOST_RX_DMA; - __IO uint32_t RESERVED5; - __IO uint32_t RESERVED6; - __IO uint32_t RESERVED7; - __IO uint32_t RESERVED8; - __IO uint32_t RESERVED9; - __IO uint32_t RESERVED10; - __IO uint32_t RESERVED11; - __IO uint32_t RESERVED12; - __IO uint32_t RESERVED13; - __IO uint32_t RESERVED14; - __IO uint32_t RESERVED15; - __IO uint32_t RESERVED16; - __IO uint32_t RESERVED17; - __IO uint32_t RESERVED18; - __IO uint32_t RESERVED19; - __IO uint32_t HOST_TX_DMA; - __IO uint32_t RESERVED20; - __IO uint32_t RESERVED21; - __IO uint32_t RESERVED22; - __IO uint32_t RESERVED23; - __IO uint32_t RESERVED24; - __IO uint32_t RESERVED25; - __IO uint32_t RESERVED26; - __IO uint32_t RESERVED27; - __IO uint32_t RESERVED28; - __IO uint32_t RESERVED29; - __IO uint32_t RESERVED30; - __IO uint32_t RESERVED31; - __IO uint32_t RESERVED32; - __IO uint32_t RESERVED33; - __IO uint16_t HOST_RX_MAX_LEN; - __IO uint16_t RESERVED34; - __IO uint32_t RESERVED35; - __IO uint32_t RESERVED36; - __IO uint32_t RESERVED37; - __IO uint32_t RESERVED38; - __IO uint32_t RESERVED39; - __IO uint32_t RESERVED40; - __IO uint32_t RESERVED41; - __IO uint32_t RESERVED42; - __IO uint32_t RESERVED43; - __IO uint32_t RESERVED44; - __IO uint32_t RESERVED45; - __IO uint32_t RESERVED46; - __IO uint32_t RESERVED47; - __IO uint32_t RESERVED48; - __IO uint32_t RESERVED49; - __IO uint8_t HOST_EP_PID; - __IO uint8_t RESERVED50; - __IO uint8_t RESERVED51; - __IO uint8_t HOST_RX_CTRL; - __IO uint16_t HOST_TX_LEN; - __IO uint8_t HOST_TX_CTRL; - __IO uint8_t RESERVED52; - __IO uint16_t HOST_SPLIT_DATA; -} USBHSH_TypeDef; - -#define USBHS_BASE ((uint32_t)(0x40000000 + 0x23400)) - -#define USBHS_DEVICE ((USBHSD_TypeDef *)USBHS_BASE) -#define USBHS_HOST ((USBHSH_TypeDef *)USBHS_BASE) - -/******************* GLOBAL ******************/ - -// USB CONTROL -#define USBHS_CONTROL_OFFSET 0x00 -#define USBHS_DMA_EN (1 << 0) -#define USBHS_ALL_CLR (1 << 1) -#define USBHS_FORCE_RST (1 << 2) -#define USBHS_INT_BUSY_EN (1 << 3) -#define USBHS_DEV_PU_EN (1 << 4) -#define USBHS_SPEED_MASK (3 << 5) -#define USBHS_FULL_SPEED (0 << 5) -#define USBHS_HIGH_SPEED (1 << 5) -#define USBHS_LOW_SPEED (2 << 5) -#define USBHS_HOST_MODE (1 << 7) - -// USB_INT_EN -#define USBHS_INT_EN_OFFSET 0x02 -#define USBHS_BUS_RST_EN (1 << 0) -#define USBHS_DETECT_EN (1 << 0) -#define USBHS_TRANSFER_EN (1 << 1) -#define USBHS_SUSPEND_EN (1 << 2) -#define USBHS_SOF_ACT_EN (1 << 3) -#define USBHS_FIFO_OV_EN (1 << 4) -#define USBHS_SETUP_ACT_EN (1 << 5) -#define USBHS_ISO_ACT_EN (1 << 6) -#define USBHS_DEV_NAK_EN (1 << 7) - -// USB DEV AD -#define USBHS_DEV_AD_OFFSET 0x03 -// USB FRAME_NO -#define USBHS_FRAME_NO_OFFSET 0x04 -// USB SUSPEND -#define USBHS_SUSPEND_OFFSET 0x06 -#define USBHS_DEV_REMOTE_WAKEUP (1 << 2) -#define USBHS_LINESTATE_MASK (2 << 4) /* Read Only */ - -// RESERVED0 - -// USB SPEED TYPE -#define USBHS_SPEED_TYPE_OFFSET 0x08 -#define USBSPEED_MASK (0x03) - -// USB_MIS_ST -#define USBHS_MIS_ST_OFFSET 0x09 -#define USBHS_SPLIT_CAN (1 << 0) -#define USBHS_ATTACH (1 << 1) -#define USBHS_SUSPEND (1 << 2) -#define USBHS_BUS_RESET (1 << 3) -#define USBHS_R_FIFO_RDY (1 << 4) -#define USBHS_SIE_FREE (1 << 5) -#define USBHS_SOF_ACT (1 << 6) -#define USBHS_SOF_PRES (1 << 7) - -// INT_FLAG -#define USBHS_INT_FLAG_OFFSET 0x0A -#define USBHS_BUS_RST_FLAG (1 << 0) -#define USBHS_DETECT_FLAG (1 << 0) -#define USBHS_TRANSFER_FLAG (1 << 1) -#define USBHS_SUSPEND_FLAG (1 << 2) -#define USBHS_HST_SOF_FLAG (1 << 3) -#define USBHS_FIFO_OV_FLAG (1 << 4) -#define USBHS_SETUP_FLAG (1 << 5) -#define USBHS_ISO_ACT_FLAG (1 << 6) - -// INT_ST -#define USBHS_INT_ST_OFFSET 0x0B -#define USBHS_DEV_UIS_IS_NAK (1 << 7) -#define USBHS_DEV_UIS_TOG_OK (1 << 6) -#define MASK_UIS_TOKEN (3 << 4) -#define MASK_UIS_ENDP (0x0F) -#define MASK_UIS_H_RES (0x0F) - -#define USBHS_TOGGLE_OK (0x40) -#define USBHS_HOST_RES (0x0f) - -//USB_RX_LEN -#define USBHS_RX_LEN_OFFSET 0x0C -/******************* DEVICE ******************/ - -//UEP_CONFIG -#define USBHS_UEP_CONFIG_OFFSET 0x10 -#define USBHS_EP0_T_EN (1 << 0) -#define USBHS_EP0_R_EN (1 << 16) - -#define USBHS_EP1_T_EN (1 << 1) -#define USBHS_EP1_R_EN (1 << 17) - -#define USBHS_EP2_T_EN (1 << 2) -#define USBHS_EP2_R_EN (1 << 18) - -#define USBHS_EP3_T_EN (1 << 3) -#define USBHS_EP3_R_EN (1 << 19) - -#define USBHS_EP4_T_EN (1 << 4) -#define USBHS_EP4_R_EN (1 << 20) - -#define USBHS_EP5_T_EN (1 << 5) -#define USBHS_EP5_R_EN (1 << 21) - -#define USBHS_EP6_T_EN (1 << 6) -#define USBHS_EP6_R_EN (1 << 22) - -#define USBHS_EP7_T_EN (1 << 7) -#define USBHS_EP7_R_EN (1 << 23) - -#define USBHS_EP8_T_EN (1 << 8) -#define USBHS_EP8_R_EN (1 << 24) - -#define USBHS_EP9_T_EN (1 << 9) -#define USBHS_EP9_R_EN (1 << 25) - -#define USBHS_EP10_T_EN (1 << 10) -#define USBHS_EP10_R_EN (1 << 26) - -#define USBHS_EP11_T_EN (1 << 11) -#define USBHS_EP11_R_EN (1 << 27) - -#define USBHS_EP12_T_EN (1 << 12) -#define USBHS_EP12_R_EN (1 << 28) - -#define USBHS_EP13_T_EN (1 << 13) -#define USBHS_EP13_R_EN (1 << 29) - -#define USBHS_EP14_T_EN (1 << 14) -#define USBHS_EP14_R_EN (1 << 30) - -#define USBHS_EP15_T_EN (1 << 15) -#define USBHS_EP15_R_EN (1 << 31) - -//UEP_TYPE -#define USBHS_UEP_TYPE_OFFSET 0x14 -#define USBHS_EP0_T_TYP (1 << 0) -#define USBHS_EP0_R_TYP (1 << 16) - -#define USBHS_EP1_T_TYP (1 << 1) -#define USBHS_EP1_R_TYP (1 << 17) - -#define USBHS_EP2_T_TYP (1 << 2) -#define USBHS_EP2_R_TYP (1 << 18) - -#define USBHS_EP3_T_TYP (1 << 3) -#define USBHS_EP3_R_TYP (1 << 19) - -#define USBHS_EP4_T_TYP (1 << 4) -#define USBHS_EP4_R_TYP (1 << 20) - -#define USBHS_EP5_T_TYP (1 << 5) -#define USBHS_EP5_R_TYP (1 << 21) - -#define USBHS_EP6_T_TYP (1 << 6) -#define USBHS_EP6_R_TYP (1 << 22) - -#define USBHS_EP7_T_TYP (1 << 7) -#define USBHS_EP7_R_TYP (1 << 23) - -#define USBHS_EP8_T_TYP (1 << 8) -#define USBHS_EP8_R_TYP (1 << 24) - -#define USBHS_EP9_T_TYP (1 << 8) -#define USBHS_EP9_R_TYP (1 << 25) - -#define USBHS_EP10_T_TYP (1 << 10) -#define USBHS_EP10_R_TYP (1 << 26) - -#define USBHS_EP11_T_TYP (1 << 11) -#define USBHS_EP11_R_TYP (1 << 27) - -#define USBHS_EP12_T_TYP (1 << 12) -#define USBHS_EP12_R_TYP (1 << 28) - -#define USBHS_EP13_T_TYP (1 << 13) -#define USBHS_EP13_R_TYP (1 << 29) - -#define USBHS_EP14_T_TYP (1 << 14) -#define USBHS_EP14_R_TYP (1 << 30) - -#define USBHS_EP15_T_TYP (1 << 15) -#define USBHS_EP15_R_TYP (1 << 31) - -/* BUF_MOD UEP1~15 */ -#define USBHS_BUF_MOD_OFFSET 0x18 -#define USBHS_EP0_BUF_MOD (1 << 0) -#define USBHS_EP0_ISO_BUF_MOD (1 << 16) - -#define USBHS_EP1_BUF_MOD (1 << 1) -#define USBHS_EP1_ISO_BUF_MOD (1 << 17) - -#define USBHS_EP2_BUF_MOD (1 << 2) -#define USBHS_EP2_ISO_BUF_MOD (1 << 18) - -#define USBHS_EP3_BUF_MOD (1 << 3) -#define USBHS_EP3_ISO_BUF_MOD (1 << 19) - -#define USBHS_EP4_BUF_MOD (1 << 4) -#define USBHS_EP4_ISO_BUF_MOD (1 << 20) - -#define USBHS_EP5_BUF_MOD (1 << 5) -#define USBHS_EP5_ISO_BUF_MOD (1 << 21) - -#define USBHS_EP6_BUF_MOD (1 << 6) -#define USBHS_EP6_ISO_BUF_MOD (1 << 22) - -#define USBHS_EP7_BUF_MOD (1 << 7) -#define USBHS_EP7_ISO_BUF_MOD (1 << 23) - -#define USBHS_EP8_BUF_MOD (1 << 8) -#define USBHS_EP8_ISO_BUF_MOD (1 << 24) - -#define USBHS_EP9_BUF_MOD (1 << 9) -#define USBHS_EP9_ISO_BUF_MOD (1 << 25) - -#define USBHS_EP10_BUF_MOD (1 << 10) -#define USBHS_EP10_ISO_BUF_MOD (1 << 26) - -#define USBHS_EP11_BUF_MOD (1 << 11) -#define USBHS_EP11_ISO_BUF_MOD (1 << 27) - -#define USBHS_EP12_BUF_MOD (1 << 12) -#define USBHS_EP12_ISO_BUF_MOD (1 << 28) - -#define USBHS_EP13_BUF_MOD (1 << 13) -#define USBHS_EP13_ISO_BUF_MOD (1 << 29) - -#define USBHS_EP14_BUF_MOD (1 << 14) -#define USBHS_EP14_ISO_BUF_MOD (1 << 30) - -#define USBHS_EP15_BUF_MOD (1 << 15) -#define USBHS_EP15_ISO_BUF_MOD (1 << 31) -//USBHS_EPn_T_EN USBHS_EPn_R_EN USBHS_EPn_BUF_MOD 锟斤拷锟斤拷锟斤拷锟斤拷UEPn_DMA为锟斤拷始锟斤拷址锟缴碉拷锟斤拷锟斤拷锟斤拷锟� -// 0 0 x 锟剿点被锟斤拷锟矫ｏ拷未锟矫碉拷UEPn_*_DMA锟斤拷锟斤拷锟斤拷锟斤拷 -// 1 0 0 锟斤拷锟秸ｏ拷OUT锟斤拷锟斤拷锟斤拷锟斤拷锟阶碉拷址为UEPn_RX_DMA -// 1 0 1 bUEPn_RX_TOG[0]=0,使锟矫伙拷锟斤拷锟斤拷UEPn_RX_DMA锟斤拷bUEPn_RX_TOG[0]=1,使锟矫伙拷锟斤拷锟斤拷UEPn_TX_DMA -// 0 1 0 锟斤拷锟斤拷(IN)锟斤拷锟斤拷锟斤拷锟阶碉拷址为UEPn_TX_DMA锟斤拷 -// 0 1 1 bUEPn_TX_TOG[0]=0,使锟矫伙拷锟斤拷锟斤拷UEPn_TX_DMA锟斤拷bUEPn_TX_TOG[0]=1,使锟矫伙拷锟斤拷锟斤拷UEPn_RX_DMA - -/* USB0_DMA */ -#define USBHS_UEP0_DMA_OFFSET(n) (0x1C) // endpoint 0 DMA buffer address - -/* USBX_RX_DMA */ -#define USBHS_UEPx_RX_DMA_OFFSET(n) (0x1C + 4 * (n)) // endpoint x DMA buffer address - -#define USBHS_UEPx_TX_DMA_OFFSET(n) (0x58 + 4 * (n)) // endpoint x DMA buffer address - -#define USBHS_UEPx_MAX_LEN_OFFSET(n) (0x98 + 4 * (n)) // endpoint x DMA buffer address - -#define USBHS_UEPx_T_LEN_OFFSET(n) (0xD8 + 4 * (n)) // endpoint x DMA buffer address -#define USBHS_UEPx_TX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 2) // endpoint x DMA buffer address -#define USBHS_UEPx_RX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 3) // endpoint x DMA buffer address - -// UEPn_T_LEN -#define USBHS_EP_T_LEN_MASK (0x7FF) - -//UEPn_TX_CTRL -#define USBHS_EP_T_RES_MASK (3 << 0) -#define USBHS_EP_T_RES_ACK (0 << 0) -#define USBHS_EP_T_RES_NYET (1 << 0) -#define USBHS_EP_T_RES_NAK (2 << 0) -#define USBHS_EP_T_RES_STALL (3 << 0) - -#define USBHS_EP_T_TOG_MASK (3 << 3) -#define USBHS_EP_T_TOG_0 (0 << 3) -#define USBHS_EP_T_TOG_1 (1 << 3) -#define USBHS_EP_T_TOG_2 (2 << 3) -#define USBHS_EP_T_TOG_M (3 << 3) - -#define USBHS_EP_T_AUTOTOG (1 << 5) - -//UEPn_RX_CTRL -#define USBHS_EP_R_RES_MASK (3 << 0) -#define USBHS_EP_R_RES_ACK (0 << 0) -#define USBHS_EP_R_RES_NYET (1 << 0) -#define USBHS_EP_R_RES_NAK (2 << 0) -#define USBHS_EP_R_RES_STALL (3 << 0) - -#define USBHS_EP_R_TOG_MASK (3 << 3) -#define USBHS_EP_R_TOG_0 (0 << 3) -#define USBHS_EP_R_TOG_1 (1 << 3) -#define USBHS_EP_R_TOG_2 (2 << 3) -#define USBHS_EP_R_TOG_M (3 << 3) - -#define USBHS_EP_R_AUTOTOG (1 << 5) - -#define USBHS_TOG_MATCH (1 << 6) - -/******************* HOST ******************/ -// USB HOST_CTRL -#define USBHS_SEND_BUS_RESET (1 << 0) -#define USBHS_SEND_BUS_SUSPEND (1 << 1) -#define USBHS_SEND_BUS_RESUME (1 << 2) -#define USBHS_REMOTE_WAKE (1 << 3) -#define USBHS_PHY_SUSPENDM (1 << 4) -#define USBHS_UH_SOFT_FREE (1 << 6) -#define USBHS_SEND_SOF_EN (1 << 7) - -//UH_CONFIG -#define USBHS_HOST_TX_EN (1 << 3) -#define USBHS_HOST_RX_EN (1 << 18) - -// HOST_EP_TYPE -#define USBHS_ENDP_TX_ISO (1 << 3) -#define USBHS_ENDP_RX_ISO (1 << (16 + 2)) - -// R32_UH_EP_PID -#define USBHS_HOST_MASK_TOKEN (0x0f) -#define USBHS_HOST_MASK_ENDP (0x0f << 4) - -//R8_UH_RX_CTRL -#define USBHS_EP_R_RES_MASK (3 << 0) -#define USBHS_EP_R_RES_ACK (0 << 0) -#define USBHS_EP_R_RES_NYET (1 << 0) -#define USBHS_EP_R_RES_NAK (2 << 0) -#define USBHS_EP_R_RES_STALL (3 << 0) - -#define USBHS_UH_R_RES_NO (1 << 2) -#define USBHS_UH_R_TOG_1 (1 << 3) -#define USBHS_UH_R_TOG_2 (2 << 3) -#define USBHS_UH_R_TOG_3 (3 << 3) -#define USBHS_UH_R_TOG_AUTO (1 << 5) -#define USBHS_UH_R_DATA_NO (1 << 6) -//R8_UH_TX_CTRL -#define USBHS_UH_T_RES_MASK (3 << 0) -#define USBHS_UH_T_RES_ACK (0 << 0) -#define USBHS_UH_T_RES_NYET (1 << 0) -#define USBHS_UH_T_RES_NAK (2 << 0) -#define USBHS_UH_T_RES_STALL (3 << 0) - -#define USBHS_UH_T_RES_NO (1 << 2) -#define USBHS_UH_T_TOG_1 (1 << 3) -#define USBHS_UH_T_TOG_2 (2 << 3) -#define USBHS_UH_T_TOG_3 (3 << 3) -#define USBHS_UH_T_TOG_AUTO (1 << 5) -#define USBHS_UH_T_DATA_NO (1 << 6) - -// 00: OUT, 01:SOF, 10:IN, 11:SETUP -#define PID_OUT 0 -#define PID_SOF 1 -#define PID_IN 2 -#define PID_SETUP 3 - -#endif diff --git a/components/drivers/usb/cherryusb/port/ch32/usb_ch58x_dc_usbfs.c b/components/drivers/usb/cherryusb/port/ch32/usb_ch58x_dc_usbfs.c deleted file mode 100644 index 5771efb637e..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/usb_ch58x_dc_usbfs.c +++ /dev/null @@ -1,639 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#include "usbd_core.h" -#include "usb_ch58x_usbfs_reg.h" - -/** - * @brief Related register macro - */ -#define USB0_BASE 0x40008000u -#define USB1_BASE 0x40008400u - -#ifndef USBD -#define USBD USB0_BASE -#endif -#define CH58x_USBFS_DEV ((USB_FS_TypeDef *)USBD) - -#ifndef USBD_IRQHandler -#define USBD_IRQHandler USB_IRQHandler //use actual usb irq name instead -#endif - -/*!< 8-bit value of endpoint control register */ -#define EPn_CTRL(epid) \ - *(volatile uint8_t *)(&(CH58x_USBFS_DEV->UEP0_CTRL) + epid * 4 + (epid / 5) * 48) - -/*!< The length register value of the endpoint send buffer */ -#define EPn_TX_LEN(epid) \ - *(volatile uint8_t *)(&(CH58x_USBFS_DEV->UEP0_T_LEN) + epid * 4 + (epid / 5) * 48) - -/*!< Read setup packet to use in ep0 in */ -#define GET_SETUP_PACKET(data_add) \ - *(struct usb_setup_packet *)data_add - -/*!< Set epid ep tx valid // Not an isochronous endpoint */ -#define EPn_SET_TX_VALID(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_T_RES) | UEP_T_RES_ACK; -/*!< Set epid ep rx valid // Not an isochronous endpoint */ -#define EPn_SET_RX_VALID(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_R_RES) | UEP_R_RES_ACK; -/*!< Set epid ep tx valid // Isochronous endpoint */ -#define EPn_SET_TX_ISO_VALID(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_T_RES) | UEP_T_RES_TOUT; -/*!< Set epid ep rx valid // Isochronous endpoint */ -#define EPn_SET_RX_ISO_VALID(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_R_RES) | UEP_R_RES_TOUT; -/*!< Set epid ep tx nak */ -#define EPn_SET_TX_NAK(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_T_RES) | UEP_T_RES_NAK; -/*!< Set epid ep rx nak */ -#define EPn_SET_RX_NAK(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_R_RES) | UEP_R_RES_NAK; -/*!< Set epid ep tx stall */ -#define EPn_SET_TX_STALL(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_T_RES) | UEP_T_RES_STALL -/*!< Set epid ep rx stall */ -#define EPn_SET_RX_STALL(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~MASK_UEP_R_RES) | UEP_R_RES_STALL -/*!< Clear epid ep tx stall */ -#define EPn_CLR_TX_STALL(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~(RB_UEP_T_TOG | MASK_UEP_T_RES)) | UEP_T_RES_NAK -/*!< Clear epid ep rx stall */ -#define EPn_CLR_RX_STALL(epid) \ - EPn_CTRL(epid) = (EPn_CTRL(epid) & ~(RB_UEP_R_TOG | MASK_UEP_R_RES)) | UEP_R_RES_ACK -/*!< Set epid ep tx len */ -#define EPn_SET_TX_LEN(epid, len) \ - EPn_TX_LEN(epid) = len -/*!< Get epid ep rx len */ -#define EPn_GET_RX_LEN(epid) \ - CH58x_USBFS_DEV->USB_RX_LEN - -/*!< ep nums */ -#ifndef CONFIG_USBDEV_EP_NUM -#define CONFIG_USBDEV_EP_NUM 5 -#endif -/*!< ep mps */ -#define EP_MPS 64 -/*!< set ep4 in mps 64 */ -#define EP4_IN_MPS EP_MPS -/*!< set ep4 out mps 64 */ -#define EP4_OUT_MPS EP_MPS - -/*!< User defined assignment endpoint RAM */ -__attribute__((aligned(4))) uint8_t ep0_data_buff[64 + EP4_OUT_MPS + EP4_IN_MPS]; /*!< ep0(64)+ep4_out(64)+ep4_in(64) */ -__attribute__((aligned(4))) uint8_t ep1_data_buff[64 + 64]; /*!< ep1_out(64)+ep1_in(64) */ -__attribute__((aligned(4))) uint8_t ep2_data_buff[64 + 64]; /*!< ep2_out(64)+ep2_in(64) */ -__attribute__((aligned(4))) uint8_t ep3_data_buff[64 + 64]; /*!< ep3_out(64)+ep3_in(64) */ -#if (CONFIG_USBDEV_EP_NUM == 8) -/** - * This dcd porting can be used on ch581, ch582, ch583, - * and also on ch571, ch572, and ch573. Note that only five endpoints are available for ch571, ch572, and ch573. - */ -__attribute__((aligned(4))) uint8_t ep5_data_buff[64 + 64]; /*!< ep5_out(64)+ep5_in(64) */ -__attribute__((aligned(4))) uint8_t ep6_data_buff[64 + 64]; /*!< ep6_out(64)+ep6_in(64) */ -__attribute__((aligned(4))) uint8_t ep7_data_buff[64 + 64]; /*!< ep7_out(64)+ep7_in(64) */ -#endif -/** - * @brief Endpoint information structure - */ -typedef struct _usbd_ep_info { - uint8_t mps; /*!< Maximum packet length of endpoint */ - uint8_t eptype; /*!< Endpoint Type */ - uint8_t *ep_ram_addr; /*!< Endpoint buffer address */ - - uint8_t ep_enable; /* Endpoint enable */ - uint8_t *xfer_buf; - uint32_t xfer_len; - uint32_t actual_xfer_len; -} usbd_ep_info; - -/*!< ch58x usb */ -static struct _ch58x_core_prvi { - uint8_t address; /*!< Address */ - usbd_ep_info ep_in[CONFIG_USBDEV_EP_NUM]; - usbd_ep_info ep_out[CONFIG_USBDEV_EP_NUM]; - struct usb_setup_packet setup; -} usb_dc_cfg; - -__WEAK void usb_dc_low_level_init(void) -{ -} - -__WEAK void usb_dc_low_level_deinit(void) -{ -} - -/** - * @brief USB initialization - * @pre None - * @param[in] None - * @retval >=0 success otherwise failure - */ -int usb_dc_init(uint8_t busid) -{ - usb_dc_cfg.ep_in[0].ep_ram_addr = ep0_data_buff; - usb_dc_cfg.ep_out[0].ep_ram_addr = ep0_data_buff; - - usb_dc_cfg.ep_in[1].ep_ram_addr = ep1_data_buff + 64; - usb_dc_cfg.ep_out[1].ep_ram_addr = ep1_data_buff; - - usb_dc_cfg.ep_in[2].ep_ram_addr = ep2_data_buff + 64; - usb_dc_cfg.ep_out[2].ep_ram_addr = ep2_data_buff; - - usb_dc_cfg.ep_in[3].ep_ram_addr = ep3_data_buff + 64; - usb_dc_cfg.ep_out[3].ep_ram_addr = ep3_data_buff; - - usb_dc_cfg.ep_in[4].ep_ram_addr = ep0_data_buff + 64 + EP4_OUT_MPS; - usb_dc_cfg.ep_out[4].ep_ram_addr = ep0_data_buff + 64; -#if (CONFIG_USBDEV_EP_NUM == 8) - usb_dc_cfg.ep_in[5].ep_ram_addr = ep5_data_buff + 64; - usb_dc_cfg.ep_out[5].ep_ram_addr = ep5_data_buff; - - usb_dc_cfg.ep_in[6].ep_ram_addr = ep6_data_buff + 64; - usb_dc_cfg.ep_out[6].ep_ram_addr = ep6_data_buff; - - usb_dc_cfg.ep_in[7].ep_ram_addr = ep7_data_buff + 64; - usb_dc_cfg.ep_out[7].ep_ram_addr = ep7_data_buff; -#endif - /*!< Set the mode first and cancel RB_UC_CLR_ALL */ - CH58x_USBFS_DEV->USB_CTRL = 0x00; - CH58x_USBFS_DEV->UEP4_1_MOD = RB_UEP4_RX_EN | RB_UEP4_TX_EN | RB_UEP1_RX_EN | RB_UEP1_TX_EN; /*!< EP4 OUT+IN EP1 OUT+IN */ - CH58x_USBFS_DEV->UEP2_3_MOD = RB_UEP2_RX_EN | RB_UEP2_TX_EN | RB_UEP3_RX_EN | RB_UEP3_TX_EN; /*!< EP2 OUT+IN EP3 OUT+IN */ -#if (CONFIG_USBDEV_EP_NUM == 8) - CH58x_USBFS_DEV->UEP567_MOD = RB_UEP5_RX_EN | RB_UEP5_TX_EN | RB_UEP6_RX_EN | RB_UEP6_TX_EN | RB_UEP7_RX_EN | RB_UEP7_TX_EN; /*!< EP5 EP6 EP7 OUT+IN */ -#endif - CH58x_USBFS_DEV->UEP0_DMA = (uint16_t)(uint32_t)ep0_data_buff; - CH58x_USBFS_DEV->UEP1_DMA = (uint16_t)(uint32_t)ep1_data_buff; - CH58x_USBFS_DEV->UEP2_DMA = (uint16_t)(uint32_t)ep2_data_buff; - CH58x_USBFS_DEV->UEP3_DMA = (uint16_t)(uint32_t)ep3_data_buff; -#if (CONFIG_USBDEV_EP_NUM == 8) - CH58x_USBFS_DEV->UEP5_DMA = (uint16_t)(uint32_t)ep5_data_buff; - CH58x_USBFS_DEV->UEP6_DMA = (uint16_t)(uint32_t)ep6_data_buff; - CH58x_USBFS_DEV->UEP7_DMA = (uint16_t)(uint32_t)ep7_data_buff; -#endif - CH58x_USBFS_DEV->UEP0_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK; - CH58x_USBFS_DEV->UEP1_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG; - CH58x_USBFS_DEV->UEP2_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG; - CH58x_USBFS_DEV->UEP3_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG; - CH58x_USBFS_DEV->UEP4_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK; -#if (CONFIG_USBDEV_EP_NUM == 8) - CH58x_USBFS_DEV->UEP5_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG; - CH58x_USBFS_DEV->UEP6_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG; - CH58x_USBFS_DEV->UEP7_CTRL = UEP_R_RES_NAK | UEP_T_RES_NAK | RB_UEP_AUTO_TOG; -#endif - CH58x_USBFS_DEV->USB_DEV_AD = 0x00; - - /*!< Start the USB device and DMA, and automatically return to NAK before the interrupt flag is cleared during the interrupt */ - CH58x_USBFS_DEV->USB_CTRL = RB_UC_DEV_PU_EN | RB_UC_INT_BUSY | RB_UC_DMA_EN; - if ((uint32_t) & (CH58x_USBFS_DEV->USB_CTRL) == (uint32_t)USB0_BASE) { - /*!< USB0 */ - R16_PIN_ANALOG_IE |= RB_PIN_USB_IE | RB_PIN_USB_DP_PU; - } else if ((uint32_t) & (CH58x_USBFS_DEV->USB_CTRL) == (uint32_t)USB1_BASE) { - /*!< USB1 */ - R16_PIN_ANALOG_IE |= RB_PIN_USB2_IE | RB_PIN_USB2_DP_PU; - } - - CH58x_USBFS_DEV->USB_INT_FG = 0xff; /*!< Clear interrupt flag */ - CH58x_USBFS_DEV->UDEV_CTRL = RB_UD_PD_DIS | RB_UD_PORT_EN; /*!< Allow USB port */ - CH58x_USBFS_DEV->USB_INT_EN = RB_UIE_SUSPEND | RB_UIE_BUS_RST | RB_UIE_TRANSFER; - - usb_dc_low_level_init(); - return 0; -} - -int usb_dc_deinit(uint8_t busid) -{ - return 0; -} - -/** - * @brief Set address - * @pre None - * @param[in] address ：8-bit valid address - * @retval >=0 success otherwise failure - */ -int usbd_set_address(uint8_t busid, const uint8_t address) -{ - if (address == 0) { - CH58x_USBFS_DEV->USB_DEV_AD = (CH58x_USBFS_DEV->USB_DEV_AD & 0x80) | address; - } - usb_dc_cfg.address = address; - return 0; -} - -int usbd_set_remote_wakeup(uint8_t busid) -{ - return -1; -} - -uint8_t usbd_get_port_speed(uint8_t busid) -{ - return USB_SPEED_FULL; -} - -/** - * @brief Open endpoint - * @pre None - * @param[in] ep_cfg : Endpoint configuration structure pointer - * @retval >=0 success otherwise failure - */ -int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) -{ - /*!< ep id */ - uint8_t epid = USB_EP_GET_IDX(ep->bEndpointAddress); - if (epid > (CONFIG_USBDEV_EP_NUM - 1)) { - /** - * If you use ch58x, you can change the CONFIG_USBDEV_EP_NUM set to 8 - */ - USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } - - /*!< ep max packet length */ - uint8_t mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - /*!< update ep max packet length */ - if (USB_EP_DIR_IS_IN(ep->bEndpointAddress)) { - /*!< in */ - usb_dc_cfg.ep_in[epid].ep_enable = true; - usb_dc_cfg.ep_in[epid].mps = mps; - usb_dc_cfg.ep_in[epid].eptype = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - } else if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { - /*!< out */ - usb_dc_cfg.ep_out[epid].ep_enable = true; - usb_dc_cfg.ep_out[epid].mps = mps; - usb_dc_cfg.ep_out[epid].eptype = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - } - return 0; -} - -/** - * @brief Close endpoint - * @pre None - * @param[in] ep ： Endpoint address - * @retval >=0 success otherwise failure - */ -int usbd_ep_close(uint8_t busid, const uint8_t ep) -{ - /*!< ep id */ - uint8_t epid = USB_EP_GET_IDX(ep); - if (USB_EP_DIR_IS_IN(ep)) { - /*!< in */ - usb_dc_cfg.ep_in[epid].ep_enable = false; - } else if (USB_EP_DIR_IS_OUT(ep)) { - /*!< out */ - usb_dc_cfg.ep_out[epid].ep_enable = false; - } - return 0; -} - - -/** - * @brief Endpoint setting stall - * @pre None - * @param[in] ep ： Endpoint address - * @retval >=0 success otherwise failure - */ -int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) -{ - /*!< ep id */ - uint8_t epid = USB_EP_GET_IDX(ep); - if (USB_EP_DIR_IS_OUT(ep)) { - EPn_SET_RX_STALL(epid); - } else { - EPn_SET_TX_STALL(epid); - } - return 0; -} - -/** - * @brief Endpoint clear stall - * @pre None - * @param[in] ep ： Endpoint address - * @retval >=0 success otherwise failure - */ -int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t epid = USB_EP_GET_IDX(ep); - if (USB_EP_DIR_IS_OUT(ep)) { - EPn_CLR_RX_STALL(epid); - } else { - EPn_CLR_TX_STALL(epid); - } - return 0; -} - -/** - * @brief Check endpoint status - * @pre None - * @param[in] ep ： Endpoint address - * @param[out] stalled ： Outgoing endpoint status - * @retval >=0 success otherwise failure - */ -int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) -{ - if (USB_EP_DIR_IS_OUT(ep)) { - } else { - } - return 0; -} - -/** - * @brief Setup in ep transfer setting and start transfer. - * - * This function is asynchronous. - * This function is similar to uart with tx dma. - * - * This function is called to write data to the specified endpoint. The - * supplied usbd_endpoint_callback function will be called when data is transmitted - * out. - * - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] data Pointer to data to write - * @param[in] data_len Length of the data requested to write. This may - * be zero for a zero length status packet. - * @return 0 on success, negative errno code on fail. - */ -int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!usb_dc_cfg.ep_in[ep_idx].ep_enable) { - return -2; - } - if ((uint32_t)data & 0x03) { - return -3; - } - - usb_dc_cfg.ep_in[ep_idx].xfer_buf = (uint8_t *)data; - usb_dc_cfg.ep_in[ep_idx].xfer_len = data_len; - usb_dc_cfg.ep_in[ep_idx].actual_xfer_len = 0; - - if (data_len == 0) { - /*!< write 0 len data */ - EPn_SET_TX_LEN(ep_idx, 0); - /*!< enable tx */ - if (usb_dc_cfg.ep_in[ep_idx].eptype != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - EPn_SET_TX_VALID(ep_idx); - } else { - EPn_SET_TX_ISO_VALID(ep_idx); - } - /*!< return */ - return 0; - } else { - /*!< Not zlp */ - data_len = MIN(data_len, usb_dc_cfg.ep_in[ep_idx].mps); - /*!< write buff */ - memcpy(usb_dc_cfg.ep_in[ep_idx].ep_ram_addr, data, data_len); - /*!< write real_wt_nums len data */ - EPn_SET_TX_LEN(ep_idx, data_len); - /*!< enable tx */ - if (usb_dc_cfg.ep_in[ep_idx].eptype != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - EPn_SET_TX_VALID(ep_idx); - } else { - EPn_SET_TX_ISO_VALID(ep_idx); - } - } - return 0; -} - -/** - * @brief Setup out ep transfer setting and start transfer. - * - * This function is asynchronous. - * This function is similar to uart with rx dma. - * - * This function is called to read data to the specified endpoint. The - * supplied usbd_endpoint_callback function will be called when data is received - * in. - * - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] data Pointer to data to read - * @param[in] data_len Max length of the data requested to read. - * - * @return 0 on success, negative errno code on fail. - */ -int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!usb_dc_cfg.ep_out[ep_idx].ep_enable) { - return -2; - } - if ((uint32_t)data & 0x03) { - return -3; - } - - usb_dc_cfg.ep_out[ep_idx].xfer_buf = (uint8_t *)data; - usb_dc_cfg.ep_out[ep_idx].xfer_len = data_len; - usb_dc_cfg.ep_out[ep_idx].actual_xfer_len = 0; - - if (data_len == 0) { - } else { - data_len = MIN(data_len, usb_dc_cfg.ep_out[ep_idx].mps); - } - - if (usb_dc_cfg.ep_out[ep_idx].eptype != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - EPn_SET_RX_VALID(ep_idx); - } else { - EPn_SET_RX_ISO_VALID(ep_idx); - } - return 0; -} - -/** - * @brief USB interrupt processing function - * @pre None - * @param[in] None - * @retval None - */ -__attribute__((interrupt("WCH-Interrupt-fast"))) -__attribute__((section(".highcode"))) void -USBD_IRQHandler(void) -{ - volatile uint8_t intflag = 0; - intflag = CH58x_USBFS_DEV->USB_INT_FG; - - if (intflag & RB_UIF_TRANSFER) { - if ((CH58x_USBFS_DEV->USB_INT_ST & MASK_UIS_TOKEN) != MASK_UIS_TOKEN) { - uint8_t epid = ((CH58x_USBFS_DEV->USB_INT_ST & (MASK_UIS_TOKEN | MASK_UIS_ENDP)) & 0x0f); - switch ((CH58x_USBFS_DEV->USB_INT_ST & (MASK_UIS_TOKEN | MASK_UIS_ENDP)) & 0xf0) { - case UIS_TOKEN_IN: - if (epid == 0) { - /** - * IN The host takes away the data that has been stored in FIFO - */ - switch (usb_dc_cfg.setup.bmRequestType >> USB_REQUEST_DIR_SHIFT) { - case 1: - /*!< Get */ - CH58x_USBFS_DEV->UEP0_CTRL ^= RB_UEP_T_TOG; - /** - * Here is to take away the last data, and the IN interrupt will be triggered only after it is successfully taken away. - * Therefore, the status of the in endpoint is set to NAK here. If there is data transmission, - * the endpoint status will be set to ack again in the in handler of EP0. - */ - EPn_SET_TX_NAK(0); - - /*!< IN */ - if (usb_dc_cfg.ep_in[0].xfer_len > usb_dc_cfg.ep_in[0].mps) { - usb_dc_cfg.ep_in[0].xfer_len -= usb_dc_cfg.ep_in[0].mps; - usb_dc_cfg.ep_in[0].actual_xfer_len += usb_dc_cfg.ep_in[0].mps; - usbd_event_ep_in_complete_handler(0, 0 | 0x80, usb_dc_cfg.ep_in[0].actual_xfer_len); - } else { - usb_dc_cfg.ep_in[0].actual_xfer_len += usb_dc_cfg.ep_in[0].xfer_len; - usb_dc_cfg.ep_in[0].xfer_len = 0; - usbd_event_ep_in_complete_handler(0, 0 | 0x80, usb_dc_cfg.ep_in[0].actual_xfer_len); - } - break; - case 0: - /*!< Set */ - switch (usb_dc_cfg.setup.bRequest) { - case USB_REQUEST_SET_ADDRESS: - /*!< Fill in the equipment address */ - CH58x_USBFS_DEV->USB_DEV_AD = (CH58x_USBFS_DEV->USB_DEV_AD & RB_UDA_GP_BIT) | usb_dc_cfg.address; - /** - * In the state phase after setting the address, the host has sent an in token packet of data1 to take the packet of 0 length, - * Ch58x USB IP needs to manually set the status of the in endpoint to NAK - */ - EPn_SET_TX_NAK(0); - EPn_SET_RX_VALID(0); - break; - default: - /*!< Normal out state phase */ - /** - * The host has sent an in token packet of data1 and taken the packet of 0 length. - * Here, you only need to set the status of the in endpoint to NAK and out endpoint ACK - */ - EPn_SET_TX_NAK(0); - EPn_SET_RX_VALID(0); - break; - } - break; - } - } else { - if (epid == 4) { - CH58x_USBFS_DEV->UEP4_CTRL ^= RB_UEP_T_TOG; - } - EPn_SET_TX_NAK(epid); - if (usb_dc_cfg.ep_in[epid].xfer_len > usb_dc_cfg.ep_in[epid].mps) { - /*!< Need start in again */ - usb_dc_cfg.ep_in[epid].xfer_buf += usb_dc_cfg.ep_in[epid].mps; - usb_dc_cfg.ep_in[epid].xfer_len -= usb_dc_cfg.ep_in[epid].mps; - usb_dc_cfg.ep_in[epid].actual_xfer_len += usb_dc_cfg.ep_in[epid].mps; - if (usb_dc_cfg.ep_in[epid].xfer_len > usb_dc_cfg.ep_in[epid].mps) { - memcpy(usb_dc_cfg.ep_in[epid].ep_ram_addr, usb_dc_cfg.ep_in[epid].xfer_buf, usb_dc_cfg.ep_in[epid].mps); - EPn_SET_TX_LEN(epid, usb_dc_cfg.ep_in[epid].mps); - } else { - memcpy(usb_dc_cfg.ep_in[epid].ep_ram_addr, usb_dc_cfg.ep_in[epid].xfer_buf, usb_dc_cfg.ep_in[epid].xfer_len); - EPn_SET_TX_LEN(epid, usb_dc_cfg.ep_in[epid].xfer_len); - } - if (usb_dc_cfg.ep_in[epid].eptype != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - EPn_SET_TX_VALID(epid); - } else { - EPn_SET_TX_ISO_VALID(epid); - } - } else { - usb_dc_cfg.ep_in[epid].actual_xfer_len += usb_dc_cfg.ep_in[epid].xfer_len; - usb_dc_cfg.ep_in[epid].xfer_len = 0; - usbd_event_ep_in_complete_handler(0, epid | 0x80, usb_dc_cfg.ep_in[epid].actual_xfer_len); - } - } - break; - case UIS_TOKEN_OUT: - EPn_SET_RX_NAK(epid); - - if (epid == 0) { - /*!< ep0 out */ - CH58x_USBFS_DEV->UEP0_CTRL ^= RB_UEP_R_TOG; - uint32_t read_count = EPn_GET_RX_LEN(0); - memcpy(usb_dc_cfg.ep_out[epid].xfer_buf, usb_dc_cfg.ep_out[epid].ep_ram_addr, read_count); - - usb_dc_cfg.ep_out[0].actual_xfer_len += read_count; - usb_dc_cfg.ep_out[0].xfer_len -= read_count; - usbd_event_ep_out_complete_handler(0, 0x00, usb_dc_cfg.ep_out[0].actual_xfer_len); - if (read_count == 0) { - /*!< Out status, start reading setup */ - EPn_SET_RX_VALID(0); - } - } else { - if ((CH58x_USBFS_DEV->USB_INT_ST) & RB_UIS_TOG_OK) { - if (epid == 4) { - CH58x_USBFS_DEV->UEP4_CTRL ^= RB_UEP_R_TOG; - } - uint32_t read_count = EPn_GET_RX_LEN(epid); - memcpy(usb_dc_cfg.ep_out[epid].xfer_buf, usb_dc_cfg.ep_out[epid].ep_ram_addr, read_count); - usb_dc_cfg.ep_out[epid].xfer_buf += read_count; - usb_dc_cfg.ep_out[epid].actual_xfer_len += read_count; - usb_dc_cfg.ep_out[epid].xfer_len -= read_count; - - if ((read_count < usb_dc_cfg.ep_out[epid].mps) || (usb_dc_cfg.ep_out[epid].xfer_len == 0)) { - usbd_event_ep_out_complete_handler(0, ((epid)&0x7f), usb_dc_cfg.ep_out[epid].actual_xfer_len); - } else { - if (usb_dc_cfg.ep_out[epid].eptype != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - EPn_SET_RX_VALID(epid); - } else { - EPn_SET_RX_ISO_VALID(epid); - } - } - } - } - break; - default: - break; - } - CH58x_USBFS_DEV->USB_INT_FG = RB_UIF_TRANSFER; - } - - if (CH58x_USBFS_DEV->USB_INT_ST & RB_UIS_SETUP_ACT) { - /*!< Setup */ - /** - * Setup the device must respond with ACK, and the next data phase is DATA1 - * If it is sent, the data1 packet will be sent. - * If it is received, the data1 packet is expected to be received. - * If it is in, the host will send the data1 out packet to complete the status phase after the in completes. - * If it is out, the host will send the data1 in packet to complete the status phase after the out completes. - */ - CH58x_USBFS_DEV->UEP0_CTRL = RB_UEP_R_TOG | RB_UEP_T_TOG | UEP_T_RES_NAK; - /*!< get setup packet */ - usb_dc_cfg.setup = GET_SETUP_PACKET(usb_dc_cfg.ep_out[0].ep_ram_addr); - if (usb_dc_cfg.setup.bmRequestType >> USB_REQUEST_DIR_SHIFT == 0) { - /** - * Ep0 The next in must be the status stage. - * The device must reply to the host data 0 length packet. - * Here, set the transmission length to 0 and the transmission status to ACK, - * and wait for the host to send the in token to retrieve - */ - EPn_SET_TX_LEN(0, 0); - EPn_SET_TX_VALID(0); - } - EPn_SET_RX_NAK(0); - usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&(usb_dc_cfg.setup)); - CH58x_USBFS_DEV->USB_INT_FG = RB_UIF_TRANSFER; - } - } else if (intflag & RB_UIF_BUS_RST) { - /*!< Reset */ - CH58x_USBFS_DEV->USB_DEV_AD = 0; - usbd_event_reset_handler(0); - /*!< Set ep0 rx vaild to start receive setup packet */ - EPn_SET_RX_VALID(0); - CH58x_USBFS_DEV->USB_INT_FG = RB_UIF_BUS_RST; - } else if (intflag & RB_UIF_SUSPEND) { - if (CH58x_USBFS_DEV->USB_MIS_ST & RB_UMS_SUSPEND) { - /*!< Suspend */ - } else { - /*!< Wake up */ - } - CH58x_USBFS_DEV->USB_INT_FG = RB_UIF_SUSPEND; - } else { - CH58x_USBFS_DEV->USB_INT_FG = intflag; - } -} diff --git a/components/drivers/usb/cherryusb/port/ch32/usb_ch58x_usbfs_reg.h b/components/drivers/usb/cherryusb/port/ch32/usb_ch58x_usbfs_reg.h deleted file mode 100644 index f7fda8c62ff..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/usb_ch58x_usbfs_reg.h +++ /dev/null @@ -1,249 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#pragma once - -#define __IO volatile -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define RB_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode -#define RB_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps -#define RB_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable -#define RB_UC_SYS_CTRL1 0x20 // USB system control high bit -#define RB_UC_SYS_CTRL0 0x10 // USB system control low bit -#define MASK_UC_SYS_CTRL 0x30 // bit mask of USB system control -#define RB_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid -#define RB_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear -#define RB_UC_CLR_ALL 0x02 // force clear FIFO and count of USB -#define RB_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB - -#define RB_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable -#define RB_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level -#define RB_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level -#define RB_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed -#define RB_UD_GP_BIT 0x02 // general purpose bit -#define RB_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable - -#define RB_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable -#define RB_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level -#define RB_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level -#define RB_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed -#define RB_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset -#define RB_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached - -#define RB_UIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode -#define RB_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode -#define RB_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow -#define RB_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode -#define RB_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event -#define RB_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion -#define RB_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode -#define RB_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode - -#define RB_UDA_GP_BIT 0x80 // general purpose bit -#define MASK_USB_ADDR 0x7F // bit mask for USB device address - -#define RB_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status -#define RB_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host -#define RB_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status -#define RB_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty) -#define RB_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status -#define RB_UMS_SUSPEND 0x04 // RO, indicate USB suspend status -#define RB_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host -#define RB_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host - -#define RB_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received -#define RB_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK -#define RB_U_SIE_FREE 0x20 // RO, indicate USB SIE free status -#define RB_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear -#define RB_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear -#define RB_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear -#define RB_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear -#define RB_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear -#define RB_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear - -#define RB_UIS_SETUP_ACT 0x80 // RO, indicate SETUP token & 8 bytes setup request received for USB device mode -#define RB_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK -#define RB_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode -#define RB_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode -#define MASK_UIS_TOKEN 0x30 // RO, bit mask of current token PID code received for USB device mode -#define UIS_TOKEN_OUT 0x00 -#define UIS_TOKEN_SOF 0x10 -#define UIS_TOKEN_IN 0x20 -#define UIS_TOKEN_SETUP 0x30 - -#define MASK_UIS_ENDP 0x0F // RO, bit mask of current transfer endpoint number for USB device mode -#define MASK_UIS_H_RES 0x0F // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received - -#define R8_USB_RX_LEN (*((uint8_t *)0x40008008)) // USB receiving length -#define RB_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT) -#define RB_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN) -#define RB_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1 - -#define RB_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT) -#define RB_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN) - -#define RB_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT) -#define RB_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN) -#define RB_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3 -#define RB_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT) -#define RB_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN) -#define RB_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2 - -#define RB_UEP7_RX_EN 0x20 // enable USB endpoint 7 receiving (OUT) -#define RB_UEP7_TX_EN 0x10 // enable USB endpoint 7 transmittal (IN) -#define RB_UEP6_RX_EN 0x08 // enable USB endpoint 6 receiving (OUT) -#define RB_UEP6_TX_EN 0x04 // enable USB endpoint 6 transmittal (IN) -#define RB_UEP5_RX_EN 0x02 // enable USB endpoint 5 receiving (OUT) -#define RB_UEP5_TX_EN 0x01 // enable USB endpoint 5 transmittal (IN) - -#define RB_UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal -#define RB_UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint - -#define RB_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving -#define RB_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint - -#define RB_UEP_R_TOG 0x80 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1 -#define RB_UEP_T_TOG 0x40 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1 -#define RB_UEP_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle -#define RB_UEP_R_RES1 0x08 // handshake response type high bit for USB endpoint X receiving (OUT) -#define RB_UEP_R_RES0 0x04 // handshake response type low bit for USB endpoint X receiving (OUT) -#define MASK_UEP_R_RES 0x0C // bit mask of handshake response type for USB endpoint X receiving (OUT) -#define UEP_R_RES_ACK 0x00 -#define UEP_R_RES_TOUT 0x04 -#define UEP_R_RES_NAK 0x08 -#define UEP_R_RES_STALL 0x0C - -#define RB_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN) -#define RB_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN) -#define MASK_UEP_T_RES 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN) -#define UEP_T_RES_ACK 0x00 -#define UEP_T_RES_TOUT 0x01 -#define UEP_T_RES_NAK 0x02 -#define UEP_T_RES_STALL 0x03 - -#define RB_UH_PRE_PID_EN 0x80 // USB host PRE PID enable for low speed device via hub -#define RB_UH_SOF_EN 0x40 // USB host automatic SOF enable - -#define R8_UH_EP_PID R8_UEP2_T_LEN // host endpoint and PID -#define MASK_UH_TOKEN 0xF0 // bit mask of token PID for USB host transfer -#define MASK_UH_ENDP 0x0F // bit mask of endpoint number for USB host transfer - -#define R8_UH_RX_CTRL R8_UEP2_CTRL // host receiver endpoint control -#define RB_UH_R_TOG 0x80 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1 -#define RB_UH_R_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle -#define RB_UH_R_RES 0x04 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions - -#define R8_UH_TX_LEN R8_UEP3_T_LEN // host transmittal endpoint transmittal length - -#define RB_UH_T_TOG 0x40 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1 -#define RB_UH_T_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle -#define RB_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions - -#define R16_PIN_ANALOG_IE (*((uint16_t *)0x4000101A)) // RW, analog pin enable and digital input disable -#define RB_PIN_USB_IE 0x80 // RW, USB analog I/O enable: 0=analog I/O disable, 1=analog I/O enable -#define RB_PIN_USB_DP_PU 0x40 // RW, USB UDP internal pullup resistance enable: 0=enable/disable by RB_UC_DEV_PU_EN, 1=enable pullup, replace RB_UC_DEV_PU_EN under sleep mode -#define RB_PIN_USB2_IE 0x20 // RW, USB2 analog I/O enable: 0=analog I/O disable, 1=analog I/O enable -#define RB_PIN_USB2_DP_PU 0x10 // RW, USB2 UDP internal pullup resistance enable: 0=enable/disable by RB_UC_DEV_PU_EN, 1=enable pullup, replace RB_UC_DEV_PU_EN under sleep mode -/*!< USB Regs */ -typedef struct -{ - __IO uint8_t USB_CTRL; /*!< 0x40008000 */ - union { - __IO uint8_t UDEV_CTRL; /*!< 0x40008001 */ - __IO uint8_t UHOST_CTRL; /*!< 0x40008001 */ - }; - __IO uint8_t USB_INT_EN; /*!< 0x40008002 */ - __IO uint8_t USB_DEV_AD; /*!< 0x40008003 */ - __IO uint8_t USB_STATUS0; /*!< 0x40008004 */ - __IO uint8_t USB_MIS_ST; /*!< 0x40008005 */ - __IO uint8_t USB_INT_FG; /*!< 0x40008006 */ - __IO uint8_t USB_INT_ST; /*!< 0x40008007 */ - __IO uint8_t USB_RX_LEN; /*!< 0x40008008 */ - __IO uint8_t Reserve1; /*!< 0x40008009 */ - __IO uint8_t Reserve2; /*!< 0x4000800a */ - __IO uint8_t Reserve3; /*!< 0x4000800b */ - __IO uint8_t UEP4_1_MOD; /*!< 0x4000800c */ - union { - __IO uint8_t UEP2_3_MOD; /*!< 0x4000800d */ - __IO uint8_t UH_EP_MOD; /*!< 0x4000800d */ - }; - __IO uint8_t UEP567_MOD; /*!< 0x4000800e */ - __IO uint8_t Reserve4; /*!< 0x4000800f */ - __IO uint16_t UEP0_DMA; /*!< 0x40008010 */ - __IO uint16_t Reserve5; /*!< 0x40008012 */ - __IO uint16_t UEP1_DMA; /*!< 0x40008014 */ - __IO uint16_t Reserve6; /*!< 0x40008016 */ - union { - __IO uint16_t UEP2_DMA; /*!< 0x40008018 */ - __IO uint16_t UH_RX_DMA; /*!< 0x40008018 */ - }; - __IO uint16_t Reserve7; /*!< 0x4000801a */ - union { - __IO uint16_t UEP3_DMA; /*!< 0x4000801c */ - __IO uint16_t UH_TX_DMA; /*!< 0x4000801c */ - }; - __IO uint16_t Reserve8; /*!< 0x4000801e */ - __IO uint8_t UEP0_T_LEN; /*!< 0x40008020 */ - __IO uint8_t Reserve9; /*!< 0x40008021 */ - __IO uint8_t UEP0_CTRL; /*!< 0x40008022 */ - __IO uint8_t Reserve10; /*!< 0x40008023 */ - __IO uint8_t UEP1_T_LEN; /*!< 0x40008024 */ - __IO uint8_t Reserve11; /*!< 0x40008025 */ - union { - __IO uint8_t UEP1_CTRL; /*!< 0x40008026 */ - __IO uint8_t UH_SETUP; /*!< 0x40008026 */ - }; - __IO uint8_t Reserve12; /*!< 0x40008027 */ - union { - __IO uint8_t UEP2_T_LEN; /*!< 0x40008028 */ - __IO uint8_t UH_EP_PID; /*!< 0x40008028 */ - }; - __IO uint8_t Reserve13; /*!< 0x40008029 */ - union { - __IO uint8_t UEP2_CTRL; /*!< 0x4000802a */ - __IO uint8_t UH_RX_CTRL; /*!< 0x4000802a */ - }; - __IO uint8_t Reserve14; /*!< 0x4000802b */ - union { - __IO uint8_t UEP3_T_LEN; /*!< 0x4000802c */ - __IO uint8_t UH_TX_LEN; /*!< 0x4000802c */ - }; - __IO uint8_t Reserve15; /*!< 0x4000802d */ - union { - __IO uint8_t UEP3_CTRL; /*!< 0x4000802e */ - __IO uint8_t UH_TX_CTRL; /*!< 0x4000802e */ - }; - __IO uint8_t Reserve16; /*!< 0x4000802f */ - __IO uint8_t UEP4_T_LEN; /*!< 0x40008030 */ - __IO uint8_t Reserve17; /*!< 0x40008031 */ - __IO uint8_t UEP4_CTRL; /*!< 0x40008032 */ - __IO uint8_t Reserve18[33]; /*!< 0x40008033 */ - __IO uint16_t UEP5_DMA; /*!< 0x40008054 */ - __IO uint16_t Reserve19; /*!< 0x40008056 */ - __IO uint16_t UEP6_DMA; /*!< 0x40008058 */ - __IO uint16_t Reserve20; /*!< 0x4000805a */ - __IO uint16_t UEP7_DMA; /*!< 0x4000805c */ - __IO uint8_t Reserve21[6]; /*!< 0x4000805e */ - __IO uint8_t UEP5_T_LEN; /*!< 0x40008064 */ - __IO uint8_t Reserve22; /*!< 0x40008065 */ - __IO uint8_t UEP5_CTRL; /*!< 0x40008066 */ - __IO uint8_t Reserve23; /*!< 0x40008067 */ - __IO uint8_t UEP6_T_LEN; /*!< 0x40008068 */ - __IO uint8_t Reserve24; /*!< 0x40008069 */ - __IO uint8_t UEP6_CTRL; /*!< 0x4000806a */ - __IO uint8_t Reserve25; /*!< 0x4000806b */ - __IO uint8_t UEP7_T_LEN; /*!< 0x4000806c */ - __IO uint8_t Reserve26; /*!< 0x4000806d */ - __IO uint8_t UEP7_CTRL; /*!< 0x4000806e */ -} USB_FS_TypeDef; - -#ifdef __cplusplus -} -#endif diff --git a/components/drivers/usb/cherryusb/port/ch32/usb_dc_usbfs.c b/components/drivers/usb/cherryusb/port/ch32/usb_dc_usbfs.c deleted file mode 100644 index 7aabd411fcd..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/usb_dc_usbfs.c +++ /dev/null @@ -1,409 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#include "usbd_core.h" -#include "usb_ch32_usbfs_reg.h" - -#ifdef CONFIG_USB_HS -#error "usb fs do not support hs" -#endif - -#ifndef USBD_IRQHandler -#define USBD_IRQHandler OTG_FS_IRQHandler //use actual usb irq name instead -#endif - -#ifndef USB_NUM_BIDIR_ENDPOINTS -#define USB_NUM_BIDIR_ENDPOINTS 8 -#endif - -#define USB_SET_DMA(ep_idx, addr) (*(volatile uint32_t *)((uint32_t)(&USBFS_DEVICE->UEP0_DMA) + 4 * ep_idx) = addr) -#define USB_SET_TX_LEN(ep_idx, len) (*(volatile uint16_t *)((uint32_t)(&USBFS_DEVICE->UEP0_TX_LEN) + 4 * ep_idx) = len) -#define USB_GET_TX_LEN(ep_idx) (*(volatile uint16_t *)((uint32_t)(&USBFS_DEVICE->UEP0_TX_LEN) + 4 * ep_idx)) -#define USB_SET_TX_CTRL(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(&USBFS_DEVICE->UEP0_TX_CTRL) + 4 * ep_idx) = val) -#define USB_GET_TX_CTRL(ep_idx) (*(volatile uint8_t *)((uint32_t)(&USBFS_DEVICE->UEP0_TX_CTRL) + 4 * ep_idx)) -#define USB_SET_RX_CTRL(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(&USBFS_DEVICE->UEP0_RX_CTRL) + 4 * ep_idx) = val) -#define USB_GET_RX_CTRL(ep_idx) (*(volatile uint8_t *)((uint32_t)(&USBFS_DEVICE->UEP0_RX_CTRL) + 4 * ep_idx)) - -/* Endpoint state */ -struct ch32_usbfs_ep_state { - uint16_t ep_mps; /* Endpoint max packet size */ - uint8_t ep_type; /* Endpoint type */ - uint8_t ep_stalled; /* Endpoint stall flag */ - uint8_t ep_enable; /* Endpoint enable */ - uint8_t *xfer_buf; - uint32_t xfer_len; - uint32_t actual_xfer_len; -}; - -/* Driver state */ -struct ch32_usbfs_udc { - __attribute__((aligned(4))) struct usb_setup_packet setup; - volatile uint8_t dev_addr; - struct ch32_usbfs_ep_state in_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< IN endpoint parameters*/ - struct ch32_usbfs_ep_state out_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< OUT endpoint parameters */ - __attribute__((aligned(4))) uint8_t ep_databuf[USB_NUM_BIDIR_ENDPOINTS - 1][64 + 64]; //epx_out(64)+epx_in(64) -} g_ch32_usbfs_udc; - -volatile bool ep0_rx_data_toggle; -volatile bool ep0_tx_data_toggle; - -void USBD_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); - -__WEAK void usb_dc_low_level_init(void) -{ -} - -__WEAK void usb_dc_low_level_deinit(void) -{ -} - -int usb_dc_init(uint8_t busid) -{ - usb_dc_low_level_init(); - - USBFS_DEVICE->BASE_CTRL = 0x00; - - USBFS_DEVICE->UEP4_1_MOD = USBFS_UEP4_RX_EN | USBFS_UEP4_TX_EN | USBFS_UEP1_RX_EN | USBFS_UEP1_TX_EN; - USBFS_DEVICE->UEP2_3_MOD = USBFS_UEP2_RX_EN | USBFS_UEP2_TX_EN | USBFS_UEP3_RX_EN | USBFS_UEP3_TX_EN; - USBFS_DEVICE->UEP5_6_MOD = USBFS_UEP5_RX_EN | USBFS_UEP5_TX_EN | USBFS_UEP6_RX_EN | USBFS_UEP6_TX_EN; - USBFS_DEVICE->UEP7_MOD = USBFS_UEP7_RX_EN | USBFS_UEP7_TX_EN; - - USBFS_DEVICE->UEP1_DMA = (uint32_t)g_ch32_usbfs_udc.ep_databuf[0]; - USBFS_DEVICE->UEP2_DMA = (uint32_t)g_ch32_usbfs_udc.ep_databuf[1]; - USBFS_DEVICE->UEP3_DMA = (uint32_t)g_ch32_usbfs_udc.ep_databuf[2]; - USBFS_DEVICE->UEP4_DMA = (uint32_t)g_ch32_usbfs_udc.ep_databuf[3]; - USBFS_DEVICE->UEP5_DMA = (uint32_t)g_ch32_usbfs_udc.ep_databuf[4]; - USBFS_DEVICE->UEP6_DMA = (uint32_t)g_ch32_usbfs_udc.ep_databuf[5]; - USBFS_DEVICE->UEP7_DMA = (uint32_t)g_ch32_usbfs_udc.ep_databuf[6]; - - USBFS_DEVICE->INT_FG = 0xFF; - USBFS_DEVICE->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER; - USBFS_DEVICE->DEV_ADDR = 0x00; - - USBFS_DEVICE->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN; - USBFS_DEVICE->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN; - return 0; -} - -int usb_dc_deinit(uint8_t busid) -{ - return 0; -} - -int usbd_set_address(uint8_t busid, const uint8_t addr) -{ - if (addr == 0) { - USBFS_DEVICE->DEV_ADDR = (USBFS_DEVICE->DEV_ADDR & USBFS_UDA_GP_BIT) | 0; - } - g_ch32_usbfs_udc.dev_addr = addr; - return 0; -} - -int usbd_set_remote_wakeup(uint8_t busid) -{ - return -1; -} - -uint8_t usbd_get_port_speed(uint8_t busid) -{ - return USB_SPEED_FULL; -} - -int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress); - - if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { - g_ch32_usbfs_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_ch32_usbfs_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - g_ch32_usbfs_udc.out_ep[ep_idx].ep_enable = true; - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_NAK | USBFS_UEP_AUTO_TOG); - } else { - g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_ch32_usbfs_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - g_ch32_usbfs_udc.in_ep[ep_idx].ep_enable = true; - USB_SET_TX_CTRL(ep_idx, USBFS_UEP_T_RES_NAK | USBFS_UEP_AUTO_TOG); - } - return 0; -} -int usbd_ep_close(uint8_t busid, const uint8_t ep) -{ - return 0; -} -int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (USB_EP_DIR_IS_OUT(ep)) { - if (ep_idx == 0) { - USBFS_DEVICE->UEP0_RX_CTRL = USBFS_UEP_R_TOG | USBFS_UEP_R_RES_STALL; - } else { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_STALL); - } - } else { - if (ep_idx == 0) { - USBFS_DEVICE->UEP0_TX_CTRL = USBFS_UEP_T_TOG | USBFS_UEP_T_RES_STALL; - } else { - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_STALL); - } - } - - if (ep_idx == 0) { - USB_SET_DMA(ep_idx, (uint32_t)&g_ch32_usbfs_udc.setup); - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_ACK); - } - return 0; -} - -int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (ep_idx == 0) { - return 0; - } - - if (USB_EP_DIR_IS_OUT(ep)) { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~(USBFS_UEP_R_TOG | USBFS_UEP_R_RES_MASK)) | USBFS_UEP_R_RES_ACK); - } else { - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~(USBFS_UEP_T_TOG | USBFS_UEP_T_RES_MASK)) | USBFS_UEP_T_RES_NAK); - } - return 0; -} - -int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) -{ - return 0; -} - -int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!g_ch32_usbfs_udc.in_ep[ep_idx].ep_enable) { - return -2; - } - - if ((uint32_t)data & 0x03) { - printf("data do not align4\r\n"); - return -3; - } - - g_ch32_usbfs_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data; - g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len = data_len; - g_ch32_usbfs_udc.in_ep[ep_idx].actual_xfer_len = 0; - - if (ep_idx == 0) { - if (data_len == 0) { - USB_SET_TX_LEN(ep_idx, 0); - } else { - data_len = MIN(data_len, g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps); - USB_SET_TX_LEN(ep_idx, data_len); - USB_SET_DMA(ep_idx, (uint32_t)data); - } - if (ep0_tx_data_toggle) { - USB_SET_TX_CTRL(ep_idx, USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK); - } else { - USB_SET_TX_CTRL(ep_idx, USBFS_UEP_T_RES_ACK); - } - - } else { - if (data_len == 0) { - USB_SET_TX_LEN(ep_idx, 0); - } else { - data_len = MIN(data_len, g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps); - USB_SET_TX_LEN(ep_idx, data_len); - memcpy(&g_ch32_usbfs_udc.ep_databuf[ep_idx - 1][64], data, data_len); - } - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK); - } - return 0; -} - -int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!g_ch32_usbfs_udc.out_ep[ep_idx].ep_enable) { - return -2; - } - if ((uint32_t)data & 0x03) { - printf("data do not align4\r\n"); - return -3; - } - - g_ch32_usbfs_udc.out_ep[ep_idx].xfer_buf = (uint8_t *)data; - g_ch32_usbfs_udc.out_ep[ep_idx].xfer_len = data_len; - g_ch32_usbfs_udc.out_ep[ep_idx].actual_xfer_len = 0; - - if (ep_idx == 0) { - if (data_len == 0) { - } else { - USB_SET_DMA(ep_idx, (uint32_t)data); - } - if (ep0_rx_data_toggle) { - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_TOG | USBFS_UEP_R_RES_ACK); - } else { - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_ACK); - } - return 0; - } else { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK); - } - - return 0; -} - -void USBD_IRQHandler(void) -{ - uint32_t ep_idx = 0, token, write_count, read_count; - uint8_t intflag = 0; - - intflag = USBFS_DEVICE->INT_FG; - - if (intflag & USBFS_UIF_TRANSFER) { - token = USBFS_DEVICE->INT_ST & USBFS_UIS_TOKEN_MASK; - ep_idx = USBFS_DEVICE->INT_ST & USBFS_UIS_ENDP_MASK; - switch (token) { - case USBFS_UIS_TOKEN_SETUP: - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_NAK); - usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_ch32_usbfs_udc.setup); - break; - - case USBFS_UIS_TOKEN_IN: - if (ep_idx == 0x00) { - if (g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len >= g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps) { - g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len -= g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps; - g_ch32_usbfs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps; - ep0_tx_data_toggle ^= 1; - } else { - g_ch32_usbfs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len; - g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len = 0; - ep0_tx_data_toggle = true; - } - - usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_ch32_usbfs_udc.in_ep[ep_idx].actual_xfer_len); - - if (g_ch32_usbfs_udc.dev_addr > 0) { - USBFS_DEVICE->DEV_ADDR = (USBFS_DEVICE->DEV_ADDR & USBFS_UDA_GP_BIT) | g_ch32_usbfs_udc.dev_addr; - g_ch32_usbfs_udc.dev_addr = 0; - } - - if (g_ch32_usbfs_udc.setup.wLength && ((g_ch32_usbfs_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { - /* In status, start reading setup */ - USB_SET_DMA(ep_idx, (uint32_t)&g_ch32_usbfs_udc.setup); - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_ACK); - ep0_tx_data_toggle = true; - - } else if (g_ch32_usbfs_udc.setup.wLength == 0) { - /* In status, start reading setup */ - USB_SET_DMA(ep_idx, (uint32_t)&g_ch32_usbfs_udc.setup); - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_ACK); - ep0_tx_data_toggle = true; - } - } else { - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK); - - if (g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len > g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps) { - g_ch32_usbfs_udc.in_ep[ep_idx].xfer_buf += g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps; - g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len -= g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps; - g_ch32_usbfs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps; - - write_count = MIN(g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len, g_ch32_usbfs_udc.in_ep[ep_idx].ep_mps); - USB_SET_TX_LEN(ep_idx, write_count); - memcpy(&g_ch32_usbfs_udc.ep_databuf[ep_idx - 1][64], g_ch32_usbfs_udc.in_ep[ep_idx].xfer_buf, write_count); - - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK); - } else { - g_ch32_usbfs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len; - g_ch32_usbfs_udc.in_ep[ep_idx].xfer_len = 0; - usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_ch32_usbfs_udc.in_ep[ep_idx].actual_xfer_len); - } - } - break; - case USBFS_UIS_TOKEN_OUT: - if (ep_idx == 0x00) { - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_NAK); - - read_count = USBFS_DEVICE->RX_LEN; - - g_ch32_usbfs_udc.out_ep[ep_idx].actual_xfer_len += read_count; - g_ch32_usbfs_udc.out_ep[ep_idx].xfer_len -= read_count; - - usbd_event_ep_out_complete_handler(0, 0x00, g_ch32_usbfs_udc.out_ep[ep_idx].actual_xfer_len); - - if (read_count == 0) { - /* Out status, start reading setup */ - USB_SET_DMA(ep_idx, (uint32_t)&g_ch32_usbfs_udc.setup); - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_ACK); - ep0_rx_data_toggle = true; - ep0_tx_data_toggle = true; - } else { - ep0_rx_data_toggle ^= 1; - } - } else { - if (USBFS_DEVICE->INT_ST & USBFS_UIS_TOG_OK) { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK); - read_count = USBFS_DEVICE->RX_LEN; - - memcpy(g_ch32_usbfs_udc.out_ep[ep_idx].xfer_buf, &g_ch32_usbfs_udc.ep_databuf[ep_idx - 1][0], read_count); - - g_ch32_usbfs_udc.out_ep[ep_idx].xfer_buf += read_count; - g_ch32_usbfs_udc.out_ep[ep_idx].actual_xfer_len += read_count; - g_ch32_usbfs_udc.out_ep[ep_idx].xfer_len -= read_count; - - if ((read_count < g_ch32_usbfs_udc.out_ep[ep_idx].ep_mps) || (g_ch32_usbfs_udc.out_ep[ep_idx].xfer_len == 0)) { - usbd_event_ep_out_complete_handler(0, ep_idx, g_ch32_usbfs_udc.out_ep[ep_idx].actual_xfer_len); - } else { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK); - } - } - } - break; - - case USBFS_UIS_TOKEN_SOF: - - break; - - default: - break; - } - - USBFS_DEVICE->INT_FG = USBFS_UIF_TRANSFER; - } else if (intflag & USBFS_UIF_BUS_RST) { - USBFS_DEVICE->UEP0_TX_LEN = 0; - USBFS_DEVICE->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK; - USBFS_DEVICE->UEP0_RX_CTRL = USBFS_UEP_R_RES_NAK; - - for (uint8_t ep_idx = 1; ep_idx < USB_NUM_BIDIR_ENDPOINTS; ep_idx++) { - USB_SET_TX_LEN(ep_idx, 0); - USB_SET_TX_CTRL(ep_idx, USBFS_UEP_T_RES_NAK | USBFS_UEP_AUTO_TOG); - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_NAK | USBFS_UEP_AUTO_TOG); - } - - ep0_tx_data_toggle = true; - ep0_rx_data_toggle = true; - - memset(&g_ch32_usbfs_udc, 0, sizeof(struct ch32_usbfs_udc)); - usbd_event_reset_handler(0); - USB_SET_DMA(ep_idx, (uint32_t)&g_ch32_usbfs_udc.setup); - USB_SET_RX_CTRL(ep_idx, USBFS_UEP_R_RES_ACK); - - USBFS_DEVICE->INT_FG |= USBFS_UIF_BUS_RST; - } else if (intflag & USBFS_UIF_SUSPEND) { - if (USBFS_DEVICE->MIS_ST & USBFS_UMS_SUSPEND) { - } else { - } - USBFS_DEVICE->INT_FG = USBFS_UIF_SUSPEND; - } else { - USBFS_DEVICE->INT_FG = intflag; - } -} diff --git a/components/drivers/usb/cherryusb/port/ch32/usb_dc_usbhs.c b/components/drivers/usb/cherryusb/port/ch32/usb_dc_usbhs.c deleted file mode 100644 index a8d3036a357..00000000000 --- a/components/drivers/usb/cherryusb/port/ch32/usb_dc_usbhs.c +++ /dev/null @@ -1,387 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#include "usbd_core.h" -#include "usb_ch32_usbhs_reg.h" - -#ifndef USBD_IRQHandler -#define USBD_IRQHandler USBHS_IRQHandler //use actual usb irq name instead -#endif - -#ifndef USB_NUM_BIDIR_ENDPOINTS -#define USB_NUM_BIDIR_ENDPOINTS 16 -#endif - -#define USB_SET_RX_DMA(ep_idx, addr) (*(volatile uint32_t *)((uint32_t)(&USBHS_DEVICE->UEP1_RX_DMA) + 4 * (ep_idx - 1)) = addr) -#define USB_SET_TX_DMA(ep_idx, addr) (*(volatile uint32_t *)((uint32_t)(&USBHS_DEVICE->UEP1_TX_DMA) + 4 * (ep_idx - 1)) = addr) -#define USB_SET_MAX_LEN(ep_idx, len) (*(volatile uint16_t *)((uint32_t)(&USBHS_DEVICE->UEP0_MAX_LEN) + 4 * ep_idx) = len) -#define USB_SET_TX_LEN(ep_idx, len) (*(volatile uint16_t *)((uint32_t)(&USBHS_DEVICE->UEP0_TX_LEN) + 4 * ep_idx) = len) -#define USB_GET_TX_LEN(ep_idx) (*(volatile uint16_t *)((uint32_t)(&USBHS_DEVICE->UEP0_TX_LEN) + 4 * ep_idx)) -#define USB_SET_TX_CTRL(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(&USBHS_DEVICE->UEP0_TX_CTRL) + 4 * ep_idx) = val) -#define USB_GET_TX_CTRL(ep_idx) (*(volatile uint8_t *)((uint32_t)(&USBHS_DEVICE->UEP0_TX_CTRL) + 4 * ep_idx)) -#define USB_SET_RX_CTRL(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(&USBHS_DEVICE->UEP0_RX_CTRL) + 4 * ep_idx) = val) -#define USB_GET_RX_CTRL(ep_idx) (*(volatile uint8_t *)((uint32_t)(&USBHS_DEVICE->UEP0_RX_CTRL) + 4 * ep_idx)) - -/* Endpoint state */ -struct ch32_usbhs_ep_state { - uint16_t ep_mps; /* Endpoint max packet size */ - uint8_t ep_type; /* Endpoint type */ - uint8_t ep_stalled; /* Endpoint stall flag */ - uint8_t ep_enable; /* Endpoint enable */ - uint8_t *xfer_buf; - uint32_t xfer_len; - uint32_t actual_xfer_len; -}; - -/* Driver state */ -struct ch32_usbhs_udc { - __attribute__((aligned(4))) struct usb_setup_packet setup; - volatile uint8_t dev_addr; - struct ch32_usbhs_ep_state in_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< IN endpoint parameters*/ - struct ch32_usbhs_ep_state out_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< OUT endpoint parameters */ -} g_ch32_usbhs_udc; - -void USBHS_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); - -volatile uint8_t mps_over_flag = 0; -volatile bool ep0_rx_data_toggle; -volatile bool ep0_tx_data_toggle; -volatile bool epx_tx_data_toggle[USB_NUM_BIDIR_ENDPOINTS - 1]; - -__WEAK void usb_dc_low_level_init(void) -{ -} - -__WEAK void usb_dc_low_level_deinit(void) -{ -} - -int usb_dc_init(uint8_t busid) -{ - usb_dc_low_level_init(); - - USBHS_DEVICE->HOST_CTRL = 0x00; - USBHS_DEVICE->HOST_CTRL = USBHS_PHY_SUSPENDM; - - USBHS_DEVICE->CONTROL = 0; -#ifdef CONFIG_USB_HS - USBHS_DEVICE->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_HIGH_SPEED; -#else - USBHS_DEVICE->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_FULL_SPEED; -#endif - - USBHS_DEVICE->INT_FG = 0xff; - USBHS_DEVICE->INT_EN = 0; - USBHS_DEVICE->INT_EN = USBHS_SETUP_ACT_EN | USBHS_TRANSFER_EN | USBHS_DETECT_EN; - - /* ALL endpoint enable */ - USBHS_DEVICE->ENDP_CONFIG = 0xffffffff; - - USBHS_DEVICE->ENDP_TYPE = 0x00; - USBHS_DEVICE->BUF_MODE = 0x00; - - USBHS_DEVICE->CONTROL |= USBHS_DEV_PU_EN; - - return 0; -} - -int usb_dc_deinit(uint8_t busid) -{ - return 0; -} - -int usbd_set_address(uint8_t busid, const uint8_t addr) -{ - if (addr == 0) { - USBHS_DEVICE->DEV_AD = addr & 0xff; - } - g_ch32_usbhs_udc.dev_addr = addr; - return 0; -} - -int usbd_set_remote_wakeup(uint8_t busid) -{ - return -1; -} - -uint8_t usbd_get_port_speed(uint8_t busid) -{ - return USB_SPEED_HIGH; -} - -int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress); - - if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { - g_ch32_usbhs_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_ch32_usbhs_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - g_ch32_usbhs_udc.out_ep[ep_idx].ep_enable = true; - USBHS_DEVICE->ENDP_CONFIG |= (1 << (ep_idx + 16)); - USB_SET_RX_CTRL(ep_idx, USBHS_EP_R_RES_NAK | USBHS_EP_R_TOG_0 | USBHS_EP_R_AUTOTOG); - } else { - g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_ch32_usbhs_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - g_ch32_usbhs_udc.in_ep[ep_idx].ep_enable = true; - USBHS_DEVICE->ENDP_CONFIG |= (1 << (ep_idx)); - USB_SET_TX_CTRL(ep_idx, USBHS_EP_T_RES_NAK | USBHS_EP_T_TOG_0 | USBHS_EP_T_AUTOTOG); - } - USB_SET_MAX_LEN(ep_idx, USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize)); - return 0; -} - -int usbd_ep_close(uint8_t busid, const uint8_t ep) -{ - return 0; -} - -int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (USB_EP_DIR_IS_OUT(ep)) { - if (ep_idx == 0) { - USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_STALL; - } else { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBHS_EP_R_RES_MASK) | USBHS_EP_R_RES_STALL); - } - } else { - if (ep_idx == 0) { - USBHS_DEVICE->UEP0_TX_CTRL = USBHS_EP_T_RES_STALL; - } else { - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~USBHS_EP_T_RES_MASK) | USBHS_EP_T_RES_STALL); - } - } - - return 0; -} - -int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (USB_EP_DIR_IS_OUT(ep)) { - USB_SET_RX_CTRL(ep_idx, USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_0); - } else { - USB_SET_TX_CTRL(ep_idx, USBHS_EP_T_RES_NAK | USBHS_EP_T_TOG_0); - } - return 0; -} - -int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) -{ - return 0; -} - -int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - uint32_t tmp; - - if (!data && data_len) { - return -1; - } - if (!g_ch32_usbhs_udc.in_ep[ep_idx].ep_enable) { - return -2; - } - if ((uint32_t)data & 0x03) { - return -3; - } - - g_ch32_usbhs_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data; - g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len = data_len; - g_ch32_usbhs_udc.in_ep[ep_idx].actual_xfer_len = 0; - - if (ep_idx == 0) { - if (data_len == 0) { - USB_SET_TX_LEN(ep_idx, 0); - } else { - data_len = MIN(data_len, g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps); - USB_SET_TX_LEN(ep_idx, data_len); - USBHS_DEVICE->UEP0_DMA = (uint32_t)data; - } - tmp = ep0_tx_data_toggle ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0; - USBHS_DEVICE->UEP0_TX_CTRL = USBHS_EP_T_RES_ACK | tmp; - } else { - if (data_len == 0) { - USB_SET_TX_LEN(ep_idx, 0); - } else { - data_len = MIN(data_len, g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps); - USB_SET_TX_LEN(ep_idx, data_len); - USB_SET_TX_DMA(ep_idx, (uint32_t)data); - } - tmp = USB_GET_TX_CTRL(ep_idx); - tmp &= ~(USBHS_EP_T_RES_MASK | USBHS_EP_T_TOG_MASK); - tmp |= USBHS_EP_T_RES_ACK; - tmp |= (epx_tx_data_toggle[ep_idx - 1] ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); - USB_SET_TX_CTRL(ep_idx, tmp); - } - return 0; -} - -int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!g_ch32_usbhs_udc.out_ep[ep_idx].ep_enable) { - return -2; - } - if ((uint32_t)data & 0x03) { - return -3; - } - - g_ch32_usbhs_udc.out_ep[ep_idx].xfer_buf = (uint8_t *)data; - g_ch32_usbhs_udc.out_ep[ep_idx].xfer_len = data_len; - g_ch32_usbhs_udc.out_ep[ep_idx].actual_xfer_len = 0; - - if (ep_idx == 0) { - if (data_len == 0) { - USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_1; - } else { - USBHS_DEVICE->UEP0_DMA = (uint32_t)data; - USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | (ep0_rx_data_toggle ? USBHS_EP_R_TOG_1 : USBHS_EP_R_TOG_0); - } - return 0; - } else { - USB_SET_RX_DMA(ep_idx, (uint32_t)data); - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBHS_EP_R_RES_MASK) | USBHS_EP_R_RES_ACK); - } - - return 0; -} - -void USBD_IRQHandler(void) -{ - uint32_t ep_idx, token, write_count, read_count; - uint8_t intflag = 0; - - intflag = USBHS_DEVICE->INT_FG; - - if (intflag & USBHS_TRANSFER_FLAG) { - ep_idx = (USBHS_DEVICE->INT_ST) & MASK_UIS_ENDP; - token = (((USBHS_DEVICE->INT_ST) & MASK_UIS_TOKEN) >> 4) & 0x03; - - if (token == PID_IN) { - if (ep_idx == 0x00) { - if (g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len >= g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps) { - g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len -= g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps; - g_ch32_usbhs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps; - ep0_tx_data_toggle ^= 1; - } else { - g_ch32_usbhs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len; - g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len = 0; - ep0_tx_data_toggle = true; - } - - usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_ch32_usbhs_udc.in_ep[ep_idx].actual_xfer_len); - - if (g_ch32_usbhs_udc.dev_addr > 0) { - USBHS_DEVICE->DEV_AD = g_ch32_usbhs_udc.dev_addr & 0xff; - g_ch32_usbhs_udc.dev_addr = 0; - } - - if (g_ch32_usbhs_udc.setup.wLength && ((g_ch32_usbhs_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { - /* In status, start reading setup */ - USBHS_DEVICE->UEP0_DMA = (uint32_t)&g_ch32_usbhs_udc.setup; - USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; - ep0_tx_data_toggle = true; - - } else if (g_ch32_usbhs_udc.setup.wLength == 0) { - /* In status, start reading setup */ - USBHS_DEVICE->UEP0_DMA = (uint32_t)&g_ch32_usbhs_udc.setup; - USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; - ep0_tx_data_toggle = true; - } - } else { - USB_SET_TX_CTRL(ep_idx, (USB_GET_TX_CTRL(ep_idx) & ~(USBHS_EP_T_RES_MASK | USBHS_EP_T_TOG_MASK)) | USBHS_EP_T_RES_NAK | USBHS_EP_T_TOG_0); - - if (g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len > g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps) { - g_ch32_usbhs_udc.in_ep[ep_idx].xfer_buf += g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps; - g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len -= g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps; - g_ch32_usbhs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps; - epx_tx_data_toggle[ep_idx - 1] ^= 1; - - write_count = MIN(g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len, g_ch32_usbhs_udc.in_ep[ep_idx].ep_mps); - USB_SET_TX_LEN(ep_idx, write_count); - USB_SET_TX_DMA(ep_idx, (uint32_t)g_ch32_usbhs_udc.in_ep[ep_idx].xfer_buf); - - uint32_t tmp = USB_GET_TX_CTRL(ep_idx); - tmp &= ~(USBHS_EP_T_RES_MASK | USBHS_EP_T_TOG_MASK); - tmp |= USBHS_EP_T_RES_ACK; - tmp |= (epx_tx_data_toggle[ep_idx - 1] ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); - USB_SET_TX_CTRL(ep_idx, tmp); - } else { - g_ch32_usbhs_udc.in_ep[ep_idx].actual_xfer_len += g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len; - g_ch32_usbhs_udc.in_ep[ep_idx].xfer_len = 0; - epx_tx_data_toggle[ep_idx - 1] ^= 1; - usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_ch32_usbhs_udc.in_ep[ep_idx].actual_xfer_len); - } - } - } else if (token == PID_OUT) { - if (ep_idx == 0x00) { - read_count = USBHS_DEVICE->RX_LEN; - - g_ch32_usbhs_udc.out_ep[ep_idx].actual_xfer_len += read_count; - g_ch32_usbhs_udc.out_ep[ep_idx].xfer_len -= read_count; - - usbd_event_ep_out_complete_handler(0, 0x00, g_ch32_usbhs_udc.out_ep[ep_idx].actual_xfer_len); - - if (read_count == 0) { - /* Out status, start reading setup */ - USBHS_DEVICE->UEP0_DMA = (uint32_t)&g_ch32_usbhs_udc.setup; - USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; - ep0_rx_data_toggle = true; - ep0_tx_data_toggle = true; - } else { - ep0_rx_data_toggle ^= 1; - } - } else { - if (USBHS_DEVICE->INT_ST & USBHS_DEV_UIS_TOG_OK) { - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBHS_EP_R_RES_MASK) | USBHS_EP_R_RES_NAK); - read_count = USBHS_DEVICE->RX_LEN; - - g_ch32_usbhs_udc.out_ep[ep_idx].xfer_buf += read_count; - g_ch32_usbhs_udc.out_ep[ep_idx].actual_xfer_len += read_count; - g_ch32_usbhs_udc.out_ep[ep_idx].xfer_len -= read_count; - - if ((read_count < g_ch32_usbhs_udc.out_ep[ep_idx].ep_mps) || (g_ch32_usbhs_udc.out_ep[ep_idx].xfer_len == 0)) { - usbd_event_ep_out_complete_handler(0, ep_idx, g_ch32_usbhs_udc.out_ep[ep_idx].actual_xfer_len); - } else { - USB_SET_RX_DMA(ep_idx, (uint32_t)g_ch32_usbhs_udc.out_ep[ep_idx].xfer_buf); - USB_SET_RX_CTRL(ep_idx, (USB_GET_RX_CTRL(ep_idx) & ~USBHS_EP_R_RES_MASK) | USBHS_EP_R_RES_ACK); - } - } - } - } - USBHS_DEVICE->INT_FG = USBHS_TRANSFER_FLAG; - } else if (intflag & USBHS_SETUP_FLAG) { - usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_ch32_usbhs_udc.setup); - USBHS_DEVICE->INT_FG = USBHS_SETUP_FLAG; - } else if (intflag & USBHS_DETECT_FLAG) { - USBHS_DEVICE->ENDP_CONFIG = USBHS_EP0_T_EN | USBHS_EP0_R_EN; - - USBHS_DEVICE->UEP0_TX_LEN = 0; - USBHS_DEVICE->UEP0_TX_CTRL = USBHS_EP_T_RES_NAK; - - ep0_tx_data_toggle = true; - ep0_rx_data_toggle = true; - - for (uint8_t ep_idx = 1; ep_idx < USB_NUM_BIDIR_ENDPOINTS; ep_idx++) { - USB_SET_TX_LEN(ep_idx, 0); - USB_SET_TX_CTRL(ep_idx, USBHS_EP_T_AUTOTOG | USBHS_EP_T_RES_NAK); // autotog does not work - USB_SET_RX_CTRL(ep_idx, USBHS_EP_R_AUTOTOG | USBHS_EP_R_RES_NAK); - epx_tx_data_toggle[ep_idx - 1] = false; - } - - memset(&g_ch32_usbhs_udc, 0, sizeof(struct ch32_usbhs_udc)); - usbd_event_reset_handler(0); - USBHS_DEVICE->UEP0_DMA = (uint32_t)&g_ch32_usbhs_udc.setup; - USBHS_DEVICE->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; - USBHS_DEVICE->INT_FG = USBHS_DETECT_FLAG; - } -} diff --git a/components/drivers/usb/cherryusb/port/chipidea/README.md b/components/drivers/usb/cherryusb/port/chipidea/README.md index 6a43f79d6d6..c2c216025d4 100644 --- a/components/drivers/usb/cherryusb/port/chipidea/README.md +++ b/components/drivers/usb/cherryusb/port/chipidea/README.md @@ -10,5 +10,5 @@ Modify USB_NOCACHE_RAM_SECTION #define USB_NOCACHE_RAM_SECTION __attribute__((section(".NonCacheable"))) ``` -- IMRT10XX/IMRT11XX -- MCXN9XX/MCXN236 +- IMRT10XX/IMRT11XX (chipidea + EHCI) +- MCXN9XX/MCXN236 (chipidea + EHCI) diff --git a/components/drivers/usb/cherryusb/port/chipidea/usb_dc_chipidea.c b/components/drivers/usb/cherryusb/port/chipidea/usb_dc_chipidea.c index c6b6c0fee57..74bd1257194 100644 --- a/components/drivers/usb/cherryusb/port/chipidea/usb_dc_chipidea.c +++ b/components/drivers/usb/cherryusb/port/chipidea/usb_dc_chipidea.c @@ -304,7 +304,7 @@ static void usb_qtd_init(dcd_qtd_t *p_qtd, void *data_ptr, uint16_t total_bytes) if (data_ptr != NULL) { p_qtd->buffer[0] = (uint32_t)data_ptr; for (uint8_t i = 1; i < 5; i++) { - p_qtd->buffer[i] |= ((p_qtd->buffer[i - 1]) & 0xFFFFF000UL) + 4096U; + p_qtd->buffer[i] = ((p_qtd->buffer[i - 1]) & 0xFFFFF000UL) + 4096U; } } } @@ -462,6 +462,10 @@ int usb_dc_init(uint8_t busid) /* Clear status */ USB_OTG_DEV->USBSTS = USB_OTG_DEV->USBSTS; +#ifdef CONFIG_USBDEV_SOF_ENABLE + int_mask |= USB_USBINTR_SRE_MASK; +#endif + /* Enable interrupt mask */ USB_OTG_DEV->USBINTR |= int_mask; @@ -525,10 +529,7 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) { uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress); - /* Must not exceed max endpoint number */ - if (ep_idx >= CONFIG_USBDEV_EP_NUM) { - return -1; - } + USB_ASSERT_MSG(ep_idx < CONFIG_USBDEV_EP_NUM, "Ep addr %02x overflow", ep->bEndpointAddress); chipidea_edpt_open(busid, ep->bEndpointAddress, USB_GET_ENDPOINT_TYPE(ep->bmAttributes), ep->wMaxPacketSize); @@ -633,6 +634,12 @@ void USBD_IRQHandler(uint8_t busid) USB_LOG_ERR("usbd intr error!\r\n"); } +#ifdef CONFIG_USBDEV_SOF_ENABLE + if (int_status & intr_sof) { + usbd_event_sof_handler(busid); + } +#endif + if (int_status & intr_reset) { g_chipidea_udc[busid].is_suspend = false; memset(g_chipidea_udc[busid].in_ep, 0, sizeof(struct chipidea_ep_state) * CONFIG_USBDEV_EP_NUM); @@ -666,17 +673,10 @@ void USBD_IRQHandler(uint8_t busid) if (int_status & intr_usb) { uint32_t const edpt_complete = USB_OTG_DEV->ENDPTCOMPLETE; - USB_OTG_DEV->ENDPTCOMPLETE = edpt_complete; uint32_t edpt_setup_status = USB_OTG_DEV->ENDPTSETUPSTAT; - if (edpt_setup_status) { - /*------------- Set up Received -------------*/ - USB_OTG_DEV->ENDPTSETUPSTAT = edpt_setup_status; - dcd_qhd_t *qhd0 = chipidea_qhd_get(busid, 0); - usbd_event_ep0_setup_complete_handler(busid, (uint8_t *)&qhd0->setup_request); - } - if (edpt_complete) { + USB_OTG_DEV->ENDPTCOMPLETE = edpt_complete; for (uint8_t ep_idx = 0; ep_idx < (CONFIG_USBDEV_EP_NUM * 2); ep_idx++) { if (edpt_complete & (1 << ep_idx2bit(ep_idx))) { transfer_len = 0; @@ -714,5 +714,12 @@ void USBD_IRQHandler(uint8_t busid) } } } + + if (edpt_setup_status) { + /*------------- Set up Received -------------*/ + USB_OTG_DEV->ENDPTSETUPSTAT = edpt_setup_status; + dcd_qhd_t *qhd0 = chipidea_qhd_get(busid, 0); + usbd_event_ep0_setup_complete_handler(busid, (uint8_t *)&qhd0->setup_request); + } } } \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/chipidea/usb_glue_mcx.c b/components/drivers/usb/cherryusb/port/chipidea/usb_glue_mcx.c deleted file mode 100644 index 3f9b46b6af0..00000000000 --- a/components/drivers/usb/cherryusb/port/chipidea/usb_glue_mcx.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Copyright (c) 2024, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#include "usbd_core.h" -#include "fsl_common.h" - -/*! @brief USB controller ID */ -typedef enum _usb_controller_index { - kUSB_ControllerKhci0 = 0U, /*!< KHCI 0U */ - kUSB_ControllerKhci1 = 1U, /*!< KHCI 1U, Currently, there are no platforms which have two KHCI IPs, this is reserved - to be used in the future. */ - kUSB_ControllerEhci0 = 2U, /*!< EHCI 0U */ - kUSB_ControllerEhci1 = 3U, /*!< EHCI 1U */ -} usb_controller_index_t; - -#define USB_DEVICE_CONFIG_EHCI 1 - -/* USB PHY condfiguration */ -#define BOARD_USB_PHY_D_CAL (0x04U) -#define BOARD_USB_PHY_TXCAL45DP (0x07U) -#define BOARD_USB_PHY_TXCAL45DM (0x07U) -#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ - -#if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U)) -#include "usb_phy.h" -#endif - -#if (defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) -void USB1_HS_IRQHandler(void) -{ - extern void USBD_IRQHandler(uint8_t busid); - USBD_IRQHandler(0); -} -#endif - -void USB_ClockInit(void) -{ -#if defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U) - usb_phy_config_struct_t phyConfig = { - BOARD_USB_PHY_D_CAL, - BOARD_USB_PHY_TXCAL45DP, - BOARD_USB_PHY_TXCAL45DM, - }; -#endif -#if defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U) - SPC0->ACTIVE_VDELAY = 0x0500; - /* Change the power DCDC to 1.8v (By deafult, DCDC is 1.8V), CORELDO to 1.1v (By deafult, CORELDO is 1.0V) */ - SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK; - SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) | - SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u); - /* Wait until it is done */ - while (SPC0->SC & SPC_SC_BUSY_MASK) - ; - if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) { - SCG0->TRIM_LOCK = 0x5a5a0001U; - SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK; - /* wait LDO ready */ - while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)) - ; - } - SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK; - SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK); - /* xtal = 20 ~ 30MHz */ - SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT); - SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK; - while (1) { - if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) { - break; - } - } - SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; - CLOCK_EnableClock(kCLOCK_UsbHs); - CLOCK_EnableClock(kCLOCK_UsbHsPhy); - CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U); - CLOCK_EnableUsbhsClock(); - USB_EhciPhyInit(kUSB_ControllerEhci0, BOARD_XTAL0_CLK_HZ, &phyConfig); -#endif -#if defined(USB_DEVICE_CONFIG_KHCI) && (USB_DEVICE_CONFIG_KHCI > 0U) - CLOCK_AttachClk(kCLK_48M_to_USB0); - CLOCK_EnableClock(kCLOCK_Usb0Ram); - CLOCK_EnableClock(kCLOCK_Usb0Fs); - CLOCK_EnableUsbfsClock(); -#endif -} - -void usb_dc_low_level_init(uint8_t busid) -{ - USB_ClockInit(); - /* Install isr, set priority, and enable IRQ. */ - NVIC_SetPriority((IRQn_Type)USB1_HS_IRQn, 3); - EnableIRQ((IRQn_Type)USB1_HS_IRQn); -} - -void usb_dc_low_level_deinit(uint8_t busid) -{ - DisableIRQ((IRQn_Type)USB1_HS_IRQn); -} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/dwc2/README.md b/components/drivers/usb/cherryusb/port/dwc2/README.md index b35a7a038e0..5e61d1c4f1a 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/README.md +++ b/components/drivers/usb/cherryusb/port/dwc2/README.md @@ -44,3 +44,7 @@ CONFIG_USBDEV_EP_NUM 必须为4 或者 6，并删除 usb_dc_dwc2.c 中 while(1){ ## Kendryte - K230 + +## Nationstech + +- N32H4X \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_dc_dwc2.c b/components/drivers/usb/cherryusb/port/dwc2/usb_dc_dwc2.c index 6054a334a67..644e6494da8 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_dc_dwc2.c +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_dc_dwc2.c @@ -114,7 +114,8 @@ struct dwc2_ep_state { /* Driver state */ USB_NOCACHE_RAM_SECTION struct dwc2_udc { - __attribute__((aligned(32))) struct usb_setup_packet setup; + USB_MEM_ALIGNX struct usb_setup_packet setup; + USB_MEM_ALIGNX uint32_t GSNPSID; struct dwc2_ep_state in_ep[CONFIG_USBDEV_EP_NUM]; /*!< IN endpoint parameters*/ struct dwc2_ep_state out_ep[CONFIG_USBDEV_EP_NUM]; /*!< OUT endpoint parameters */ } g_dwc2_udc[CONFIG_USBDEV_MAX_BUS]; @@ -134,13 +135,24 @@ static inline int dwc2_reset(uint8_t busid) count = 0U; USB_OTG_GLB->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; - do { - if (++count > 200000U) { - break; - } - } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); + if (g_dwc2_udc[busid].GSNPSID < 0x4F54420AU) { + do { + if (++count > 200000U) { + USB_LOG_ERR("DWC2 reset timeout\r\n"); + return -1; + } + } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); + } else { + do { + if (++count > 200000U) { + USB_LOG_ERR("DWC2 reset timeout\r\n"); + return -1; + } + } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_CSRSTDONE) != USB_OTG_GRSTCTL_CSRSTDONE); - USB_OTG_GLB->GRSTCTL &= ~USB_OTG_GRSTCTL_CSRST; + USB_OTG_GLB->GRSTCTL &= ~USB_OTG_GRSTCTL_CSRST; + USB_OTG_GLB->GRSTCTL |= USB_OTG_GRSTCTL_CSRSTDONE; + } return 0; } @@ -527,22 +539,20 @@ int usb_dc_init(uint8_t busid) endpoints = ((USB_OTG_GLB->GHWCFG2 & (0x0f << 10)) >> 10) + 1; USB_LOG_INFO("========== dwc2 udc params ==========\r\n"); - USB_LOG_INFO("CID:%08x\r\n", USB_OTG_GLB->CID); - USB_LOG_INFO("GSNPSID:%08x\r\n", USB_OTG_GLB->GSNPSID); - USB_LOG_INFO("GHWCFG1:%08x\r\n", USB_OTG_GLB->GHWCFG1); - USB_LOG_INFO("GHWCFG2:%08x\r\n", USB_OTG_GLB->GHWCFG2); - USB_LOG_INFO("GHWCFG3:%08x\r\n", USB_OTG_GLB->GHWCFG3); - USB_LOG_INFO("GHWCFG4:%08x\r\n", USB_OTG_GLB->GHWCFG4); + USB_LOG_INFO("CID:%08x\r\n", (unsigned int)USB_OTG_GLB->CID); + USB_LOG_INFO("GSNPSID:%08x\r\n", (unsigned int)USB_OTG_GLB->GSNPSID); + USB_LOG_INFO("GHWCFG1:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG1); + USB_LOG_INFO("GHWCFG2:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG2); + USB_LOG_INFO("GHWCFG3:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG3); + USB_LOG_INFO("GHWCFG4:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG4); USB_LOG_INFO("dwc2 fsphy type:%d, hsphy type:%d, dma support:%d\r\n", fsphy_type, hsphy_type, dma_support); USB_LOG_INFO("dwc2 has %d endpoints and dfifo depth(32-bit words) is %d, default config: %d endpoints\r\n", endpoints, (USB_OTG_GLB->GHWCFG3 >> 16), CONFIG_USBDEV_EP_NUM); USB_LOG_INFO("=================================\r\n"); - if (endpoints < CONFIG_USBDEV_EP_NUM) { - USB_LOG_ERR("dwc2 has less endpoints than config, please check\r\n"); - while (1) { - } - } + USB_ASSERT_MSG(endpoints >= CONFIG_USBDEV_EP_NUM, "dwc2 has less endpoints than config, please check"); + + g_dwc2_udc[busid].GSNPSID = USB_OTG_GLB->GSNPSID; USB_OTG_DEV->DCTL |= USB_OTG_DCTL_SDIS; @@ -591,11 +601,7 @@ int usb_dc_init(uint8_t busid) USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_WUIM; #ifdef CONFIG_USB_DWC2_DMA_ENABLE - if (((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) != 2) { - USB_LOG_ERR("This dwc2 version does not support dma mode, so stop working\r\n"); - while (1) { - } - } + USB_ASSERT_MSG(((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) == 2, "This dwc2 version does not support dma mode, so stop working"); USB_OTG_DEV->DCFG &= ~USB_OTG_DCFG_DESCDMA; USB_OTG_GLB->GAHBCFG &= ~USB_OTG_GAHBCFG_HBSTLEN; @@ -606,7 +612,7 @@ int usb_dc_init(uint8_t busid) #if CONFIG_DWC2_VBUS_SENSING USB_OTG_GLB->GINTMSK |= (USB_OTG_GINTMSK_OTGINT | USB_OTG_GINTMSK_SRQIM); #endif -#if 0 +#ifdef CONFIG_USBDEV_SOF_ENABLE USB_OTG_GLB->GINTMSK |= USB_OTG_GINTMSK_SOFM; #endif @@ -643,18 +649,9 @@ int usb_dc_init(uint8_t busid) fifo_num += CONFIG_USB_DWC2_TX8_FIFO_SIZE; #endif - if (fifo_num > (USB_OTG_GLB->GHWCFG3 >> 16)) { - USB_LOG_ERR("Your fifo config is overflow, please check\r\n"); - while (1) { - } - } - + USB_ASSERT_MSG(fifo_num <= (USB_OTG_GLB->GHWCFG3 >> 16), "Your fifo config is overflow, please check"); /* xxx32 chips do not follow (USB_OTG_GLB->GHWCFG3 >> 16) if hsphy_type is zero, they use 1.25KB(320 DWORD) */ - if ((hsphy_type == 0) && (fifo_num > 320)) { - USB_LOG_ERR("Your fifo config is larger than 320 , please check\r\n"); - while (1) { - } - } + USB_ASSERT_MSG(!((hsphy_type == 0) && (fifo_num > 320)), "Your fifo config is larger than 320 , please check"); ret = dwc2_flush_txfifo(busid, 0x10U); ret = dwc2_flush_rxfifo(busid); @@ -728,10 +725,7 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) { uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress); - if (ep_idx > (CONFIG_USBDEV_EP_NUM - 1)) { - USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } + USB_ASSERT_MSG(ep_idx < CONFIG_USBDEV_EP_NUM, "Ep addr %02x overflow", ep->bEndpointAddress); if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { g_dwc2_udc[busid].out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); @@ -752,10 +746,8 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) } else { fifo_size = (USB_OTG_GLB->DIEPTXF[ep_idx - 1U] >> 16); } - if ((fifo_size * 4) < USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize)) { - USB_LOG_ERR("Ep addr %02x fifo overflow\r\n", ep->bEndpointAddress); - return -2; - } + + USB_ASSERT_MSG((fifo_size * 4) >= USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize), "Ep addr %02x fifo overflow", ep->bEndpointAddress); g_dwc2_udc[busid].in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); g_dwc2_udc[busid].in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); @@ -890,19 +882,18 @@ int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, ui uint8_t ep_idx = USB_EP_GET_IDX(ep); uint32_t pktcnt = 0; + USB_ASSERT_MSG(!((uint32_t)data % 0x04), "dwc2 data must be 4-byte aligned"); + +#ifdef CONFIG_USB_DCACHE_ENABLE + USB_ASSERT_MSG(!((uint32_t)data % CONFIG_USB_ALIGN_SIZE), "dwc2 data must be %d-byte aligned", CONFIG_USB_ALIGN_SIZE); +#endif + if (!data && data_len) { return -1; } -#if 0 /* some chips have confused with this, so disable as default */ - if (USB_OTG_INEP(ep_idx)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) { - return -2; - } -#endif + if (ep_idx && !(USB_OTG_INEP(ep_idx)->DIEPCTL & USB_OTG_DIEPCTL_MPSIZ)) { - return -3; - } - if ((uint32_t)data & 0x03) { - return -4; + return -2; } g_dwc2_udc[busid].in_ep[ep_idx].xfer_buf = (uint8_t *)data; @@ -945,6 +936,7 @@ int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, ui } #ifdef CONFIG_USB_DWC2_DMA_ENABLE + usb_dcache_clean((uintptr_t)data, USB_ALIGN_UP(data_len, CONFIG_USB_ALIGN_SIZE)); USB_OTG_INEP(ep_idx)->DIEPDMA = (uint32_t)data; USB_OTG_INEP(ep_idx)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); @@ -963,19 +955,18 @@ int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t uint8_t ep_idx = USB_EP_GET_IDX(ep); uint32_t pktcnt = 0; + USB_ASSERT_MSG(!((uint32_t)data % 0x04), "dwc2 data must be 4-byte aligned"); + +#ifdef CONFIG_USB_DCACHE_ENABLE + USB_ASSERT_MSG(!((uint32_t)data % CONFIG_USB_ALIGN_SIZE), "dwc2 data must be %d-byte aligned", CONFIG_USB_ALIGN_SIZE); +#endif + if (!data && data_len) { return -1; } -#if 0 /* some chips have confused with this, so disable as default */ - if (USB_OTG_OUTEP(ep_idx)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) { - return -2; - } -#endif + if (ep_idx && !(USB_OTG_OUTEP(ep_idx)->DOEPCTL & USB_OTG_DOEPCTL_MPSIZ)) { - return -3; - } - if (((uint32_t)data) & 0x03) { - return -4; + return -2; } g_dwc2_udc[busid].out_ep[ep_idx].xfer_buf = (uint8_t *)data; @@ -1023,9 +1014,11 @@ int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t void USBD_IRQHandler(uint8_t busid) { - uint32_t gint_status, temp, ep_idx, ep_intr, epint, read_count, daintmask; + uint32_t gint_status, temp, ep_idx, ep_intr, epint, read_count; gint_status = dwc2_get_glb_intstatus(busid); + (void)read_count; + if ((USB_OTG_GLB->GINTSTS & 0x1U) == USB_OTG_MODE_DEVICE) { /* Avoid spurious interrupt */ if (gint_status == 0) { @@ -1070,16 +1063,19 @@ void USBD_IRQHandler(uint8_t busid) } else { g_dwc2_udc[busid].out_ep[ep_idx].actual_xfer_len = g_dwc2_udc[busid].out_ep[ep_idx].xfer_len - ((USB_OTG_OUTEP(ep_idx)->DOEPTSIZ) & USB_OTG_DOEPTSIZ_XFRSIZ); g_dwc2_udc[busid].out_ep[ep_idx].xfer_len = 0; + usb_dcache_invalidate((uintptr_t)g_dwc2_udc[busid].out_ep[ep_idx].xfer_buf, USB_ALIGN_UP(g_dwc2_udc[busid].out_ep[ep_idx].actual_xfer_len, CONFIG_USB_ALIGN_SIZE)); usbd_event_ep_out_complete_handler(busid, 0x00, g_dwc2_udc[busid].out_ep[ep_idx].actual_xfer_len); } } else { g_dwc2_udc[busid].out_ep[ep_idx].actual_xfer_len = g_dwc2_udc[busid].out_ep[ep_idx].xfer_len - ((USB_OTG_OUTEP(ep_idx)->DOEPTSIZ) & USB_OTG_DOEPTSIZ_XFRSIZ); g_dwc2_udc[busid].out_ep[ep_idx].xfer_len = 0; + usb_dcache_invalidate((uintptr_t)g_dwc2_udc[busid].out_ep[ep_idx].xfer_buf, USB_ALIGN_UP(g_dwc2_udc[busid].out_ep[ep_idx].actual_xfer_len, CONFIG_USB_ALIGN_SIZE)); usbd_event_ep_out_complete_handler(busid, ep_idx, g_dwc2_udc[busid].out_ep[ep_idx].actual_xfer_len); } } if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { + usb_dcache_invalidate((uintptr_t)&g_dwc2_udc[busid].setup, USB_ALIGN_UP(8, CONFIG_USB_ALIGN_SIZE)); usbd_event_ep0_setup_complete_handler(busid, (uint8_t *)&g_dwc2_udc[busid].setup); } } @@ -1175,10 +1171,12 @@ void USBD_IRQHandler(uint8_t busid) if (gint_status & USB_OTG_GINTSTS_IISOIXFR) { USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_IISOIXFR; } - +#ifdef CONFIG_USBDEV_SOF_ENABLE if (gint_status & USB_OTG_GINTSTS_SOF) { USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_SOF; + usbd_event_sof_handler(busid); } +#endif if (gint_status & USB_OTG_GINTSTS_USBSUSP) { USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_USBSUSP; usbd_event_suspend_handler(busid); diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_dwc2_reg.h b/components/drivers/usb/cherryusb/port/dwc2/usb_dwc2_reg.h index 5f9b5f90bfd..d479b2eaaf4 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_dwc2_reg.h +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_dwc2_reg.h @@ -460,7 +460,9 @@ typedef struct #define USB_OTG_GRSTCTL_TXFFLSH_Pos (5U) #define USB_OTG_GRSTCTL_TXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */ #define USB_OTG_GRSTCTL_TXFFLSH USB_OTG_GRSTCTL_TXFFLSH_Msk /*!< TxFIFO flush */ - +#define USB_OTG_GRSTCTL_CSRSTDONE_Pos (29U) +#define USB_OTG_GRSTCTL_CSRSTDONE_Msk (0x1UL << USB_OTG_GRSTCTL_CSRSTDONE_Pos) /*!< 0x20000000 */ +#define USB_OTG_GRSTCTL_CSRSTDONE USB_OTG_GRSTCTL_CSRSTDONE_Msk /*!< Core soft reset done */ #define USB_OTG_GRSTCTL_TXFNUM_Pos (6U) #define USB_OTG_GRSTCTL_TXFNUM_Msk (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */ diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_at.c b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_at.c index 8d45f651394..636ce12cbc8 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_at.c +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_at.c @@ -56,7 +56,12 @@ uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base) #endif } +extern uint32_t SystemCoreClock; + void usbd_dwc2_delay_ms(uint8_t ms) { - /* implement later */ -} \ No newline at end of file + uint32_t count = SystemCoreClock / 1000 * ms; + while (count--) { + __asm volatile("nop"); + } +} diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_esp.c b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_esp.c index 9b62db4e609..d166a457c3e 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_esp.c +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_esp.c @@ -14,13 +14,13 @@ #include "usbh_core.h" #ifdef CONFIG_IDF_TARGET_ESP32S2 -#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ +#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ #define DEFAULT_USB_INTR_SOURCE ETS_USB_INTR_SOURCE #elif CONFIG_IDF_TARGET_ESP32S3 -#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ +#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ #define DEFAULT_USB_INTR_SOURCE ETS_USB_INTR_SOURCE #elif CONFIG_IDF_TARGET_ESP32P4 -#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ +#define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ #define DEFAULT_USB_INTR_SOURCE ETS_USB_OTG_INTR_SOURCE #else #define DEFAULT_CPU_FREQ_MHZ 160 @@ -41,7 +41,11 @@ void usb_dc_low_level_init(uint8_t busid) usb_phy_config_t phy_config = { .controller = USB_PHY_CTRL_OTG, .otg_mode = USB_OTG_MODE_DEVICE, +#if CONFIG_IDF_TARGET_ESP32P4 // ESP32-P4 has 2 USB-DWC peripherals, each with its dedicated PHY. We support HS+UTMI only ATM. + .target = USB_PHY_TARGET_UTMI, +#else .target = USB_PHY_TARGET_INT, +#endif }; esp_err_t ret = usb_new_phy(&phy_config, &s_phy_handle); @@ -56,7 +60,7 @@ void usb_dc_low_level_init(uint8_t busid) USB_LOG_ERR("USB Interrupt Init Failed!\r\n"); return; } - USB_LOG_INFO("cherryusb, version: "CHERRYUSB_VERSION_STR"\r\n"); + USB_LOG_INFO("cherryusb, version: " CHERRYUSB_VERSION_STR "\r\n"); } void usb_dc_low_level_deinit(uint8_t busid) @@ -87,7 +91,11 @@ void usb_hc_low_level_init(struct usbh_bus *bus) // Host Library defaults to internal PHY usb_phy_config_t phy_config = { .controller = USB_PHY_CTRL_OTG, +#if CONFIG_IDF_TARGET_ESP32P4 // ESP32-P4 has 2 USB-DWC peripherals, each with its dedicated PHY. We support HS+UTMI only ATM. + .target = USB_PHY_TARGET_UTMI, +#else .target = USB_PHY_TARGET_INT, +#endif .otg_mode = USB_OTG_MODE_HOST, .otg_speed = USB_PHY_SPEED_UNDEFINED, // In Host mode, the speed is determined by the connected device .ext_io_conf = NULL, @@ -106,7 +114,7 @@ void usb_hc_low_level_init(struct usbh_bus *bus) USB_LOG_ERR("USB Interrupt Init Failed!\r\n"); return; } - USB_LOG_INFO("cherryusb, version: "CHERRYUSB_VERSION_STR"\r\n"); + USB_LOG_INFO("cherryusb, version: " CHERRYUSB_VERSION_STR "\r\n"); } void usb_hc_low_level_deinit(struct usbh_bus *bus) @@ -129,4 +137,32 @@ uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base) void usbd_dwc2_delay_ms(uint8_t ms) { vTaskDelay(pdMS_TO_TICKS(ms)); -} \ No newline at end of file +} + +#ifdef CONFIG_USB_DCACHE_ENABLE +#include "esp_cache.h" + +void usb_dcache_clean(uintptr_t addr, size_t size) +{ + if (size == 0) + return; + + esp_cache_msync((void *)addr, size, ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_C2M); +} + +void usb_dcache_invalidate(uintptr_t addr, size_t size) +{ + if (size == 0) + return; + + esp_cache_msync((void *)addr, size, ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_M2C); +} + +void usb_dcache_flush(uintptr_t addr, size_t size) +{ + if (size == 0) + return; + + esp_cache_msync((void *)addr, size, ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_DIR_M2C); +} +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_gd.c b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_gd.c index f3fa4d92f7a..cd6e4c0954a 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_gd.c +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_gd.c @@ -35,7 +35,12 @@ uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base) #endif } +extern uint32_t SystemCoreClock; + void usbd_dwc2_delay_ms(uint8_t ms) { - /* implement later */ -} \ No newline at end of file + uint32_t count = SystemCoreClock / 1000 * ms; + while (count--) { + __asm volatile("nop"); + } +} diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_hc.c b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_hc.c index 431b5db5bf6..15ba5d69a95 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_hc.c +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_hc.c @@ -25,7 +25,12 @@ uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base) return 0; } +extern uint32_t SystemCoreClock; + void usbd_dwc2_delay_ms(uint8_t ms) { - /* implement later */ -} \ No newline at end of file + uint32_t count = SystemCoreClock / 1000 * ms; + while (count--) { + __asm volatile("nop"); + } +} diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_nation.c b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_nation.c new file mode 100644 index 00000000000..3e96b22f593 --- /dev/null +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_nation.c @@ -0,0 +1,193 @@ +/* + * Copyright (c) 2025, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "usbd_core.h" +#include "usbh_core.h" + +__WEAK void USBD_IRQHandler(uint8_t busid) +{ +} + +__WEAK void USBH_IRQHandler(uint8_t busid) +{ +} + +#if defined(N32H473) || defined(N32H474) || defined(N32H475) || defined(N32H482) || defined(N32H487) +#include "n32h47x_48x_rcc.h" +#include "n32h47x_48x_gpio.h" +#include "n32h47x_48x_exti.h" +#include "misc.h" + +typedef void (*usb_dwc2_irq)(uint8_t busid); + +static usb_dwc2_irq g_usb_dwc2_irq; +static volatile uint8_t g_usb_dwc2_busid = 0; + +static void usbhs_common_init(void) +{ + RCC_EnableAHB1PeriphClk(RCC_AHB_PERIPHEN_GPIOA | RCC_AHB_PERIPHEN_GPIOB, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + /* PLL= 240MHz */ +#if (HSE_VALUE == 8000000) + /* Select PLL clock as USBHS clock source , clock 15 divisions = 16M */ + RCC_ConfigUSBPLLPresClk(RCC_USBPLLCLK_SRC_PLL, RCC_USBPLLCLK_DIV15); + + /* Select the corresponding bandwidth and frequency*/ + RCC_ConfigUSBHSBandwidth(RCC_USBHS_BW_16M); + + /* Select USBHS clock source frequency */ + RCC_ConfigUSBHSFrequency(RCC_USBHS_FREQ_16_OR_32M); + + /* Select PLL as USBHS clock */ + RCC_ConfigUSBHSClk(RCC_USBHS_CLKSRC_PLLPRES); +#else //HSE 16M + RCC_ConfigUSBHSBandwidth(RCC_USBHS_BW_16M); + RCC_ConfigUSBHSFrequency(RCC_USBHS_FREQ_16_OR_32M); + RCC_ConfigUSBHSClk(RCC_USBHS_CLKSRC_HSE); +#endif + /* Reset the USBHS phy clock*/ + RCC_EnableAHBPeriphReset(RCC_AHBPRST_USBHSPHYRST); + /* Enables the USBHS peripheral clock*/ + RCC_EnableAHBPeriphClk(RCC_AHB_PERIPHEN_USBHS, ENABLE); + + NVIC_InitType NVIC_InitStructure; + // EXTI_InitType EXTI_InitStructure; + + // NVIC_InitStructure.NVIC_IRQChannel = USB_HS_WKUP_IRQn; + // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + // NVIC_Init(&NVIC_InitStructure); + + NVIC_InitStructure.NVIC_IRQChannel = USB_HS_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Configure the EXTI line 23 connected internally to the USBHS IP */ + // EXTI_ClrITPendBit(EXTI_LINE23); + // EXTI_InitStructure.EXTI_Line = EXTI_LINE23; + // EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + // EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + // EXTI_InitStructure.EXTI_LineCmd = ENABLE; + // EXTI_InitPeripheral(&EXTI_InitStructure); +} + +static void usbhs_gpio_init(void) +{ + GPIO_InitType GPIO_InitStructure; + + RCC_EnableAHB1PeriphClk(RCC_AHB_PERIPHEN_GPIOA | RCC_AHB_PERIPHEN_GPIOB | RCC_AHB_PERIPHEN_GPIOE, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(0, 0, GPIO_RMP_SWJ_SWD); + + GPIO_InitStruct(&GPIO_InitStructure); +#ifdef USBHS_HOST + GPIO_InitStructure.Pin = GPIO_PIN_1; + GPIO_InitStructure.GPIO_Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitPeripheral(GPIOE, &GPIO_InitStructure); + GPIO_ResetBits(GPIOE, GPIO_PIN_1); + + GPIO_InitStructure.Pin = GPIO_PIN_3; + GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure); + GPIO_ResetBits(GPIOB, GPIO_PIN_3); +#endif + // VBUS + // GPIO_InitStructure.Pin = GPIO_PIN_13; + // GPIO_InitStructure.GPIO_Mode = GPIO_MODE_INPUT; + // GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure); + + // // SOF + // GPIO_InitStructure.Pin = GPIO_PIN_4; + // GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP; + // GPIO_InitStructure.GPIO_Alternate = 8; // SOF + // GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure); + + // // ID + // GPIO_InitStructure.Pin = GPIO_PIN_12; + // GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP; + // GPIO_InitStructure.GPIO_Alternate = 14; // ID + // GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure); +} + +void usb_dc_low_level_init(uint8_t busid) +{ + g_usb_dwc2_irq = USBD_IRQHandler; + g_usb_dwc2_busid = busid; + + usbhs_common_init(); + + RCC->USBHSCTRL2 |= (uint32_t)0x01 << 19; + RCC->USBHSCTRL1 |= (uint32_t)0x01 << 31; +} + +void usb_dc_low_level_deinit(uint8_t busid) +{ + NVIC_InitType NVIC_InitStructure; + + NVIC_InitStructure.NVIC_IRQChannel = USB_HS_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; + NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE; + NVIC_Init(&NVIC_InitStructure); + + RCC_EnableAHBPeriphReset(RCC_AHBPRST_USBHSPHYRST); + /* Enables the USBHS peripheral clock*/ + RCC_EnableAHBPeriphClk(RCC_AHB_PERIPHEN_USBHS, DISABLE); +} + +void usb_hc_low_level_init(struct usbh_bus *bus) +{ + g_usb_dwc2_irq = USBH_IRQHandler; + g_usb_dwc2_busid = 0; + + usbhs_common_init(); + + RCC->USBHSCTRL2 &= ~(uint32_t)0x01 << 19; + RCC->USBHSCTRL1 |= (uint32_t)0x01 << 31; +} + +void usb_hc_low_level_deinit(struct usbh_bus *bus) +{ + NVIC_InitType NVIC_InitStructure; + + NVIC_InitStructure.NVIC_IRQChannel = USB_HS_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; + NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE; + NVIC_Init(&NVIC_InitStructure); + + RCC_EnableAHBPeriphReset(RCC_AHBPRST_USBHSPHYRST); + /* Enables the USBHS peripheral clock*/ + RCC_EnableAHBPeriphClk(RCC_AHB_PERIPHEN_USBHS, DISABLE); +} + +uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base) +{ + return 0; +} + +uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base) +{ + return 0; +} + +void USB_HS_IRQHandler(void) +{ + g_usb_dwc2_irq(g_usb_dwc2_busid); +} + +extern uint32_t SystemCoreClock; + +void usbd_dwc2_delay_ms(uint8_t ms) +{ + uint32_t count = SystemCoreClock / 1000 * ms; + while (count--) { + __asm volatile("nop"); + } +} + +#endif diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_st.c b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_st.c index 51838091e5b..9925f5e98be 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_glue_st.c +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_glue_st.c @@ -3,10 +3,98 @@ * * SPDX-License-Identifier: Apache-2.0 */ -#include "usb_config.h" -#include "stdint.h" -#include "usb_dwc2_reg.h" +#include "usbd_core.h" +#include "usbh_core.h" + +#if __has_include("stm32f1xx_hal.h") +#include "stm32f1xx_hal.h" +#elif __has_include("stm32f2xx_hal.h") +#include "stm32f2xx_hal.h" +#elif __has_include("stm32f4xx_hal.h") +#include "stm32f4xx_hal.h" +#elif __has_include("stm32f7xx_hal.h") +#include "stm32f7xx_hal.h" +#elif __has_include("stm32h7xx_hal.h") +#include "stm32h7xx_hal.h" +#elif __has_include("stm32h7rsxx_hal.h") +#include "stm32h7rsxx_hal.h" +#elif __has_include("stm32l4xx_hal.h") +#include "stm32l4xx_hal.h" +#endif + +#if !defined(HAL_HCD_MODULE_ENABLED) && !defined(HAL_PCD_MODULE_ENABLED) +#error please define HAL_HCD_MODULE_ENABLED or HAL_PCD_MODULE_ENABLED in stm32xxx_hal_conf.h +#endif + +typedef void (*usb_dwc2_irq)(uint8_t busid); + +struct dwc2_instance { + USB_OTG_GlobalTypeDef *Instance; +}; + +static usb_dwc2_irq g_usb_dwc2_irq[2]; +static uint8_t g_usb_dwc2_busid[2] = { 0, 0 }; +static struct dwc2_instance g_dwc2_instance; + +#ifdef HAL_PCD_MODULE_ENABLED +void usb_dc_low_level_init(uint8_t busid) +{ + if (g_usbdev_bus[busid].reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE + g_usb_dwc2_busid[1] = busid; + g_usb_dwc2_irq[1] = USBD_IRQHandler; + } else { + g_usb_dwc2_busid[0] = busid; + g_usb_dwc2_irq[0] = USBD_IRQHandler; + } + + g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)g_usbdev_bus[busid].reg_base; + HAL_PCD_MspInit((PCD_HandleTypeDef *)&g_dwc2_instance); +} + +void usb_dc_low_level_deinit(uint8_t busid) +{ + if (g_usbdev_bus[busid].reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE + g_usb_dwc2_busid[1] = 0; + g_usb_dwc2_irq[1] = NULL; + } else { + g_usb_dwc2_busid[0] = 0; + g_usb_dwc2_irq[0] = NULL; + } + + g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)g_usbdev_bus[busid].reg_base; + HAL_PCD_MspDeInit((PCD_HandleTypeDef *)&g_dwc2_instance); +} +#endif + +#ifdef HAL_HCD_MODULE_ENABLED +void usb_hc_low_level_init(struct usbh_bus *bus) +{ + if (bus->hcd.reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE + g_usb_dwc2_busid[1] = bus->hcd.hcd_id; + g_usb_dwc2_irq[1] = USBH_IRQHandler; + } else { + g_usb_dwc2_busid[0] = bus->hcd.hcd_id; + g_usb_dwc2_irq[0] = USBH_IRQHandler; + } + + g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)bus->hcd.reg_base; + HAL_HCD_MspInit((HCD_HandleTypeDef *)&g_dwc2_instance); +} + +void usb_hc_low_level_deinit(struct usbh_bus *bus) +{ + if (bus->hcd.reg_base == 0x40040000UL) { // USB_OTG_HS_PERIPH_BASE + g_usb_dwc2_busid[1] = 0; + g_usb_dwc2_irq[1] = NULL; + } else { + g_usb_dwc2_busid[0] = 0; + g_usb_dwc2_irq[0] = NULL; + } + g_dwc2_instance.Instance = (USB_OTG_GlobalTypeDef *)bus->hcd.reg_base; + HAL_HCD_MspDeInit((HCD_HandleTypeDef *)&g_dwc2_instance); +} +#endif /* you can find this config in function: USB_DevInit, file:stm32xxx_ll_usb.c, for example: * * USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN; @@ -16,73 +104,7 @@ * */ -extern void HAL_Delay(uint32_t Delay); - #if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F732xx) || defined(STM32F733xx) -/** - * @brief USB_HS_PHY_Registers - */ -typedef struct -{ - -__IO uint32_t USB_HS_PHYC_PLL; /*!< This register is used to control the PLL of the HS PHY. 000h */ -__IO uint32_t Reserved04; /*!< Reserved 004h */ -__IO uint32_t Reserved08; /*!< Reserved 008h */ -__IO uint32_t USB_HS_PHYC_TUNE; /*!< This register is used to control the tuning interface of the High Speed PHY. 00Ch */ -__IO uint32_t Reserved10; /*!< Reserved 010h */ -__IO uint32_t Reserved14; /*!< Reserved 014h */ -__IO uint32_t USB_HS_PHYC_LDO; /*!< This register is used to control the regulator (LDO). 018h */ -} USB_HS_PHYC_GlobalTypeDef; - -#define USB_HS_PHYC_CONTROLLER_BASE 0x40017C00UL -#define USB_HS_PHYC ((USB_HS_PHYC_GlobalTypeDef *) USB_HS_PHYC_CONTROLLER_BASE) - -/******************** Bit definition for USBPHYC_PLL1 register ********************/ -#define USB_HS_PHYC_PLL1_PLLEN_Pos (0U) -#define USB_HS_PHYC_PLL1_PLLEN_Msk (0x1UL << USB_HS_PHYC_PLL1_PLLEN_Pos) /*!< 0x00000001 */ -#define USB_HS_PHYC_PLL1_PLLEN USB_HS_PHYC_PLL1_PLLEN_Msk /*!< Enable PLL */ -#define USB_HS_PHYC_PLL1_PLLSEL_Pos (1U) -#define USB_HS_PHYC_PLL1_PLLSEL_Msk (0x7UL << USB_HS_PHYC_PLL1_PLLSEL_Pos) /*!< 0x0000000E */ -#define USB_HS_PHYC_PLL1_PLLSEL USB_HS_PHYC_PLL1_PLLSEL_Msk /*!< Controls PHY frequency operation selection */ -#define USB_HS_PHYC_PLL1_PLLSEL_1 (0x1UL << USB_HS_PHYC_PLL1_PLLSEL_Pos) /*!< 0x00000002 */ -#define USB_HS_PHYC_PLL1_PLLSEL_2 (0x2UL << USB_HS_PHYC_PLL1_PLLSEL_Pos) /*!< 0x00000004 */ -#define USB_HS_PHYC_PLL1_PLLSEL_3 (0x4UL << USB_HS_PHYC_PLL1_PLLSEL_Pos) /*!< 0x00000008 */ - -#define USB_HS_PHYC_PLL1_PLLSEL_12MHZ 0x00000000U /*!< PHY PLL1 input clock frequency 12 MHz */ -#define USB_HS_PHYC_PLL1_PLLSEL_12_5MHZ USB_HS_PHYC_PLL1_PLLSEL_1 /*!< PHY PLL1 input clock frequency 12.5 MHz */ -#define USB_HS_PHYC_PLL1_PLLSEL_16MHZ (uint32_t)(USB_HS_PHYC_PLL1_PLLSEL_1 | USB_HS_PHYC_PLL1_PLLSEL_2) /*!< PHY PLL1 input clock frequency 16 MHz */ -#define USB_HS_PHYC_PLL1_PLLSEL_24MHZ USB_HS_PHYC_PLL1_PLLSEL_3 /*!< PHY PLL1 input clock frequency 24 MHz */ -#define USB_HS_PHYC_PLL1_PLLSEL_25MHZ (uint32_t)(USB_HS_PHYC_PLL1_PLLSEL_2 | USB_HS_PHYC_PLL1_PLLSEL_3) /*!< PHY PLL1 input clock frequency 25 MHz */ - -/******************** Bit definition for USBPHYC_LDO register ********************/ -#define USB_HS_PHYC_LDO_USED_Pos (0U) -#define USB_HS_PHYC_LDO_USED_Msk (0x1UL << USB_HS_PHYC_LDO_USED_Pos) /*!< 0x00000001 */ -#define USB_HS_PHYC_LDO_USED USB_HS_PHYC_LDO_USED_Msk /*!< Monitors the usage status of the PHY's LDO */ -#define USB_HS_PHYC_LDO_STATUS_Pos (1U) -#define USB_HS_PHYC_LDO_STATUS_Msk (0x1UL << USB_HS_PHYC_LDO_STATUS_Pos) /*!< 0x00000002 */ -#define USB_HS_PHYC_LDO_STATUS USB_HS_PHYC_LDO_STATUS_Msk /*!< Monitors the status of the PHY's LDO. */ -#define USB_HS_PHYC_LDO_DISABLE_Pos (2U) -#define USB_HS_PHYC_LDO_DISABLE_Msk (0x1UL << USB_HS_PHYC_LDO_DISABLE_Pos) /*!< 0x00000004 */ -#define USB_HS_PHYC_LDO_DISABLE USB_HS_PHYC_LDO_DISABLE_Msk /*!< Controls disable of the High Speed PHY's LDO */ - -/* Legacy */ -#define USB_HS_PHYC_PLL_PLLEN_Pos USB_HS_PHYC_PLL1_PLLEN_Pos -#define USB_HS_PHYC_PLL_PLLEN_Msk USB_HS_PHYC_PLL1_PLLEN_Msk -#define USB_HS_PHYC_PLL_PLLEN USB_HS_PHYC_PLL1_PLLEN -#define USB_HS_PHYC_PLL_PLLSEL_Pos USB_HS_PHYC_PLL1_PLLSEL_Pos -#define USB_HS_PHYC_PLL_PLLSEL_Msk USB_HS_PHYC_PLL1_PLLSEL_Msk -#define USB_HS_PHYC_PLL_PLLSEL USB_HS_PHYC_PLL1_PLLSEL -#define USB_HS_PHYC_PLL_PLLSEL_1 USB_HS_PHYC_PLL1_PLLSEL_1 -#define USB_HS_PHYC_PLL_PLLSEL_2 USB_HS_PHYC_PLL1_PLLSEL_2 -#define USB_HS_PHYC_PLL_PLLSEL_3 USB_HS_PHYC_PLL1_PLLSEL_3 - -#define USB_HS_PHYC_LDO_ENABLE_Pos USB_HS_PHYC_LDO_DISABLE_Pos -#define USB_HS_PHYC_LDO_ENABLE_Msk USB_HS_PHYC_LDO_DISABLE_Msk -#define USB_HS_PHYC_LDO_ENABLE USB_HS_PHYC_LDO_DISABLE - -#if !defined (USB_HS_PHYC_TUNE_VALUE) -#define USB_HS_PHYC_TUNE_VALUE 0x00000F13U /*!< Value of USB HS PHY Tune */ -#endif /* USB_HS_PHYC_TUNE_VALUE */ /** * @brief Enables control of a High Speed USB PHY * Init the low level hardware : GPIO, CLOCK, NVIC... @@ -91,71 +113,60 @@ __IO uint32_t USB_HS_PHYC_LDO; /*!< This register is used to control the */ static int usb_hsphy_init(uint32_t hse_value) { - __IO uint32_t count = 0U; + __IO uint32_t count = 0U; - /* Enable LDO */ - USB_HS_PHYC->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE; + /* Enable LDO */ + USB_HS_PHYC->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE; - /* wait for LDO Ready */ - while ((USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) == 0U) - { - count++; + /* wait for LDO Ready */ + while ((USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) == 0U) { + count++; - if (count > 200000U) + if (count > 200000U) { + return -1; + } + } + + /* Controls PHY frequency operation selection */ + if (hse_value == 12000000U) /* HSE = 12MHz */ + { + USB_HS_PHYC->USB_HS_PHYC_PLL = (0x0U << 1); + } else if (hse_value == 12500000U) /* HSE = 12.5MHz */ + { + USB_HS_PHYC->USB_HS_PHYC_PLL = (0x2U << 1); + } else if (hse_value == 16000000U) /* HSE = 16MHz */ { - return -1; + USB_HS_PHYC->USB_HS_PHYC_PLL = (0x3U << 1); + } else if (hse_value == 24000000U) /* HSE = 24MHz */ + { + USB_HS_PHYC->USB_HS_PHYC_PLL = (0x4U << 1); + } else if (hse_value == 25000000U) /* HSE = 25MHz */ + { + USB_HS_PHYC->USB_HS_PHYC_PLL = (0x5U << 1); + } else if (hse_value == 32000000U) /* HSE = 32MHz */ + { + USB_HS_PHYC->USB_HS_PHYC_PLL = (0x7U << 1); + } else { + /* ... */ } - } - - /* Controls PHY frequency operation selection */ - if (hse_value == 12000000U) /* HSE = 12MHz */ - { - USB_HS_PHYC->USB_HS_PHYC_PLL = (0x0U << 1); - } - else if (hse_value == 12500000U) /* HSE = 12.5MHz */ - { - USB_HS_PHYC->USB_HS_PHYC_PLL = (0x2U << 1); - } - else if (hse_value == 16000000U) /* HSE = 16MHz */ - { - USB_HS_PHYC->USB_HS_PHYC_PLL = (0x3U << 1); - } - else if (hse_value == 24000000U) /* HSE = 24MHz */ - { - USB_HS_PHYC->USB_HS_PHYC_PLL = (0x4U << 1); - } - else if (hse_value == 25000000U) /* HSE = 25MHz */ - { - USB_HS_PHYC->USB_HS_PHYC_PLL = (0x5U << 1); - } - else if (hse_value == 32000000U) /* HSE = 32MHz */ - { - USB_HS_PHYC->USB_HS_PHYC_PLL = (0x7U << 1); - } - else - { - /* ... */ - } - - /* Control the tuning interface of the High Speed PHY */ - USB_HS_PHYC->USB_HS_PHYC_TUNE |= USB_HS_PHYC_TUNE_VALUE; - - /* Enable PLL internal PHY */ - USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN; - - - /* 2ms Delay required to get internal phy clock stable */ - HAL_Delay(2U); - - return 0; -} + /* Control the tuning interface of the High Speed PHY */ + USB_HS_PHYC->USB_HS_PHYC_TUNE |= USB_HS_PHYC_TUNE_VALUE; + + /* Enable PLL internal PHY */ + USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN; + + /* 2ms Delay required to get internal phy clock stable */ + HAL_Delay(2U); + + return 0; +} #endif uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base) { #if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h") -#define USB_OTG_GLB ((DWC2_GlobalTypeDef *)(reg_base)) +#define USB_OTG_GLB ((USB_OTG_GlobalTypeDef *)(reg_base)) /* B-peripheral session valid override enable */ USB_OTG_GLB->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; USB_OTG_GLB->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; @@ -165,7 +176,7 @@ uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base) #if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F732xx) || defined(STM32F733xx) USB_OTG_GLB->GCCFG = (1 << 23); usb_hsphy_init(25000000U); - return (1 << 23); /* Enable USB HS PHY USBx->GCCFG |= USB_OTG_GCCFG_PHYHSEN;*/ + return (1 << 23); /* Enable USB HS PHY USBx->GCCFG |= USB_OTG_GCCFG_PHYHSEN;*/ #elif __has_include("stm32h7rsxx.h") return (1 << 21); #else @@ -183,7 +194,7 @@ uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base) uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base) { #if __has_include("stm32h7xx.h") || __has_include("stm32f7xx.h") || __has_include("stm32l4xx.h") -#define USB_OTG_GLB ((DWC2_GlobalTypeDef *)(reg_base)) +#define USB_OTG_GLB ((USB_OTG_GlobalTypeDef *)(reg_base)) /* B-peripheral session valid override enable */ USB_OTG_GLB->GOTGCTL &= ~USB_OTG_GOTGCTL_BVALOEN; USB_OTG_GLB->GOTGCTL &= ~USB_OTG_GOTGCTL_BVALOVAL; @@ -206,7 +217,39 @@ uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base) #endif } +extern uint32_t SystemCoreClock; + void usbd_dwc2_delay_ms(uint8_t ms) { - HAL_Delay(ms); -} \ No newline at end of file + uint32_t count = SystemCoreClock / 1000 * ms; + while (count--) { + __asm volatile("nop"); + } +} + +void OTG_FS_IRQHandler(void) +{ + g_usb_dwc2_irq[0](g_usb_dwc2_busid[0]); +} + +void OTG_HS_IRQHandler(void) +{ + g_usb_dwc2_irq[1](g_usb_dwc2_busid[1]); +} + +#ifdef CONFIG_USB_DCACHE_ENABLE +void usb_dcache_clean(uintptr_t addr, size_t size) +{ + SCB_CleanDCache_by_Addr((void *)addr, size); +} + +void usb_dcache_invalidate(uintptr_t addr, size_t size) +{ + SCB_InvalidateDCache_by_Addr((void *)addr, size); +} + +void usb_dcache_flush(uintptr_t addr, size_t size) +{ + SCB_CleanInvalidateDCache_by_Addr((void *)addr, size); +} +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/dwc2/usb_hc_dwc2.c b/components/drivers/usb/cherryusb/port/dwc2/usb_hc_dwc2.c index de053cd0cdd..46effd5655e 100644 --- a/components/drivers/usb/cherryusb/port/dwc2/usb_hc_dwc2.c +++ b/components/drivers/usb/cherryusb/port/dwc2/usb_hc_dwc2.c @@ -42,6 +42,11 @@ struct dwc2_chan { uint8_t chidx; bool inuse; bool dir_in; + bool do_ssplit; + bool do_csplit; + uint8_t hub_addr; + uint8_t hub_port; + uint16_t ssplit_frame; usb_osal_sem_t waitsem; struct usbh_urb *urb; uint32_t iso_frame_idx; @@ -51,6 +56,7 @@ struct dwc2_hcd { volatile bool port_csc; volatile bool port_pec; volatile bool port_occ; + uint32_t GSNPSID; struct dwc2_chan chan_pool[CONFIG_USBHOST_PIPE_NUM]; } g_dwc2_hcd[CONFIG_USBHOST_MAX_BUS]; @@ -75,11 +81,24 @@ static inline int dwc2_reset(struct usbh_bus *bus) count = 0U; USB_OTG_GLB->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; - do { - if (++count > 200000U) { - return -1; - } - } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); + if (g_dwc2_hcd[bus->hcd.hcd_id].GSNPSID < 0x4F54420AU) { + do { + if (++count > 200000U) { + USB_LOG_ERR("DWC2 reset timeout\r\n"); + return -1; + } + } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); + } else { + do { + if (++count > 200000U) { + USB_LOG_ERR("DWC2 reset timeout\r\n"); + return -1; + } + } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_CSRSTDONE) != USB_OTG_GRSTCTL_CSRSTDONE); + + USB_OTG_GLB->GRSTCTL &= ~USB_OTG_GRSTCTL_CSRST; + USB_OTG_GLB->GRSTCTL |= USB_OTG_GRSTCTL_CSRSTDONE; + } return 0; } @@ -216,12 +235,6 @@ static inline void dwc2_chan_char_init(struct usbh_bus *bus, uint8_t ch_num, uin regval |= USB_OTG_HCCHAR_EPDIR; } - if ((usbh_get_port_speed(bus, 0) == USB_SPEED_HIGH) && (speed != USB_SPEED_HIGH)) { - USB_LOG_ERR("Do not support LS/FS device on HS hub\r\n"); - while (1) { - } - } - /* LS device plugged to HUB */ if ((speed == USB_SPEED_LOW) && (usbh_get_port_speed(bus, 0) != USB_SPEED_LOW)) { regval |= USB_OTG_HCCHAR_LSDEV; @@ -234,30 +247,47 @@ static inline void dwc2_chan_char_init(struct usbh_bus *bus, uint8_t ch_num, uin USB_OTG_HC((uint32_t)ch_num)->HCCHAR = regval; } -static void dwc2_chan_init(struct usbh_bus *bus, uint8_t ch_num, uint8_t devaddr, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps, uint8_t speed) +static inline void dwc2_chan_splt_init(struct usbh_bus *bus, uint8_t ch_num) { - uint32_t regval; + struct dwc2_chan *chan; + uint32_t hcsplt; - /* Clear old interrupt conditions for this host channel. */ - USB_OTG_HC((uint32_t)ch_num)->HCINT = 0xFFFFFFFFU; + chan = &g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[ch_num]; - /* Enable channel interrupts required for this transfer. */ - regval = USB_OTG_HCINTMSK_CHHM; + if (chan->do_ssplit) { + hcsplt = USB_OTG_HCSPLT_SPLITEN; + hcsplt |= (chan->hub_addr << USB_OTG_HCSPLT_HUBADDR_Pos); + hcsplt |= chan->hub_port; - if (ep_type == USB_ENDPOINT_TYPE_INTERRUPT) { - regval |= USB_OTG_HCINTMSK_NAKM; + if (chan->do_csplit) { + hcsplt |= USB_OTG_HCSPLT_COMPLSPLT; + } else { + hcsplt &= ~USB_OTG_HCSPLT_COMPLSPLT; + } + + USB_OTG_HC((uint32_t)ch_num)->HCSPLT = hcsplt; + } else { + USB_OTG_HC((uint32_t)ch_num)->HCSPLT = 0U; } +} + +static void dwc2_chan_init(struct usbh_bus *bus, uint8_t ch_num, uint8_t devaddr, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps, uint8_t speed) +{ + /* Clear old interrupt conditions for this host channel. */ + USB_OTG_HC((uint32_t)ch_num)->HCINT = 0xFFFFFFFFU; - USB_OTG_HC((uint32_t)ch_num)->HCINTMSK = regval; + /* Enable channel interrupts required for this transfer. */ + USB_OTG_HC((uint32_t)ch_num)->HCINTMSK = USB_OTG_HCINTMSK_CHHM; /* Enable the top level host channel interrupt. */ USB_OTG_HOST->HAINTMSK |= 1UL << (ch_num & 0xFU); dwc2_chan_char_init(bus, ch_num, devaddr, ep_addr, ep_type, ep_mps, speed); + dwc2_chan_splt_init(bus, ch_num); } /* For IN channel HCTSIZ.XferSize is expected to be an integer multiple of ep_mps size.*/ -static inline void dwc2_chan_transfer(struct usbh_bus *bus, uint8_t ch_num, uint8_t ep_addr, uint8_t *buf, uint32_t size, uint8_t num_packets, uint8_t pid) +static inline void dwc2_chan_transfer(struct usbh_bus *bus, uint8_t ch_num, uint8_t ep_addr, uint8_t *buf, uint32_t size, uint16_t num_packets, uint8_t pid) { __IO uint32_t tmpreg; uint8_t is_oddframe; @@ -294,11 +324,16 @@ static inline void dwc2_chan_transfer(struct usbh_bus *bus, uint8_t ch_num, uint static void dwc2_halt(struct usbh_bus *bus, uint8_t ch_num) { volatile uint32_t ChannelEna = (USB_OTG_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) >> 31; + volatile uint32_t HcEpType = (USB_OTG_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_EPTYP) >> 18; + volatile uint32_t SplitEna = (USB_OTG_HC(ch_num)->HCSPLT & USB_OTG_HCSPLT_SPLITEN) >> 31; volatile uint32_t count = 0U; - __IO uint32_t value; + volatile uint32_t value; - if (((USB_OTG_GLB->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == USB_OTG_GAHBCFG_DMAEN) && - (ChannelEna == 0U)) { + /* In buffer DMA, Channel disable must not be programmed for non-split periodic channels. + At the end of the next uframe/frame (in the worst case), the core generates a channel halted + and disables the channel automatically. */ + if ((((USB_OTG_GLB->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == USB_OTG_GAHBCFG_DMAEN) && (SplitEna == 0U)) && + ((ChannelEna == 0U) || (((HcEpType == HCCHAR_ISOC) || (HcEpType == HCCHAR_INTR))))) { return; } @@ -306,7 +341,7 @@ static void dwc2_halt(struct usbh_bus *bus, uint8_t ch_num) value = USB_OTG_HC(ch_num)->HCCHAR; value |= USB_OTG_HCCHAR_CHDIS; - value &= ~USB_OTG_HCCHAR_CHENA; + value |= USB_OTG_HCCHAR_CHENA; value &= ~USB_OTG_HCCHAR_EPDIR; USB_OTG_HC(ch_num)->HCCHAR = value; do { @@ -328,7 +363,7 @@ static int usbh_reset_port(struct usbh_bus *bus, const uint8_t port) USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG); USB_OTG_HPRT = (USB_OTG_HPRT_PRST | hprt0); - usb_osal_msleep(100U); /* See Note #1 */ + usb_osal_msleep(100U); USB_OTG_HPRT = ((~USB_OTG_HPRT_PRST) & hprt0); usb_osal_msleep(10U); @@ -352,6 +387,14 @@ static inline uint32_t dwc2_get_glb_intstatus(struct usbh_bus *bus) return tmpreg; } +static inline uint16_t dwc2_get_full_frame_num(struct usbh_bus *bus) +{ + uint16_t frame = usbh_get_frame_number(bus); + + /* USB_OTG_HFNUM_FRNUM_Msk is 0xFFFF but max frame num is 0x3FFF */ + return ((frame & 0x3FFF) >> 3); +} + static int dwc2_chan_alloc(struct usbh_bus *bus) { size_t flags; @@ -362,6 +405,9 @@ static int dwc2_chan_alloc(struct usbh_bus *bus) if (!g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[chidx].inuse) { g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[chidx].inuse = true; usb_osal_leave_critical_section(flags); + + g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[chidx].do_ssplit = 0; + g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[chidx].do_csplit = 0; return chidx; } } @@ -378,14 +424,14 @@ static void dwc2_chan_free(struct dwc2_chan *chan) usb_osal_leave_critical_section(flags); } -static uint8_t dwc2_calculate_packet_num(uint32_t input_size, uint8_t ep_addr, uint16_t ep_mps, uint32_t *output_size) +static uint16_t dwc2_calculate_packet_num(uint32_t input_size, uint8_t ep_addr, uint16_t ep_mps, uint32_t *output_size) { uint16_t num_packets; num_packets = (uint16_t)((input_size + ep_mps - 1U) / ep_mps); - if (num_packets > 256) { - num_packets = 256; + if (num_packets > 0x3FF) { + num_packets = 0x3FF; // pktcnt 10bits } if (input_size == 0) { @@ -404,9 +450,29 @@ static uint8_t dwc2_calculate_packet_num(uint32_t input_size, uint8_t ep_addr, u static void dwc2_control_urb_init(struct usbh_bus *bus, uint8_t chidx, struct usbh_urb *urb, struct usb_setup_packet *setup, uint8_t *buffer, uint32_t buflen) { struct dwc2_chan *chan; + uint32_t datalen; + uint8_t data_pid; chan = &g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[chidx]; + /* split buflen with ep mps */ + if (chan->do_ssplit && (chan->ep0_state == DWC2_EP0_STATE_INDATA || chan->ep0_state == DWC2_EP0_STATE_OUTDATA)) { + if (buflen > USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize)) { + datalen = USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize); + } else { + datalen = buflen; + } + + if (urb->data_toggle == 0) { + data_pid = HC_PID_DATA0; + } else { + data_pid = HC_PID_DATA1; + } + } else { + datalen = buflen; // buflen = setup->wLength + data_pid = HC_PID_DATA1; + } + if (chan->ep0_state == DWC2_EP0_STATE_SETUP) /* fill setup */ { chan->num_packets = dwc2_calculate_packet_num(8, 0x00, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); @@ -414,14 +480,14 @@ static void dwc2_control_urb_init(struct usbh_bus *bus, uint8_t chidx, struct us dwc2_chan_transfer(bus, chidx, 0x00, (uint8_t *)setup, chan->xferlen, chan->num_packets, HC_PID_SETUP); } else if (chan->ep0_state == DWC2_EP0_STATE_INDATA) /* fill in data */ { - chan->num_packets = dwc2_calculate_packet_num(setup->wLength, 0x80, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); + chan->num_packets = dwc2_calculate_packet_num(datalen, 0x80, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); dwc2_chan_init(bus, chidx, urb->hport->dev_addr, 0x80, USB_ENDPOINT_TYPE_CONTROL, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), urb->hport->speed); - dwc2_chan_transfer(bus, chidx, 0x80, buffer, chan->xferlen, chan->num_packets, HC_PID_DATA1); + dwc2_chan_transfer(bus, chidx, 0x80, buffer, chan->xferlen, chan->num_packets, data_pid); } else if (chan->ep0_state == DWC2_EP0_STATE_OUTDATA) /* fill out data */ { - chan->num_packets = dwc2_calculate_packet_num(setup->wLength, 0x00, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); + chan->num_packets = dwc2_calculate_packet_num(datalen, 0x00, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); dwc2_chan_init(bus, chidx, urb->hport->dev_addr, 0x00, USB_ENDPOINT_TYPE_CONTROL, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), urb->hport->speed); - dwc2_chan_transfer(bus, chidx, 0x00, buffer, chan->xferlen, chan->num_packets, HC_PID_DATA1); + dwc2_chan_transfer(bus, chidx, 0x00, buffer, chan->xferlen, chan->num_packets, data_pid); } else if (chan->ep0_state == DWC2_EP0_STATE_INSTATUS) /* fill in status */ { chan->num_packets = dwc2_calculate_packet_num(0, 0x80, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); @@ -438,10 +504,21 @@ static void dwc2_control_urb_init(struct usbh_bus *bus, uint8_t chidx, struct us static void dwc2_bulk_intr_urb_init(struct usbh_bus *bus, uint8_t chidx, struct usbh_urb *urb, uint8_t *buffer, uint32_t buflen) { struct dwc2_chan *chan; + uint32_t datalen; chan = &g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[chidx]; - chan->num_packets = dwc2_calculate_packet_num(buflen, urb->ep->bEndpointAddress, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); + if (chan->do_ssplit) { + if (buflen > USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize)) { + datalen = USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize); + } else { + datalen = buflen; + } + } else { + datalen = buflen; + } + + chan->num_packets = dwc2_calculate_packet_num(datalen, urb->ep->bEndpointAddress, USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), &chan->xferlen); dwc2_chan_init(bus, chidx, urb->hport->dev_addr, urb->ep->bEndpointAddress, USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes), USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize), urb->hport->speed); dwc2_chan_transfer(bus, chidx, urb->ep->bEndpointAddress, buffer, chan->xferlen, chan->num_packets, urb->data_toggle == 0 ? HC_PID_DATA0 : HC_PID_DATA1); } @@ -472,6 +549,7 @@ __WEAK void usb_hc_low_level_deinit(struct usbh_bus *bus) int usb_hc_init(struct usbh_bus *bus) { int ret; + uint8_t channels; memset(&g_dwc2_hcd[bus->hcd.hcd_id], 0, sizeof(struct dwc2_hcd)); @@ -481,27 +559,24 @@ int usb_hc_init(struct usbh_bus *bus) usb_hc_low_level_init(bus); + channels = ((USB_OTG_GLB->GHWCFG2 & (0x0f << 14)) >> 14) + 1; + USB_LOG_INFO("========== dwc2 hcd params ==========\r\n"); - USB_LOG_INFO("CID:%08x\r\n", USB_OTG_GLB->CID); - USB_LOG_INFO("GSNPSID:%08x\r\n", USB_OTG_GLB->GSNPSID); - USB_LOG_INFO("GHWCFG1:%08x\r\n", USB_OTG_GLB->GHWCFG1); - USB_LOG_INFO("GHWCFG2:%08x\r\n", USB_OTG_GLB->GHWCFG2); - USB_LOG_INFO("GHWCFG3:%08x\r\n", USB_OTG_GLB->GHWCFG3); - USB_LOG_INFO("GHWCFG4:%08x\r\n", USB_OTG_GLB->GHWCFG4); - - USB_LOG_INFO("dwc2 has %d channels and dfifo depth(32-bit words) is %d\r\n", ((USB_OTG_GLB->GHWCFG2 & (0x0f << 14)) >> 14) + 1, (USB_OTG_GLB->GHWCFG3 >> 16)); - - if (((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) != 2) { - USB_LOG_ERR("This dwc2 version does not support dma mode, so stop working\r\n"); - while (1) { - } - } + USB_LOG_INFO("CID:%08x\r\n", (unsigned int)USB_OTG_GLB->CID); + USB_LOG_INFO("GSNPSID:%08x\r\n", (unsigned int)USB_OTG_GLB->GSNPSID); + USB_LOG_INFO("GHWCFG1:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG1); + USB_LOG_INFO("GHWCFG2:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG2); + USB_LOG_INFO("GHWCFG3:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG3); + USB_LOG_INFO("GHWCFG4:%08x\r\n", (unsigned int)USB_OTG_GLB->GHWCFG4); - if ((CONFIG_USB_DWC2_RX_FIFO_SIZE + CONFIG_USB_DWC2_NPTX_FIFO_SIZE + CONFIG_USB_DWC2_PTX_FIFO_SIZE) > (USB_OTG_GLB->GHWCFG3 >> 16)) { - USB_LOG_ERR("Your fifo config is overflow, please check\r\n"); - while (1) { - } - } + USB_LOG_INFO("dwc2 has %d channels and dfifo depth(32-bit words) is %d\r\n", channels, (USB_OTG_GLB->GHWCFG3 >> 16)); + + USB_ASSERT_MSG(((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) == 2, "This dwc2 version does not support dma mode, so stop working"); + USB_ASSERT_MSG(channels >= CONFIG_USBHOST_PIPE_NUM, "dwc2 has less channels than config, please check"); + USB_ASSERT_MSG((CONFIG_USB_DWC2_RX_FIFO_SIZE + CONFIG_USB_DWC2_NPTX_FIFO_SIZE + CONFIG_USB_DWC2_PTX_FIFO_SIZE) <= (USB_OTG_GLB->GHWCFG3 >> 16), + "Your fifo config is overflow, please check"); + + g_dwc2_hcd[bus->hcd.hcd_id].GSNPSID = USB_OTG_GLB->GSNPSID; USB_OTG_GLB->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT; @@ -763,16 +838,13 @@ int usbh_submit_urb(struct usbh_urb *urb) } /* dma addr must be aligned 4 bytes */ - if ((((uint32_t)urb->setup) & 0x03) || (((uint32_t)urb->transfer_buffer) & 0x03)) { - return -USB_ERR_INVAL; - } + USB_ASSERT_MSG(!((uintptr_t)urb->setup % 4) && !((uintptr_t)urb->transfer_buffer % 4), + "urb->setup or urb->transfer_buffer is not aligned 4 bytes"); #ifdef CONFIG_USB_DCACHE_ENABLE - if (((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) || ((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE)) { - USB_LOG_ERR("urb buffer is not align with %d\r\n", CONFIG_USB_ALIGN_SIZE); - while (1) { - } - } + USB_ASSERT_MSG(!((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) && + !((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE), + "urb->setup or urb->transfer_buffer is not aligned %d", CONFIG_USB_ALIGN_SIZE); #endif bus = urb->hport->bus; @@ -813,6 +885,15 @@ int usbh_submit_urb(struct usbh_urb *urb) chan = &g_dwc2_hcd[bus->hcd.hcd_id].chan_pool[chidx]; chan->chidx = chidx; chan->urb = urb; + chan->do_ssplit = 0; + + if (urb->hport->speed != USB_SPEED_HIGH && + usbh_get_port_speed(bus, 0) == USB_SPEED_HIGH) { + chan->do_ssplit = 1; + chan->do_csplit = 0; + chan->hub_port = urb->hport->port; + chan->hub_addr = urb->hport->parent->hub_addr; + } urb->hcpriv = chan; urb->errorcode = -USB_ERR_BUSY; @@ -926,10 +1007,11 @@ static void dwc2_inchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) if (chan_intstatus & USB_OTG_HCINT_XFRC) { urb->errorcode = 0; - uint32_t count = chan->xferlen - (USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* how many size has received */ + uint32_t count = chan->xferlen - (USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* how many size has received */ //uint32_t has_used_packets = chan->num_packets - ((USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) >> 19); /* how many packets have used */ urb->actual_length += count; + urb->transfer_buffer_length -= count; uint8_t data_toggle = ((USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_DPID) >> USB_OTG_HCTSIZ_DPID_Pos); @@ -943,17 +1025,27 @@ static void dwc2_inchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) usb_dcache_invalidate((uintptr_t)urb->transfer_buffer, USB_ALIGN_UP(count, CONFIG_USB_ALIGN_SIZE)); } + chan->do_csplit = 0; + if (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_CONTROL) { if (chan->ep0_state == DWC2_EP0_STATE_INDATA) { - chan->ep0_state = DWC2_EP0_STATE_OUTSTATUS; - dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer, urb->transfer_buffer_length); + if (chan->do_ssplit && urb->transfer_buffer_length > 0) { + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + } else { + chan->ep0_state = DWC2_EP0_STATE_OUTSTATUS; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer, urb->transfer_buffer_length); + } } else if (chan->ep0_state == DWC2_EP0_STATE_INSTATUS) { chan->ep0_state = DWC2_EP0_STATE_SETUP; dwc2_urb_waitup(urb); } } else if (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_ISOCHRONOUS) { } else { - dwc2_urb_waitup(urb); + if (chan->do_ssplit && urb->transfer_buffer_length > 0 && (count == USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize))) { + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + } else { + dwc2_urb_waitup(urb); + } } } else if (chan_intstatus & USB_OTG_HCINT_AHBERR) { urb->errorcode = -USB_ERR_IO; @@ -962,11 +1054,74 @@ static void dwc2_inchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) urb->errorcode = -USB_ERR_STALL; dwc2_urb_waitup(urb); } else if (chan_intstatus & USB_OTG_HCINT_NAK) { - urb->errorcode = -USB_ERR_NAK; - dwc2_urb_waitup(urb); + if (chan->do_ssplit) { + /* + * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and + * interrupt. Re-start the SSPLIT transfer. + */ + switch (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes)) { + case USB_ENDPOINT_TYPE_CONTROL: + chan->do_csplit = 0; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + break; + case USB_ENDPOINT_TYPE_BULK: + case USB_ENDPOINT_TYPE_INTERRUPT: + chan->do_csplit = 0; + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + break; + default: + break; + } + } else { + urb->errorcode = -USB_ERR_NAK; + dwc2_urb_waitup(urb); + } + } else if (chan_intstatus & USB_OTG_HCINT_ACK) { + if (chan->do_ssplit) { + /* Handle ACK on SSPLIT. ACK should not occur in CSPLIT. */ + switch (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes)) { + case USB_ENDPOINT_TYPE_CONTROL: + chan->do_csplit = 1; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + break; + case USB_ENDPOINT_TYPE_BULK: + case USB_ENDPOINT_TYPE_INTERRUPT: + //printf("intr ack, len:%d\r\n", urb->actual_length); + chan->do_csplit = 1; + chan->ssplit_frame = dwc2_get_full_frame_num(bus); + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + break; + default: + break; + } + } } else if (chan_intstatus & USB_OTG_HCINT_NYET) { - urb->errorcode = -USB_ERR_NAK; - dwc2_urb_waitup(urb); + if (chan->do_ssplit) { + /* + * NYET on CSPLIT + * re-do the CSPLIT immediately on non-periodic + */ + switch (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes)) { + case USB_ENDPOINT_TYPE_CONTROL: + chan->do_csplit = 1; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + break; + case USB_ENDPOINT_TYPE_BULK: + case USB_ENDPOINT_TYPE_INTERRUPT: + if ((dwc2_get_full_frame_num(bus) - chan->ssplit_frame) > 4) { + chan->do_csplit = 0; + } else { + chan->do_csplit = 1; + } + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + break; + default: + break; + } + } else { + urb->errorcode = -USB_ERR_NAK; + dwc2_urb_waitup(urb); + } } else if (chan_intstatus & USB_OTG_HCINT_TXERR) { urb->errorcode = -USB_ERR_IO; dwc2_urb_waitup(urb); @@ -1003,7 +1158,16 @@ static void dwc2_outchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) uint32_t count = USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ; /* last packet size */ uint32_t has_used_packets = chan->num_packets - ((USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) >> 19); /* how many packets have used */ - urb->actual_length += (has_used_packets - 1) * USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize) + count; //the same with urb->actual_length += chan->xferlen; + uint32_t olen = (has_used_packets - 1) * USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize) + count; //the same with urb->actual_length += chan->xferlen; + urb->actual_length += olen; + + if (chan->ep0_state == DWC2_EP0_STATE_OUTDATA || urb->setup == NULL) { + if (urb->transfer_buffer_length > olen) { + urb->transfer_buffer_length -= olen; + } else { + urb->transfer_buffer_length = 0; + } + } uint8_t data_toggle = ((USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_DPID) >> USB_OTG_HCTSIZ_DPID_Pos); @@ -1013,6 +1177,8 @@ static void dwc2_outchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) urb->data_toggle = 1; } + chan->do_csplit = 0; + if (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_CONTROL) { if (chan->ep0_state == DWC2_EP0_STATE_SETUP) { if (urb->setup->wLength) { @@ -1026,15 +1192,23 @@ static void dwc2_outchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) } dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer, urb->transfer_buffer_length); } else if (chan->ep0_state == DWC2_EP0_STATE_OUTDATA) { - chan->ep0_state = DWC2_EP0_STATE_INSTATUS; - dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer, urb->transfer_buffer_length); + if (chan->do_ssplit && urb->transfer_buffer_length > 0) { + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + } else { + chan->ep0_state = DWC2_EP0_STATE_INSTATUS; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer, urb->transfer_buffer_length); + } } else if (chan->ep0_state == DWC2_EP0_STATE_OUTSTATUS) { chan->ep0_state = DWC2_EP0_STATE_SETUP; dwc2_urb_waitup(urb); } } else if (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_ISOCHRONOUS) { } else { - dwc2_urb_waitup(urb); + if (chan->do_ssplit && urb->transfer_buffer_length > 0) { + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + } else { + dwc2_urb_waitup(urb); + } } } else if (chan_intstatus & USB_OTG_HCINT_AHBERR) { urb->errorcode = -USB_ERR_IO; @@ -1043,11 +1217,73 @@ static void dwc2_outchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) urb->errorcode = -USB_ERR_STALL; dwc2_urb_waitup(urb); } else if (chan_intstatus & USB_OTG_HCINT_NAK) { - urb->errorcode = -USB_ERR_NAK; - dwc2_urb_waitup(urb); + if (chan->do_ssplit) { + /* + * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and + * interrupt. Re-start the SSPLIT transfer. + */ + switch (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes)) { + case USB_ENDPOINT_TYPE_CONTROL: + chan->do_csplit = 0; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + break; + case USB_ENDPOINT_TYPE_BULK: + case USB_ENDPOINT_TYPE_INTERRUPT: + chan->do_csplit = 0; + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + break; + default: + break; + } + } else { + urb->errorcode = -USB_ERR_NAK; + dwc2_urb_waitup(urb); + } + } else if (chan_intstatus & USB_OTG_HCINT_ACK) { + if (chan->do_ssplit) { + /* Handle ACK on SSPLIT. ACK should not occur in CSPLIT. */ + switch (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes)) { + case USB_ENDPOINT_TYPE_CONTROL: + chan->do_csplit = 1; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + break; + case USB_ENDPOINT_TYPE_BULK: + case USB_ENDPOINT_TYPE_INTERRUPT: + chan->do_csplit = 1; + chan->ssplit_frame = dwc2_get_full_frame_num(bus); + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + break; + default: + break; + } + } } else if (chan_intstatus & USB_OTG_HCINT_NYET) { - urb->errorcode = -USB_ERR_NAK; - dwc2_urb_waitup(urb); + if (chan->do_ssplit) { + /* + * NYET on CSPLIT + * re-do the CSPLIT immediately on non-periodic + */ + switch (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes)) { + case USB_ENDPOINT_TYPE_CONTROL: + chan->do_csplit = 1; + dwc2_control_urb_init(bus, ch_num, urb, urb->setup, urb->transfer_buffer + urb->actual_length - 8, urb->transfer_buffer_length); + break; + case USB_ENDPOINT_TYPE_BULK: + case USB_ENDPOINT_TYPE_INTERRUPT: + if ((dwc2_get_full_frame_num(bus) - chan->ssplit_frame) > 4) { + chan->do_csplit = 0; + } else { + chan->do_csplit = 1; + } + dwc2_bulk_intr_urb_init(bus, ch_num, urb, urb->transfer_buffer + urb->actual_length, urb->transfer_buffer_length); + break; + default: + break; + } + } else { + urb->errorcode = -USB_ERR_NAK; + dwc2_urb_waitup(urb); + } } else if (chan_intstatus & USB_OTG_HCINT_TXERR) { urb->errorcode = -USB_ERR_IO; dwc2_urb_waitup(urb); @@ -1066,7 +1302,7 @@ static void dwc2_outchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num) static void dwc2_port_irq_handler(struct usbh_bus *bus) { - __IO uint32_t hprt0, hprt0_dup, regval; + __IO uint32_t hprt0, hprt0_dup; /* Handle Host Port Interrupts */ hprt0 = USB_OTG_HPRT; @@ -1096,7 +1332,7 @@ static void dwc2_port_irq_handler(struct usbh_bus *bus) if ((hprt0 & USB_OTG_HPRT_PSPD) == (HPRT0_PRTSPD_LOW_SPEED << 17)) { USB_OTG_HOST->HFIR = 6000U; if ((USB_OTG_HOST->HCFG & USB_OTG_HCFG_FSLSPCS) != USB_OTG_HCFG_FSLSPCS_1) { - regval = USB_OTG_HOST->HCFG; + uint32_t regval = USB_OTG_HOST->HCFG; regval &= ~USB_OTG_HCFG_FSLSPCS; regval |= USB_OTG_HCFG_FSLSPCS_1; USB_OTG_HOST->HCFG = regval; @@ -1104,7 +1340,7 @@ static void dwc2_port_irq_handler(struct usbh_bus *bus) } else { USB_OTG_HOST->HFIR = 48000U; if ((USB_OTG_HOST->HCFG & USB_OTG_HCFG_FSLSPCS) != USB_OTG_HCFG_FSLSPCS_0) { - regval = USB_OTG_HOST->HCFG; + uint32_t regval = USB_OTG_HOST->HCFG; regval &= ~USB_OTG_HCFG_FSLSPCS; regval |= USB_OTG_HCFG_FSLSPCS_0; USB_OTG_HOST->HCFG = regval; diff --git a/components/drivers/usb/cherryusb/port/ehci/README.md b/components/drivers/usb/cherryusb/port/ehci/README.md index ede4cab8124..753fc446805 100644 --- a/components/drivers/usb/cherryusb/port/ehci/README.md +++ b/components/drivers/usb/cherryusb/port/ehci/README.md @@ -4,11 +4,11 @@ ### BouffaloLab -- BouffaloLab BL616/BL808 +- BouffaloLab BL616/BL808 (bouffalolab + EHCI) ### HPMicro -- HPM all series +- HPM all series (hpmicro + EHCI) ### AllwinnerTech @@ -30,8 +30,8 @@ Modify USB_NOCACHE_RAM_SECTION #define USB_NOCACHE_RAM_SECTION __attribute__((section(".NonCacheable"))) ``` -- IMRT10XX/IMRT11XX -- MCXN9XX/MCXN236 +- IMRT10XX/IMRT11XX (chipidea + EHCI) +- MCXN9XX/MCXN236 (chipidea + EHCI) ### Intel diff --git a/components/drivers/usb/cherryusb/port/ehci/usb_glue_bouffalo.c b/components/drivers/usb/cherryusb/port/ehci/usb_glue_bouffalo.c index 8f1e87fd1b9..03cd1f3379e 100644 --- a/components/drivers/usb/cherryusb/port/ehci/usb_glue_bouffalo.c +++ b/components/drivers/usb/cherryusb/port/ehci/usb_glue_bouffalo.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ #include "bflb_core.h" +#include "bflb_l1c.h" #include "usbh_core.h" #include "hardware/usb_v2_reg.h" @@ -141,3 +142,20 @@ uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port) } return USB_SPEED_HIGH; } + +#ifdef CONFIG_USB_DCACHE_ENABLE +void usb_dcache_clean(uintptr_t addr, size_t size) +{ + bflb_l1c_dcache_clean_range((void *)addr, size); +} + +void usb_dcache_invalidate(uintptr_t addr, size_t size) +{ + bflb_l1c_dcache_invalidate_range((void *)addr, size); +} + +void usb_dcache_flush(uintptr_t addr, size_t size) +{ + bflb_l1c_dcache_clean_invalidate_range((void *)addr, size); +} +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/ehci/usb_glue_mcx.c b/components/drivers/usb/cherryusb/port/ehci/usb_glue_mcx.c deleted file mode 100644 index 92b2c25ec85..00000000000 --- a/components/drivers/usb/cherryusb/port/ehci/usb_glue_mcx.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Copyright (c) 2024, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#include "usbh_core.h" -#include "fsl_common.h" -#include "usb_chipidea_reg.h" - -#define USB_DEVICE_CONFIG_EHCI 1 - -/*! @brief USB controller ID */ -typedef enum _usb_controller_index -{ - kUSB_ControllerKhci0 = 0U, /*!< KHCI 0U */ - kUSB_ControllerKhci1 = 1U, /*!< KHCI 1U, Currently, there are no platforms which have two KHCI IPs, this is reserved - to be used in the future. */ - kUSB_ControllerEhci0 = 2U, /*!< EHCI 0U */ - kUSB_ControllerEhci1 = 3U, /*!< EHCI 1U */ -} usb_controller_index_t; - -/* USB PHY condfiguration */ -#define BOARD_USB_PHY_D_CAL (0x04U) -#define BOARD_USB_PHY_TXCAL45DP (0x07U) -#define BOARD_USB_PHY_TXCAL45DM (0x07U) -#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ - -#if !defined(CONFIG_USB_EHCI_NXP) -#error "mcx ehci must config CONFIG_USB_EHCI_NXP" -#endif - -#if !defined(CONFIG_USB_EHCI_HCCR_OFFSET) || CONFIG_USB_EHCI_HCCR_OFFSET != 0x100 -#error "mcx ehci must config CONFIG_USB_EHCI_HCCR_OFFSET to 0x100" -#endif - -#if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U)) -#include "usb_phy.h" -#endif - -#if (defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U)) -void USB1_HS_IRQHandler(void) -{ - extern void USBH_IRQHandler(uint8_t busid); - USBH_IRQHandler(0); -} -#endif - -void USB_ClockInit(void) -{ -#if defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U) - usb_phy_config_struct_t phyConfig = { - BOARD_USB_PHY_D_CAL, - BOARD_USB_PHY_TXCAL45DP, - BOARD_USB_PHY_TXCAL45DM, - }; -#endif -#if defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0U) - SPC0->ACTIVE_VDELAY = 0x0500; - /* Change the power DCDC to 1.8v (By deafult, DCDC is 1.8V), CORELDO to 1.1v (By deafult, CORELDO is 1.0V) */ - SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK; - SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) | - SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u); - /* Wait until it is done */ - while (SPC0->SC & SPC_SC_BUSY_MASK) - ; - if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) { - SCG0->TRIM_LOCK = 0x5a5a0001U; - SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK; - /* wait LDO ready */ - while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)) - ; - } - SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK; - SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK); - /* xtal = 20 ~ 30MHz */ - SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT); - SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK; - while (1) { - if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) { - break; - } - } - SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; - CLOCK_EnableClock(kCLOCK_UsbHs); - CLOCK_EnableClock(kCLOCK_UsbHsPhy); - CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U); - CLOCK_EnableUsbhsClock(); - USB_EhciPhyInit(kUSB_ControllerEhci0, BOARD_XTAL0_CLK_HZ, &phyConfig); -#endif -#if defined(USB_DEVICE_CONFIG_KHCI) && (USB_DEVICE_CONFIG_KHCI > 0U) - CLOCK_AttachClk(kCLK_48M_to_USB0); - CLOCK_EnableClock(kCLOCK_Usb0Ram); - CLOCK_EnableClock(kCLOCK_Usb0Fs); - CLOCK_EnableUsbfsClock(); -#endif -} - -static void usb_host_mode_init(CHIPIDEA_TypeDef *ptr) -{ - /* Set mode to host, must be set immediately after reset */ - ptr->USBMODE &= ~USB_USBMODE_CM_MASK; - ptr->USBMODE |= USB_USBMODE_CM_SET(3); - - /* Set the endian */ - ptr->USBMODE &= ~USB_USBMODE_ES_MASK; - - /* Set parallel interface signal */ - ptr->PORTSC1 &= ~USB_PORTSC1_STS_MASK; - - /* Set parallel transceiver width */ - ptr->PORTSC1 &= ~USB_PORTSC1_PTW_MASK; - - /* Not use interrupt threshold. */ - ptr->USBCMD &= ~USB_USBCMD_ITC_MASK; -} - -void usb_hc_low_level_init(struct usbh_bus *bus) -{ - USB_ClockInit(); - /* Install isr, set priority, and enable IRQ. */ - NVIC_SetPriority((IRQn_Type)USB1_HS_IRQn, 3); - EnableIRQ((IRQn_Type)USB1_HS_IRQn); -} - -void usb_hc_low_level2_init(struct usbh_bus *bus) -{ - usb_host_mode_init((CHIPIDEA_TypeDef *)(bus->hcd.reg_base)); -} - -void usb_hc_low_level_deinit(struct usbh_bus *bus) -{ - DisableIRQ((IRQn_Type)USB1_HS_IRQn); -} - -uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port) -{ - (void)port; - uint8_t speed; - - CHIPIDEA_TypeDef *ptr = (CHIPIDEA_TypeDef *)bus->hcd.reg_base; - - speed = USB_PORTSC1_PSPD_GET(ptr->PORTSC1); - - if (speed == 0x00) { - return USB_SPEED_FULL; - } - if (speed == 0x01) { - return USB_SPEED_LOW; - } - if (speed == 0x02) { - USB_EhcihostPhyDisconnectDetectCmd(kUSB_ControllerEhci0, 1); - return USB_SPEED_HIGH; - } - - return 0; -} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/ehci/usb_glue_t113.c b/components/drivers/usb/cherryusb/port/ehci/usb_glue_t113.c index 99927acbcc7..0c99897fd58 100644 --- a/components/drivers/usb/cherryusb/port/ehci/usb_glue_t113.c +++ b/components/drivers/usb/cherryusb/port/ehci/usb_glue_t113.c @@ -5,16 +5,15 @@ */ #include "usbh_core.h" #include "usb_hc_ehci.h" + +#ifdef CONFIG_USB_EHCI_WITH_OHCI #include "usb_hc_ohci.h" +#endif #include "interrupt.h" #include "drv_reg_base.h" #include "drv_clock.h" -#if !defined(CONFIG_USB_EHCI_WITH_OHCI) -#error "t113 must define CONFIG_USB_EHCI_WITH_OHCI for ls/fs device" -#endif - #if CONFIG_USBHOST_MAX_BUS != 2 #error "t113 has 2 usb host controller" #endif @@ -44,16 +43,21 @@ void usb_gate_open(rt_uint8_t busid) { rt_uint32_t addr; - /* otg bus reset and gate open */ - if (busid == 0) - usb_select_phyTohci(); - - /* reset phy */ addr = (rt_uint32_t)&CCU->usb0_clk + busid * 4; - *(volatile rt_uint32_t *)addr &= ~(1 << 30); - sdelay(10); - *(volatile rt_uint32_t *)addr |= 1 << 30; - sdelay(10); + + if(busid == 0) { + /* otg gate open*/ + CCU->usb_bgr |= 1 << 8; + + /* otg bus reset */ + CCU->usb_bgr &= ~(1 << 24); + sdelay(10); + CCU->usb_bgr |= (1 << 24); + sdelay(10); + } + + /* ehci gate open */ + CCU->usb_bgr |= (1 << 4) << busid; /* ehci bus reset */ CCU->usb_bgr &= ~((1 << 20) << busid); @@ -61,8 +65,8 @@ void usb_gate_open(rt_uint8_t busid) CCU->usb_bgr |= (1 << 20) << busid; sdelay(10); - /* ehci gate open */ - CCU->usb_bgr |= (1 << 4) << busid; + /* ohci gate open */ + CCU->usb_bgr |= 1 << busid; /* ohci bus reset */ CCU->usb_bgr &= ~((1 << 16) << busid); @@ -70,15 +74,21 @@ void usb_gate_open(rt_uint8_t busid) CCU->usb_bgr |= (1 << 16) << busid; sdelay(10); - /* ohci gate open */ - CCU->usb_bgr |= 1 << busid; - sdelay(10); /* clock enable */ *(volatile rt_uint32_t *)addr &= ~(3 << 24); *(volatile rt_uint32_t *)addr |= (1 << 31) | (1 << 24); + /* reset phy */ + *(volatile rt_uint32_t *)addr &= ~(1 << 30); + sdelay(10); + *(volatile rt_uint32_t *)addr |= 1 << 30; + sdelay(10); + + /* otg phy select */ + if(busid == 0) usb_select_phyTohci(); + USB_LOG_DBG("usb%d gate : %X, clock : %X\n", busid, CCU->usb_bgr, *(volatile rt_uint32_t *)addr); } @@ -87,47 +97,6 @@ void usb_clean_siddp(struct usbh_bus *bus) *(volatile rt_uint32_t *)(bus->hcd.reg_base + 0x810) &= ~(1 << 3); } -static void usb_new_phyx_tp_write(struct usbh_bus *bus, int addr, int data, int len) -{ - rt_uint32_t base = bus->hcd.reg_base; - - for (int i = 0; i < len; i++) { - *(volatile rt_uint8_t *)(base + 0x810) |= 1 << 1; - - *(volatile rt_uint8_t *)(base + 0x810 + 1) = addr + i; - - *(volatile rt_uint8_t *)(base + 0x810) &= ~(1 << 0); - - *(volatile rt_uint8_t *)(base + 0x810) &= ~(1 << 7); - *(volatile rt_uint8_t *)(base + 0x810) |= (data & 0x1) << 7; - - *(volatile rt_uint8_t *)(base + 0x810) |= 1 << 0; - - *(volatile rt_uint8_t *)(base + 0x810) &= ~(1 << 0); - - *(volatile rt_uint8_t *)(base + 0x810) &= ~(1 << 1); - - data >>= 1; - } -} - -void usb_new_phy_init(struct usbh_bus *bus) -{ - rt_int32_t value = 0; - rt_uint32_t efuse_val = 0x1E5080F; - - usb_new_phyx_tp_write(bus, 0x1C, 0x0, 0x03); - - /* vref mode */ - usb_new_phyx_tp_write(bus, 0x60, 0x0, 0x01); - - value = (efuse_val & 0x3C0000) >> 18; - usb_new_phyx_tp_write(bus, 0x44, value, 0x04); - - value = (efuse_val & 0x1C00000) >> 22; - usb_new_phyx_tp_write(bus, 0x36, value, 0x03); -} - void usb_hci_set_passby(struct usbh_bus *bus) { /* AHB Master interface INCR16 enable */ @@ -140,24 +109,36 @@ void usb_hci_set_passby(struct usbh_bus *bus) void t113_ehci_isr(int vector, void *arg) { + rt_interrupt_enter(); + struct usbh_bus *bus = (struct usbh_bus *)arg; USB_LOG_DBG("t113_ehci_isr"); extern void USBH_IRQHandler(uint8_t busid); USBH_IRQHandler(bus->hcd.hcd_id); + + rt_interrupt_leave(); } +#ifdef CONFIG_USB_EHCI_WITH_OHCI + void t113_ohci_isr(int vector, void *arg) { + rt_interrupt_enter(); + struct usbh_bus *bus = (struct usbh_bus *)arg; USB_LOG_DBG("t113_ohci_isr"); extern void OHCI_IRQHandler(uint8_t busid); OHCI_IRQHandler(bus->hcd.hcd_id); + + rt_interrupt_leave(); } +#endif + void usb_hc_low_level_init(struct usbh_bus *bus) { int vector; @@ -173,8 +154,11 @@ void usb_hc_low_level_init(struct usbh_bus *bus) rt_hw_interrupt_umask(vector); /* register OHCI interrupt callback */ +#ifdef CONFIG_USB_EHCI_WITH_OHCI rt_hw_interrupt_install(vector + 1, t113_ohci_isr, bus, RT_NULL); + rt_hw_interrupt_set_priority(vector, 11 << 4); rt_hw_interrupt_umask(vector + 1); +#endif USB_LOG_DBG("usb%d vector : %d, phy : %X\n", bus->busid, vector, *(volatile rt_uint32_t *)(bus->hcd.reg_base + 0x810)); USB_LOG_DBG("usb%d hc low level init success\n", bus->busid); diff --git a/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.c b/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.c index b40d60d5535..7c314354bc9 100644 --- a/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.c +++ b/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.c @@ -17,6 +17,7 @@ struct ehci_hcd g_ehci_hcd[CONFIG_USBHOST_MAX_BUS]; USB_NOCACHE_RAM_SECTION struct ehci_qh_hw ehci_qh_pool[CONFIG_USBHOST_MAX_BUS][CONFIG_USB_EHCI_QH_NUM]; +USB_NOCACHE_RAM_SECTION struct ehci_qtd_hw ehci_qtd_pool[CONFIG_USBHOST_MAX_BUS][CONFIG_USB_EHCI_QTD_NUM]; /* The head of the asynchronous queue */ USB_NOCACHE_RAM_SECTION struct ehci_qh_hw g_async_qh_head[CONFIG_USBHOST_MAX_BUS]; @@ -26,32 +27,64 @@ USB_NOCACHE_RAM_SECTION struct ehci_qh_hw g_periodic_qh_head[CONFIG_USBHOST_MAX_ /* The frame list */ USB_NOCACHE_RAM_SECTION uint32_t g_framelist[CONFIG_USBHOST_MAX_BUS][USB_ALIGN_UP(CONFIG_USB_EHCI_FRAME_LIST_SIZE, 1024)] __attribute__((aligned(4096))); +static struct ehci_qtd_hw *ehci_qtd_alloc(struct usbh_bus *bus) +{ + struct ehci_qtd_hw *qtd; + size_t flags; + + flags = usb_osal_enter_critical_section(); + for (uint32_t i = 0; i < CONFIG_USB_EHCI_QTD_NUM; i++) { + qtd = &ehci_qtd_pool[bus->hcd.hcd_id][i]; + if (!qtd->inuse) { + qtd->inuse = true; + usb_osal_leave_critical_section(flags); + + memset(&qtd->hw, 0, sizeof(struct ehci_qtd)); + qtd->hw.next_qtd = QTD_LIST_END; + qtd->hw.alt_next_qtd = QTD_LIST_END; + qtd->hw.token = QTD_TOKEN_STATUS_HALTED; + qtd->urb = NULL; + qtd->bufaddr = 0; + qtd->length = 0; + + return qtd; + } + } + usb_osal_leave_critical_section(flags); + return NULL; +} + +static void ehci_qtd_free(struct usbh_bus *bus, struct ehci_qtd_hw *qtd) +{ + size_t flags; + + (void)bus; + + flags = usb_osal_enter_critical_section(); + qtd->inuse = false; + qtd->urb = NULL; + usb_osal_leave_critical_section(flags); +} + static struct ehci_qh_hw *ehci_qh_alloc(struct usbh_bus *bus) { struct ehci_qh_hw *qh; - struct ehci_qtd_hw *qtd; size_t flags; flags = usb_osal_enter_critical_section(); for (uint32_t i = 0; i < CONFIG_USB_EHCI_QH_NUM; i++) { - if (!g_ehci_hcd[bus->hcd.hcd_id].ehci_qh_used[i]) { - g_ehci_hcd[bus->hcd.hcd_id].ehci_qh_used[i] = true; + qh = &ehci_qh_pool[bus->hcd.hcd_id][i]; + if (!qh->inuse) { + qh->inuse = true; usb_osal_leave_critical_section(flags); - qh = &ehci_qh_pool[bus->hcd.hcd_id][i]; memset(&qh->hw, 0, sizeof(struct ehci_qh)); qh->hw.hlp = QTD_LIST_END; qh->hw.overlay.next_qtd = QTD_LIST_END; qh->hw.overlay.alt_next_qtd = QTD_LIST_END; qh->urb = NULL; - - for (uint32_t j = 0; j < CONFIG_USB_EHCI_QTD_NUM; j++) { - qtd = &qh->qtd_pool[j]; - qtd->hw.next_qtd = QTD_LIST_END; - qtd->hw.alt_next_qtd = QTD_LIST_END; - qtd->hw.token = QTD_TOKEN_STATUS_HALTED; - qtd->urb = NULL; - } + qh->first_qtd = QTD_LIST_END; + qh->remove_in_iaad = 0; return qh; } @@ -62,21 +95,23 @@ static struct ehci_qh_hw *ehci_qh_alloc(struct usbh_bus *bus) static void ehci_qh_free(struct usbh_bus *bus, struct ehci_qh_hw *qh) { + struct ehci_qtd_hw *qtd; size_t flags; - for (uint32_t i = 0; i < CONFIG_USB_EHCI_QH_NUM; i++) { - if (&ehci_qh_pool[bus->hcd.hcd_id][i] == qh) { - flags = usb_osal_enter_critical_section(); - g_ehci_hcd[bus->hcd.hcd_id].ehci_qh_used[i] = false; - usb_osal_leave_critical_section(flags); + flags = usb_osal_enter_critical_section(); + qtd = EHCI_ADDR2QTD(qh->first_qtd); - qh->urb = NULL; - return; - } + while (qtd) { + ehci_qtd_free(bus, qtd); + qtd = EHCI_ADDR2QTD(qtd->hw.next_qtd); } + + qh->inuse = false; + qh->first_qtd = QTD_LIST_END; + usb_osal_leave_critical_section(flags); } -#ifdef CONFIG_USB_DCACHE_ENABLE +#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE) static inline void usb_ehci_qh_qtd_flush(struct ehci_qh_hw *qh) { struct ehci_qtd_hw *qtd; @@ -84,15 +119,10 @@ static inline void usb_ehci_qh_qtd_flush(struct ehci_qh_hw *qh) qtd = EHCI_ADDR2QTD(qh->first_qtd); while (qtd) { - usb_dcache_clean((uintptr_t)&qtd->hw, USB_ALIGN_UP(SIZEOF_EHCI_QTD, CONFIG_USB_EHCI_ALIGN_SIZE)); - - if (!qtd->dir_in) { - usb_dcache_clean(qtd->bufaddr, USB_ALIGN_UP(qtd->length, CONFIG_USB_ALIGN_SIZE)); - } + usb_dcache_clean((uintptr_t)&qtd->hw, CONFIG_USB_EHCI_ALIGN_SIZE); qtd = EHCI_ADDR2QTD(qtd->hw.next_qtd); } - - usb_dcache_clean((uintptr_t)&qh->hw, USB_ALIGN_UP(SIZEOF_EHCI_QH, CONFIG_USB_EHCI_ALIGN_SIZE)); + usb_dcache_clean((uintptr_t)&qh->hw, CONFIG_USB_EHCI_ALIGN_SIZE); } #else #define usb_ehci_qh_qtd_flush(qh) @@ -103,9 +133,12 @@ static inline void ehci_qh_add_head(struct ehci_qh_hw *head, struct ehci_qh_hw * n->hw.hlp = head->hw.hlp; usb_ehci_qh_qtd_flush(n); - head->hw.hlp = QH_HLP_QH(n); + usb_dcache_flush((uintptr_t)n->urb->transfer_buffer, USB_ALIGN_UP(n->urb->transfer_buffer_length, CONFIG_USB_ALIGN_SIZE)); - usb_dcache_clean((uintptr_t)&head->hw, USB_ALIGN_UP(SIZEOF_EHCI_QH, CONFIG_USB_EHCI_ALIGN_SIZE)); + head->hw.hlp = QH_HLP_QH(n); +#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE) + usb_dcache_clean((uintptr_t)&head->hw, CONFIG_USB_EHCI_ALIGN_SIZE); +#endif } static inline void ehci_qh_remove(struct ehci_qh_hw *head, struct ehci_qh_hw *n) @@ -118,7 +151,9 @@ static inline void ehci_qh_remove(struct ehci_qh_hw *head, struct ehci_qh_hw *n) if (tmp) { tmp->hw.hlp = n->hw.hlp; - usb_dcache_clean((uintptr_t)&tmp->hw, USB_ALIGN_UP(SIZEOF_EHCI_QH, CONFIG_USB_EHCI_ALIGN_SIZE)); +#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE) + usb_dcache_clean((uintptr_t)&tmp->hw, CONFIG_USB_EHCI_ALIGN_SIZE); +#endif } } @@ -282,7 +317,6 @@ static void ehci_qtd_fill(struct ehci_qtd_hw *qtd, uint32_t bufaddr, size_t bufl qtd->hw.token = token; ehci_qtd_bpl_fill(qtd, usb_phyaddr2ramaddr(bufaddr), buflen); - qtd->dir_in = ((token & QTD_TOKEN_PID_MASK) == QTD_TOKEN_PID_IN) ? true : false; qtd->bufaddr = bufaddr; qtd->length = buflen; } @@ -301,9 +335,11 @@ static struct ehci_qh_hw *ehci_control_urb_init(struct usbh_bus *bus, struct usb return NULL; } - qtd_setup = &qh->qtd_pool[0]; - qtd_data = &qh->qtd_pool[1]; - qtd_status = &qh->qtd_pool[2]; + qtd_setup = ehci_qtd_alloc(bus); + qtd_data = ehci_qtd_alloc(bus); + qtd_status = ehci_qtd_alloc(bus); + + USB_ASSERT_MSG(qtd_setup && qtd_data && qtd_status, "ctrl qtd alloc failed"); ehci_qh_fill(qh, urb->hport->dev_addr, @@ -388,7 +424,6 @@ static struct ehci_qh_hw *ehci_bulk_urb_init(struct usbh_bus *bus, struct usbh_u struct ehci_qtd_hw *qtd = NULL; struct ehci_qtd_hw *first_qtd = NULL; struct ehci_qtd_hw *prev_qtd = NULL; - uint32_t qtd_num = 0; uint32_t xfer_len = 0; uint32_t token; size_t flags; @@ -410,7 +445,8 @@ static struct ehci_qh_hw *ehci_bulk_urb_init(struct usbh_bus *bus, struct usbh_u urb->hport->port); while (1) { - qtd = &qh->qtd_pool[qtd_num]; + qtd = ehci_qtd_alloc(bus); + USB_ASSERT_MSG(qtd, "bulk qtd alloc failed"); if (buflen > 0x4000) { xfer_len = 0x4000; @@ -449,11 +485,6 @@ static struct ehci_qh_hw *ehci_bulk_urb_init(struct usbh_bus *bus, struct usbh_u if (buflen == 0) { break; } - qtd_num++; - - if (qtd_num == CONFIG_USB_EHCI_QTD_NUM) { - return NULL; - } } /* update qh first qtd */ @@ -489,7 +520,6 @@ static struct ehci_qh_hw *ehci_intr_urb_init(struct usbh_bus *bus, struct usbh_u struct ehci_qtd_hw *qtd = NULL; struct ehci_qtd_hw *first_qtd = NULL; struct ehci_qtd_hw *prev_qtd = NULL; - uint32_t qtd_num = 0; uint32_t xfer_len = 0; uint32_t token; size_t flags; @@ -511,7 +541,8 @@ static struct ehci_qh_hw *ehci_intr_urb_init(struct usbh_bus *bus, struct usbh_u urb->hport->port); while (1) { - qtd = &qh->qtd_pool[qtd_num]; + qtd = ehci_qtd_alloc(bus); + USB_ASSERT_MSG(qtd, "intr qtd alloc failed"); if (buflen > 0x4000) { xfer_len = 0x4000; @@ -550,11 +581,6 @@ static struct ehci_qh_hw *ehci_intr_urb_init(struct usbh_bus *bus, struct usbh_u if (buflen == 0) { break; } - qtd_num++; - - if (qtd_num == CONFIG_USB_EHCI_QTD_NUM) { - return NULL; - } } /* update qh first qtd */ @@ -620,13 +646,9 @@ static void ehci_qh_scan_qtds(struct usbh_bus *bus, struct ehci_qh_hw *qhead, st qtd = EHCI_ADDR2QTD(qh->first_qtd); while (qtd) { - if (qtd->dir_in) { - usb_dcache_invalidate(qtd->bufaddr, USB_ALIGN_UP(qtd->length - ((qtd->hw.token & QTD_TOKEN_NBYTES_MASK) >> QTD_TOKEN_NBYTES_SHIFT), CONFIG_USB_ALIGN_SIZE)); - } qtd->urb->actual_length += (qtd->length - ((qtd->hw.token & QTD_TOKEN_NBYTES_MASK) >> QTD_TOKEN_NBYTES_SHIFT)); - qh->first_qtd = qtd->hw.next_qtd; - qtd = EHCI_ADDR2QTD(qh->first_qtd); + qtd = EHCI_ADDR2QTD(qtd->hw.next_qtd); } } @@ -643,7 +665,9 @@ static void ehci_check_qh(struct usbh_bus *bus, struct ehci_qh_hw *qhead, struct } while (qtd) { - usb_dcache_invalidate((uintptr_t)&qtd->hw, USB_ALIGN_UP(SIZEOF_EHCI_QTD, CONFIG_USB_EHCI_ALIGN_SIZE)); +#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE) + usb_dcache_invalidate((uintptr_t)&qtd->hw, CONFIG_USB_EHCI_ALIGN_SIZE); +#endif token = qtd->hw.token; if (token & QTD_TOKEN_STATUS_ERRORS) { @@ -689,18 +713,9 @@ static void ehci_check_qh(struct usbh_bus *bus, struct ehci_qh_hw *qhead, struct static void ehci_kill_qh(struct usbh_bus *bus, struct ehci_qh_hw *qhead, struct ehci_qh_hw *qh) { - struct ehci_qtd_hw *qtd; - (void)bus; ehci_qh_remove(qhead, qh); - - qtd = EHCI_ADDR2QTD(qh->first_qtd); - - while (qtd) { - qh->first_qtd = qtd->hw.next_qtd; - qtd = EHCI_ADDR2QTD(qh->first_qtd); - } } static int usbh_reset_port(struct usbh_bus *bus, const uint8_t port) @@ -751,12 +766,14 @@ __WEAK void usb_hc_low_level_deinit(struct usbh_bus *bus) int usb_hc_init(struct usbh_bus *bus) { struct ehci_qh_hw *qh; + struct ehci_qtd_hw *qtd; volatile uint32_t timeout = 0; uint32_t regval; memset(&g_ehci_hcd[bus->hcd.hcd_id], 0, sizeof(struct ehci_hcd)); memset(ehci_qh_pool[bus->hcd.hcd_id], 0, sizeof(struct ehci_qh_hw) * CONFIG_USB_EHCI_QH_NUM); + memset(ehci_qtd_pool[bus->hcd.hcd_id], 0, sizeof(struct ehci_qtd_hw) * CONFIG_USB_EHCI_QTD_NUM); for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) { qh = &ehci_qh_pool[bus->hcd.hcd_id][index]; @@ -764,11 +781,13 @@ int usb_hc_init(struct usbh_bus *bus) USB_LOG_ERR("struct ehci_qh_hw is not align 32\r\n"); return -USB_ERR_INVAL; } - for (uint8_t i = 0; i < CONFIG_USB_EHCI_QTD_NUM; i++) { - if ((uint32_t)&qh->qtd_pool[i] % 32) { - USB_LOG_ERR("struct ehci_qtd_hw is not align 32\r\n"); - return -USB_ERR_INVAL; - } + } + + for (uint8_t index = 0; index < CONFIG_USB_EHCI_QTD_NUM; index++) { + qtd = &ehci_qtd_pool[bus->hcd.hcd_id][index]; + if ((uint32_t)&qtd->hw % 32) { + USB_LOG_ERR("struct ehci_qtd_hw is not align 32\r\n"); + return -USB_ERR_INVAL; } } @@ -799,9 +818,11 @@ int usb_hc_init(struct usbh_bus *bus) g_framelist[bus->hcd.hcd_id][i] = QH_HLP_QH(&g_periodic_qh_head[bus->hcd.hcd_id]); } - usb_dcache_clean((uintptr_t)&g_async_qh_head[bus->hcd.hcd_id].hw, USB_ALIGN_UP(SIZEOF_EHCI_QH, CONFIG_USB_EHCI_ALIGN_SIZE)); - usb_dcache_clean((uintptr_t)&g_periodic_qh_head[bus->hcd.hcd_id].hw, USB_ALIGN_UP(SIZEOF_EHCI_QH, CONFIG_USB_EHCI_ALIGN_SIZE)); +#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE) + usb_dcache_clean((uintptr_t)&g_async_qh_head[bus->hcd.hcd_id].hw, CONFIG_USB_EHCI_ALIGN_SIZE); + usb_dcache_clean((uintptr_t)&g_periodic_qh_head[bus->hcd.hcd_id].hw, CONFIG_USB_EHCI_ALIGN_SIZE); usb_dcache_clean((uintptr_t)g_framelist[bus->hcd.hcd_id], sizeof(uint32_t) * CONFIG_USB_EHCI_FRAME_LIST_SIZE); +#endif usb_hc_low_level_init(bus); @@ -833,17 +854,18 @@ int usb_hc_init(struct usbh_bus *bus) } } - usb_hc_low_level2_init(bus); - EHCI_HCOR->usbintr = 0; EHCI_HCOR->usbsts = EHCI_HCOR->usbsts; + usb_hc_low_level2_init(bus); + /* Set the Current Asynchronous List Address. */ EHCI_HCOR->asynclistaddr = EHCI_PTR2ADDR(&g_async_qh_head[bus->hcd.hcd_id]); /* Set the Periodic Frame List Base Address. */ EHCI_HCOR->periodiclistbase = EHCI_PTR2ADDR(g_framelist[bus->hcd.hcd_id]); - regval = 0; + regval = EHCI_HCOR->usbcmd; + regval &= ~(EHCI_USBCMD_ITHRE_MASK | EHCI_USBCMD_FLSIZE_MASK); #if CONFIG_USB_EHCI_FRAME_LIST_SIZE == 1024 regval |= EHCI_USBCMD_FLSIZE_1024; #elif CONFIG_USB_EHCI_FRAME_LIST_SIZE == 512 @@ -854,7 +876,9 @@ int usb_hc_init(struct usbh_bus *bus) #error Unsupported frame size list size #endif +#if !defined(CONFIG_USB_EHCI_HPMICRO) || !CONFIG_USB_EHCI_HPMICRO regval |= EHCI_USBCMD_ITHRE_1MF; +#endif regval |= EHCI_USBCMD_ASEN; regval |= EHCI_USBCMD_PSEN; regval |= EHCI_USBCMD_RUN; @@ -1176,11 +1200,9 @@ int usbh_submit_urb(struct usbh_urb *urb) } #ifdef CONFIG_USB_DCACHE_ENABLE - if (((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) || ((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE)) { - USB_LOG_ERR("urb buffer is not align with %d\r\n", CONFIG_USB_ALIGN_SIZE); - while (1) { - } - } + USB_ASSERT_MSG(!((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) && + !((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE), + "urb->setup or urb->transfer_buffer is not aligned %d", CONFIG_USB_ALIGN_SIZE); #endif bus = urb->hport->bus; @@ -1405,14 +1427,7 @@ void USBH_IRQHandler(uint8_t busid) extern void USB_EhcihostPhyDisconnectDetectCmd(uint8_t controllerId, uint8_t enable); USB_EhcihostPhyDisconnectDetectCmd(2 + busid, 0); #endif - for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) { - g_ehci_hcd[bus->hcd.hcd_id].ehci_qh_used[index] = false; - } - for (uint8_t index = 0; index < CONFIG_USB_EHCI_ISO_NUM; index++) { - g_ehci_hcd[bus->hcd.hcd_id].ehci_iso_used[index] = false; - } } - bus->hcd.roothub.int_buffer[0] |= (1 << (port + 1)); usbh_hub_thread_wakeup(&bus->hcd.roothub); } @@ -1422,7 +1437,7 @@ void USBH_IRQHandler(uint8_t busid) if (usbsts & EHCI_USBSTS_IAA) { for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) { struct ehci_qh_hw *qh = &ehci_qh_pool[bus->hcd.hcd_id][index]; - if (g_ehci_hcd[bus->hcd.hcd_id].ehci_qh_used[index] && qh->remove_in_iaad) { + if (qh->remove_in_iaad) { ehci_urb_waitup(bus, qh->urb); } } @@ -1430,4 +1445,4 @@ void USBH_IRQHandler(uint8_t busid) if (usbsts & EHCI_USBSTS_FATAL) { } -} +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.h b/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.h index 8d08cfa19ae..80ab8b6eb33 100644 --- a/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.h +++ b/components/drivers/usb/cherryusb/port/ehci/usb_hc_ehci.h @@ -19,34 +19,47 @@ #define EHCI_ADDR2ITD(x) ((struct ehci_itd_hw *)(uintptr_t)((uint32_t)(x) & ~0x1F)) #ifndef CONFIG_USB_EHCI_QH_NUM -#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM #endif #ifndef CONFIG_USB_EHCI_QTD_NUM -#define CONFIG_USB_EHCI_QTD_NUM 3 +#define CONFIG_USB_EHCI_QTD_NUM (CONFIG_USB_EHCI_QH_NUM * 3) #endif #ifndef CONFIG_USB_EHCI_ITD_NUM -#define CONFIG_USB_EHCI_ITD_NUM 5 +#define CONFIG_USB_EHCI_ITD_NUM 5 #endif #ifndef CONFIG_USB_EHCI_ISO_NUM -#define CONFIG_USB_EHCI_ISO_NUM 4 +#define CONFIG_USB_EHCI_ISO_NUM 4 #endif -#ifndef CONFIG_USB_EHCI_ALIGN_SIZE -#define CONFIG_USB_EHCI_ALIGN_SIZE 64 + +#if CONFIG_USB_ALIGN_SIZE <= 32 +#define CONFIG_USB_EHCI_ALIGN_SIZE 32 +#elif CONFIG_USB_ALIGN_SIZE <= 64 +#define CONFIG_USB_EHCI_ALIGN_SIZE 64 +#else +#error "CONFIG_USB_ALIGN_SIZE must be 32 or 64" #endif -extern uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port); +#if CONFIG_USB_EHCI_QTD_NUM < 9 +#error CONFIG_USB_EHCI_QTD_NUM is too small, recommand CONFIG_USB_EHCI_QH_NUM * 3 +#endif struct ehci_qtd_hw { struct ehci_qtd hw; +#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 64) + uint8_t pad[32]; +#endif + bool inuse; struct usbh_urb *urb; - bool dir_in; uintptr_t bufaddr; uint32_t length; } __attribute__((aligned(CONFIG_USB_EHCI_ALIGN_SIZE))); struct ehci_qh_hw { struct ehci_qh hw; - struct ehci_qtd_hw qtd_pool[CONFIG_USB_EHCI_QTD_NUM]; +#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE) + uint16_t pad[16]; +#endif + bool inuse; uint32_t first_qtd; struct usbh_urb *urb; usb_osal_sem_t waitsem; @@ -63,16 +76,14 @@ struct ehci_itd_hw { bool dir_in; } __attribute__((aligned(CONFIG_USB_EHCI_ALIGN_SIZE))); -struct ehci_iso_hw -{ +struct ehci_iso_hw { struct ehci_itd_hw itd_pool[CONFIG_USB_EHCI_ITD_NUM]; uint32_t itd_num; }; struct ehci_hcd { - bool ehci_qh_used[CONFIG_USB_EHCI_QH_NUM]; bool ehci_iso_used[CONFIG_USB_EHCI_ISO_NUM]; - bool ppc; /* Port Power Control */ + bool ppc; /* Port Power Control */ bool has_tt; /* if use tt instead of Companion Controller */ uint8_t n_cc; /* Number of Companion Controller */ uint8_t n_pcc; /* Number of ports supported per companion host controller */ @@ -82,6 +93,7 @@ struct ehci_hcd { extern struct ehci_hcd g_ehci_hcd[CONFIG_USBHOST_MAX_BUS]; extern uint32_t g_framelist[CONFIG_USBHOST_MAX_BUS][USB_ALIGN_UP(CONFIG_USB_EHCI_FRAME_LIST_SIZE, 1024)]; +extern uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port); int ehci_iso_urb_init(struct usbh_bus *bus, struct usbh_urb *urb); void ehci_kill_iso_urb(struct usbh_bus *bus, struct usbh_urb *urb); diff --git a/components/drivers/usb/cherryusb/port/fsdev/usb_dc_fsdev.c b/components/drivers/usb/cherryusb/port/fsdev/usb_dc_fsdev.c index f27e8c6993f..c6ffd5aac1f 100644 --- a/components/drivers/usb/cherryusb/port/fsdev/usb_dc_fsdev.c +++ b/components/drivers/usb/cherryusb/port/fsdev/usb_dc_fsdev.c @@ -79,8 +79,11 @@ int usb_dc_init(uint8_t busid) /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM | - USB_CNTR_SOFM | USB_CNTR_ESOFM | - USB_CNTR_RESETM; + USB_CNTR_ESOFM | USB_CNTR_RESETM; + +#ifdef CONFIG_USBDEV_SOF_ENABLE + winterruptmask |= USB_CNTR_SOFM; +#endif /* Set interrupt mask */ USB->CNTR = (uint16_t)winterruptmask; @@ -131,10 +134,8 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) { uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress); - if (ep_idx > (CONFIG_USBDEV_EP_NUM - 1)) { - USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } + USB_ASSERT_MSG(ep_idx < CONFIG_USBDEV_EP_NUM, "Ep addr %02x overflow", ep->bEndpointAddress); + USB_ASSERT_MSG(USB_GET_ENDPOINT_TYPE(ep->bmAttributes) != USB_ENDPOINT_TYPE_ISOCHRONOUS, "iso endpoint not support in fsdev"); uint16_t wEpRegVal; @@ -154,11 +155,10 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) case USB_ENDPOINT_TYPE_ISOCHRONOUS: wEpRegVal = USB_EP_ISOCHRONOUS; - USB_LOG_ERR("Do not support iso in fsdev\r\n"); - return -1; + break; default: - break; + return -1; } PCD_SET_EPTYPE(USB, ep_idx, wEpRegVal); @@ -169,10 +169,9 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) g_fsdev_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); g_fsdev_udc.out_ep[ep_idx].ep_enable = true; if (g_fsdev_udc.out_ep[ep_idx].ep_mps > g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len) { - if (g_fsdev_udc.pma_offset + g_fsdev_udc.out_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) { - USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } + USB_ASSERT_MSG((g_fsdev_udc.pma_offset + g_fsdev_udc.out_ep[ep_idx].ep_mps) <= CONFIG_USB_FSDEV_RAM_SIZE, + "Ep pma %02x overflow", ep->bEndpointAddress); + g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); g_fsdev_udc.out_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset; /*Set the endpoint Receive buffer address */ @@ -187,10 +186,9 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) g_fsdev_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); g_fsdev_udc.in_ep[ep_idx].ep_enable = true; if (g_fsdev_udc.in_ep[ep_idx].ep_mps > g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len) { - if (g_fsdev_udc.pma_offset + g_fsdev_udc.in_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) { - USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } + USB_ASSERT_MSG((g_fsdev_udc.pma_offset + g_fsdev_udc.in_ep[ep_idx].ep_mps) <= CONFIG_USB_FSDEV_RAM_SIZE, + "Ep pma %02x overflow", ep->bEndpointAddress); + g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); g_fsdev_udc.in_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset; /*Set the endpoint Transmit buffer address */ @@ -487,9 +485,12 @@ void USBD_IRQHandler(uint8_t busid) USB->CNTR |= (uint16_t)USB_CNTR_LP_MODE; } +#ifdef CONFIG_USBDEV_SOF_ENABLE if (wIstr & USB_ISTR_SOF) { USB->ISTR &= (uint16_t)(~USB_ISTR_SOF); + usbd_event_sof_handler(0); } +#endif if (wIstr & USB_ISTR_ESOF) { USB->ISTR &= (uint16_t)(~USB_ISTR_ESOF); } diff --git a/components/drivers/usb/cherryusb/port/fsdev/usb_glue_st.c b/components/drivers/usb/cherryusb/port/fsdev/usb_glue_st.c new file mode 100644 index 00000000000..70a98acb7a1 --- /dev/null +++ b/components/drivers/usb/cherryusb/port/fsdev/usb_glue_st.c @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2025, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "usbd_core.h" + +#if __has_include("stm32f0xx_hal.h") +#include "stm32f0xx_hal.h" +#elif __has_include("stm32f1xx_hal.h") +#include "stm32f1xx_hal.h" +#elif __has_include("stm32f3xx_hal.h") +#include "stm32f3xx_hal.h" +#elif __has_include("stm32g0xx_hal.h") +#include "stm32g0xx_hal.h" +#elif __has_include("stm32g4xx_hal.h") +#include "stm32g4xx_hal.h" +#elif __has_include("stm32l0xx_hal.h") +#include "stm32l0xx_hal.h" +#elif __has_include("stm32l1xx_hal.h") +#include "stm32l1xx_hal.h" +#elif __has_include("stm32l4xx_hal.h") +#include "stm32l4xx_hal.h" +#elif __has_include("stm32l5xx_hal.h") +#include "stm32l5xx_hal.h" +#endif + +#if !defined(HAL_PCD_MODULE_ENABLED) +#error please define HAL_PCD_MODULE_ENABLED in stm32xxx_hal_conf.h +#endif + +#ifndef CONFIG_USBDEV_FSDEV_PMA_ACCESS +#error "please define CONFIG_USBDEV_FSDEV_PMA_ACCESS in usb_config.h" +#endif + +#if CONFIG_USBDEV_FSDEV_PMA_ACCESS != PMA_ACCESS +#error "CONFIG_USBDEV_FSDEV_PMA_ACCESS must be equal PMA_ACCESS" +#endif + +struct fsdev_instance { + USB_TypeDef *Instance; +}; + +static struct fsdev_instance g_fsdev_instance; + +void usb_dc_low_level_init(uint8_t busid) +{ + g_fsdev_instance.Instance = (USB_TypeDef *)g_usbdev_bus[busid].reg_base; + HAL_PCD_MspInit((PCD_HandleTypeDef *)&g_fsdev_instance); +} + +void usb_dc_low_level_deinit(uint8_t busid) +{ + g_fsdev_instance.Instance = (USB_TypeDef *)g_usbdev_bus[busid].reg_base; + HAL_PCD_MspDeInit((PCD_HandleTypeDef *)&g_fsdev_instance); +} + +void USB_IRQHandler(void) +{ + USBD_IRQHandler(0); +} + +void USB_LP_IRQHandler(void) +{ + USBD_IRQHandler(0); +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/hpmicro/README.md b/components/drivers/usb/cherryusb/port/hpmicro/README.md new file mode 100644 index 00000000000..558074dda59 --- /dev/null +++ b/components/drivers/usb/cherryusb/port/hpmicro/README.md @@ -0,0 +1,5 @@ +# Note + +## Support Chip List + +- HPM all series (HPMicro + EHCI) diff --git a/components/drivers/usb/cherryusb/port/hpm/usb_dc_hpm.c b/components/drivers/usb/cherryusb/port/hpmicro/usb_dc_hpm.c similarity index 82% rename from components/drivers/usb/cherryusb/port/hpm/usb_dc_hpm.c rename to components/drivers/usb/cherryusb/port/hpmicro/usb_dc_hpm.c index b663fd9afc5..6432e2e2117 100644 --- a/components/drivers/usb/cherryusb/port/hpm/usb_dc_hpm.c +++ b/components/drivers/usb/cherryusb/port/hpmicro/usb_dc_hpm.c @@ -1,11 +1,12 @@ /* - * Copyright (c) 2022-2024 HPMicro + * Copyright (c) 2022-2025 HPMicro * * SPDX-License-Identifier: BSD-3-Clause * */ #include "usbd_core.h" #include "hpm_usb_device.h" +#include "usb_glue_hpm.h" #ifndef USB_NUM_BIDIR_ENDPOINTS #define USB_NUM_BIDIR_ENDPOINTS CONFIG_USBDEV_EP_NUM @@ -13,13 +14,13 @@ /* USBSTS, USBINTR */ enum { - intr_usb = HPM_BITSMASK(1, 0), - intr_error = HPM_BITSMASK(1, 1), - intr_port_change = HPM_BITSMASK(1, 2), - intr_reset = HPM_BITSMASK(1, 6), - intr_sof = HPM_BITSMASK(1, 7), - intr_suspend = HPM_BITSMASK(1, 8), - intr_nak = HPM_BITSMASK(1, 16) + intr_usb = USB_USBINTR_UE_MASK, + intr_error = USB_USBINTR_UEE_MASK, + intr_port_change = USB_USBINTR_PCE_MASK, + intr_reset = USB_USBINTR_URE_MASK, + intr_sof = USB_USBINTR_SRE_MASK, + intr_suspend = USB_USBINTR_SLE_MASK, + intr_nak = USB_USBINTR_NAKE_MASK, }; /* Endpoint state */ @@ -44,13 +45,9 @@ struct hpm_udc { struct hpm_ep_state out_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< OUT endpoint parameters */ } g_hpm_udc[CONFIG_USBDEV_MAX_BUS]; -static ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT(USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT) dcd_data_t _dcd_data0; -#ifdef HPM_USB1_BASE -static ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT(USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT) dcd_data_t _dcd_data1; -#endif -static ATTR_PLACE_AT_NONCACHEABLE usb_device_handle_t usb_device_handle[CONFIG_USBDEV_MAX_BUS]; -static uint32_t _dcd_irqnum[CONFIG_USBDEV_MAX_BUS]; -static uint8_t _dcd_busid[CONFIG_USBDEV_MAX_BUS]; +static USB_NOCACHE_RAM_SECTION ATTR_ALIGN(USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT) + uint8_t _dcd_data[CONFIG_USBDEV_MAX_BUS][HPM_ALIGN_UP(sizeof(dcd_data_t), USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT)]; +static USB_NOCACHE_RAM_SECTION usb_device_handle_t usb_device_handle[CONFIG_USBDEV_MAX_BUS]; /* Index to bit position in register */ static inline uint8_t ep_idx2bit(uint8_t ep_idx) @@ -58,52 +55,64 @@ static inline uint8_t ep_idx2bit(uint8_t ep_idx) return ep_idx / 2 + ((ep_idx % 2) ? 16 : 0); } -void usbd_execute_test_mode(uint8_t busid, uint8_t test_mode) +static void usb_dc_isr_connect(uint8_t busid) { - usb_set_port_test_mode(g_hpm_udc[busid].handle->regs, test_mode); -} - -int usb_dc_init(uint8_t busid) -{ - memset(&g_hpm_udc[busid], 0, sizeof(struct hpm_udc)); - g_hpm_udc[busid].handle = &usb_device_handle[busid]; - g_hpm_udc[busid].handle->regs = (USB_Type *)g_usbdev_bus[busid].reg_base; - if (g_usbdev_bus[busid].reg_base == HPM_USB0_BASE) { - _dcd_irqnum[busid] = IRQn_USB0; - _dcd_busid[0] = busid; + g_usb_hpm_busid[0] = busid; + g_usb_hpm_irq[0] = USBD_IRQHandler; + + hpm_usb_isr_enable(HPM_USB0_BASE); } else { #ifdef HPM_USB1_BASE - if (g_usbdev_bus[busid].reg_base == HPM_USB1_BASE) { - _dcd_irqnum[busid] = IRQn_USB1; - _dcd_busid[1] = busid; - } + g_usb_hpm_busid[1] = busid; + g_usb_hpm_irq[1] = USBD_IRQHandler; + + hpm_usb_isr_enable(HPM_USB1_BASE); #endif } +} - if (busid == 0) { - g_hpm_udc[busid].handle->dcd_data = &_dcd_data0; - } else if (busid == 1) { +static void usb_dc_isr_disconnect(uint8_t busid) +{ + if (g_usbdev_bus[busid].reg_base == HPM_USB0_BASE) { + hpm_usb_isr_disable(HPM_USB0_BASE); + + g_usb_hpm_busid[0] = 0; + g_usb_hpm_irq[0] = NULL; + } else { #ifdef HPM_USB1_BASE - g_hpm_udc[busid].handle->dcd_data = &_dcd_data1; + hpm_usb_isr_disable(HPM_USB1_BASE); + + g_usb_hpm_busid[1] = 0; + g_usb_hpm_irq[1] = NULL; #endif - } else { - ; } +} + +int usb_dc_init(uint8_t busid) +{ + memset(&g_hpm_udc[busid], 0, sizeof(struct hpm_udc)); + g_hpm_udc[busid].handle = &usb_device_handle[busid]; + g_hpm_udc[busid].handle->regs = (USB_Type *)g_usbdev_bus[busid].reg_base; + g_hpm_udc[busid].handle->dcd_data = (dcd_data_t *)&_dcd_data[busid][0]; uint32_t int_mask; - int_mask = (USB_USBINTR_UE_MASK | USB_USBINTR_UEE_MASK | USB_USBINTR_SLE_MASK | - USB_USBINTR_PCE_MASK | USB_USBINTR_URE_MASK); + int_mask = (intr_usb | intr_error |intr_port_change | intr_reset | intr_suspend); + +#ifdef CONFIG_USBDEV_SOF_ENABLE + int_mask |= intr_sof; +#endif usb_device_init(g_hpm_udc[busid].handle, int_mask); - intc_m_enable_irq(_dcd_irqnum[busid]); + usb_dc_isr_connect(busid); + return 0; } int usb_dc_deinit(uint8_t busid) { - intc_m_disable_irq(_dcd_irqnum[busid]); + usb_dc_isr_disconnect(busid); usb_device_deinit(g_hpm_udc[busid].handle); @@ -132,6 +141,11 @@ int usbd_set_remote_wakeup(uint8_t busid) return 0; } +void usbd_execute_test_mode(uint8_t busid, uint8_t test_mode) +{ + usb_set_port_test_mode(g_hpm_udc[busid].handle->regs, test_mode); +} + uint8_t usbd_get_port_speed(uint8_t busid) { uint8_t speed; @@ -274,6 +288,12 @@ void USBD_IRQHandler(uint8_t busid) USB_LOG_ERR("usbd intr error!\r\n"); } +#ifdef CONFIG_USBDEV_SOF_ENABLE + if (int_status & intr_sof) { + usbd_event_sof_handler(busid); + } +#endif + if (int_status & intr_reset) { g_hpm_udc[busid].is_suspend = false; memset(g_hpm_udc[busid].in_ep, 0, sizeof(struct hpm_ep_state) * USB_NUM_BIDIR_ENDPOINTS); @@ -307,24 +327,18 @@ void USBD_IRQHandler(uint8_t busid) if (int_status & intr_usb) { uint32_t const edpt_complete = usb_device_get_edpt_complete_status(handle); - usb_device_clear_edpt_complete_status(handle, edpt_complete); - uint32_t edpt_setup_status = usb_device_get_setup_status(handle); - - if (edpt_setup_status) { - /*------------- Set up Received -------------*/ - usb_device_clear_setup_status(handle, edpt_setup_status); - dcd_qhd_t *qhd0 = usb_device_qhd_get(handle, 0); - usbd_event_ep0_setup_complete_handler(busid, (uint8_t *)&qhd0->setup_request); - } + uint32_t const edpt_setup_status = usb_device_get_setup_status(handle); if (edpt_complete) { + usb_device_clear_edpt_complete_status(handle, edpt_complete); for (uint8_t ep_idx = 0; ep_idx < USB_SOS_DCD_MAX_QHD_COUNT; ep_idx++) { if (edpt_complete & (1 << ep_idx2bit(ep_idx))) { transfer_len = 0; ep_cb_req = true; /* Failed QTD also get ENDPTCOMPLETE set */ - dcd_qtd_t *p_qtd = usb_device_qtd_get(handle, ep_idx); + dcd_qhd_t *p_qhd = usb_device_qhd_get(handle, ep_idx); + dcd_qtd_t *p_qtd = p_qhd->attached_qtd; while (1) { if (p_qtd->halted || p_qtd->xact_err || p_qtd->buffer_err) { USB_LOG_ERR("usbd transfer error!\r\n"); @@ -335,6 +349,7 @@ void USBD_IRQHandler(uint8_t busid) break; } else { transfer_len += p_qtd->expected_bytes - p_qtd->total_bytes; + p_qtd->in_use = false; } if (p_qtd->next == USB_SOC_DCD_QTD_NEXT_INVALID) { @@ -355,23 +370,12 @@ void USBD_IRQHandler(uint8_t busid) } } } - } -} - -#if !defined(USBD_USE_CUSTOM_ISR) || !USBD_USE_CUSTOM_ISR -SDK_DECLARE_EXT_ISR_M(IRQn_USB0, isr_usbd0) -void isr_usbd0(void) -{ - USBD_IRQHandler(_dcd_busid[0]); -} - -#ifdef HPM_USB1_BASE -SDK_DECLARE_EXT_ISR_M(IRQn_USB1, isr_usbd1) -void isr_usbd1(void) -{ - USBD_IRQHandler(_dcd_busid[1]); -} -#endif - -#endif + if (edpt_setup_status) { + /*------------- Set up Received -------------*/ + usb_device_clear_setup_status(handle, edpt_setup_status); + dcd_qhd_t *qhd0 = usb_device_qhd_get(handle, 0); + usbd_event_ep0_setup_complete_handler(busid, (uint8_t *)&qhd0->setup_request); + } + } +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/hpmicro/usb_glue_hpm.c b/components/drivers/usb/cherryusb/port/hpmicro/usb_glue_hpm.c new file mode 100644 index 00000000000..51aa9aa452e --- /dev/null +++ b/components/drivers/usb/cherryusb/port/hpmicro/usb_glue_hpm.c @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2022-2025 HPMicro + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ +#include "hpm_common.h" +#include "hpm_soc.h" +#include "hpm_l1c_drv.h" +#include "usb_config.h" + +void (*g_usb_hpm_irq[2])(uint8_t busid); +uint8_t g_usb_hpm_busid[2]; + +ATTR_WEAK void hpm_usb_isr_enable(uint32_t base) +{ + if (base == HPM_USB0_BASE) { + intc_m_enable_irq(IRQn_USB0); + } else { +#ifdef HPM_USB1_BASE + intc_m_enable_irq(IRQn_USB1); +#endif + } +} + +ATTR_WEAK void hpm_usb_isr_disable(uint32_t base) +{ + if (base == HPM_USB0_BASE) { + intc_m_disable_irq(IRQn_USB0); + } else { +#ifdef HPM_USB1_BASE + intc_m_disable_irq(IRQn_USB1); +#endif + } +} + +#ifndef CONFIG_CHERRYUSB_CUSTOM_IRQ_HANDLER +SDK_DECLARE_EXT_ISR_M(IRQn_USB0, hpm_isr_usb0) +#endif +void hpm_isr_usb0(void) +{ + g_usb_hpm_irq[0](g_usb_hpm_busid[0]); +} + +#ifdef HPM_USB1_BASE +#ifndef CONFIG_CHERRYUSB_CUSTOM_IRQ_HANDLER +SDK_DECLARE_EXT_ISR_M(IRQn_USB1, hpm_isr_usb1) +#endif +void hpm_isr_usb1(void) +{ + g_usb_hpm_irq[1](g_usb_hpm_busid[1]); +} +#endif + +#ifdef CONFIG_USB_DCACHE_ENABLE +void usb_dcache_clean(uintptr_t addr, size_t size) +{ + l1c_dc_writeback(addr, size); +} + +void usb_dcache_invalidate(uintptr_t addr, size_t size) +{ + l1c_dc_invalidate(addr, size); +} + +void usb_dcache_flush(uintptr_t addr, size_t size) +{ + l1c_dc_flush(addr, size); +} +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/hpmicro/usb_glue_hpm.h b/components/drivers/usb/cherryusb/port/hpmicro/usb_glue_hpm.h new file mode 100644 index 00000000000..dea2dd0b401 --- /dev/null +++ b/components/drivers/usb/cherryusb/port/hpmicro/usb_glue_hpm.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2022-2025 HPMicro + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#ifndef _HPM_USB_GLUE_HPM_H_ +#define _HPM_USB_GLUE_HPM_H_ + +extern void (*g_usb_hpm_irq[2])(uint8_t busid); +extern uint8_t g_usb_hpm_busid[2]; + +void hpm_usb_isr_enable(uint32_t base); +void hpm_usb_isr_disable(uint32_t base); +void hpm_isr_usb0(void); +void hpm_isr_usb1(void); + +#endif /* _HPM_USB_GLUE_HPM_H_ */ \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/ehci/usb_glue_hpm.c b/components/drivers/usb/cherryusb/port/hpmicro/usb_hc_hpm.c similarity index 69% rename from components/drivers/usb/cherryusb/port/ehci/usb_glue_hpm.c rename to components/drivers/usb/cherryusb/port/hpmicro/usb_hc_hpm.c index 40105a94984..9ee515008b6 100644 --- a/components/drivers/usb/cherryusb/port/ehci/usb_glue_hpm.c +++ b/components/drivers/usb/cherryusb/port/hpmicro/usb_hc_hpm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2024 HPMicro + * Copyright (c) 2022-2025 HPMicro * * SPDX-License-Identifier: BSD-3-Clause * @@ -8,6 +8,7 @@ #include "hpm_common.h" #include "hpm_soc.h" #include "hpm_usb_drv.h" +#include "usb_glue_hpm.h" #if !defined(CONFIG_USB_EHCI_HPMICRO) || !CONFIG_USB_EHCI_HPMICRO #error "hpm ehci must set CONFIG_USB_EHCI_HPMICRO=1" @@ -17,8 +18,8 @@ #error "hpm ehci must config CONFIG_USB_EHCI_HCCR_OFFSET to 0x100" #endif -static uint32_t _hcd_irqnum[CONFIG_USBHOST_MAX_BUS]; -static uint8_t _hcd_busid[CONFIG_USBHOST_MAX_BUS]; +extern void (*g_usb_hpm_irq[2])(uint8_t busid); +extern uint8_t g_usb_hpm_busid[2]; static void usb_host_mode_init(USB_Type *ptr) { @@ -46,25 +47,45 @@ static void usb_host_mode_init(USB_Type *ptr) void usb_hc_low_level_init(struct usbh_bus *bus) { + usb_phy_init((USB_Type *)(bus->hcd.reg_base), true); +} + +void usb_hc_low_level2_init(struct usbh_bus *bus) +{ + usb_host_mode_init((USB_Type *)(bus->hcd.reg_base)); + if (bus->hcd.reg_base == HPM_USB0_BASE) { - _hcd_irqnum[bus->hcd.hcd_id] = IRQn_USB0; - _hcd_busid[0] = bus->hcd.hcd_id; + g_usb_hpm_busid[0] = bus->hcd.hcd_id; + g_usb_hpm_irq[0] = USBH_IRQHandler; + + hpm_usb_isr_enable(HPM_USB0_BASE); } else { #ifdef HPM_USB1_BASE - if (bus->hcd.reg_base == HPM_USB1_BASE) { - _hcd_irqnum[bus->hcd.hcd_id] = IRQn_USB1; - _hcd_busid[1] = bus->hcd.hcd_id; - } + g_usb_hpm_busid[1] = bus->hcd.hcd_id; + g_usb_hpm_irq[1] = USBH_IRQHandler; + + hpm_usb_isr_enable(HPM_USB1_BASE); #endif } - - usb_phy_init((USB_Type *)(bus->hcd.reg_base), true); - intc_m_enable_irq(_hcd_irqnum[bus->hcd.hcd_id]); } -void usb_hc_low_level2_init(struct usbh_bus *bus) +void usb_hc_low_level_deinit(struct usbh_bus *bus) { - usb_host_mode_init((USB_Type *)(bus->hcd.reg_base)); + usb_phy_deinit((USB_Type *)(bus->hcd.reg_base)); + + if (bus->hcd.reg_base == HPM_USB0_BASE) { + hpm_usb_isr_disable(HPM_USB0_BASE); + + g_usb_hpm_busid[0] = 0; + g_usb_hpm_irq[0] = NULL; + } else { +#ifdef HPM_USB1_BASE + hpm_usb_isr_disable(HPM_USB1_BASE); + + g_usb_hpm_busid[1] = 0; + g_usb_hpm_irq[1] = NULL; +#endif + } } uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port) @@ -85,24 +106,4 @@ uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port) } return 0; -} - -#if !defined(USBH_USE_CUSTOM_ISR) || !USBH_USE_CUSTOM_ISR - -extern void USBH_IRQHandler(uint8_t busid); - -SDK_DECLARE_EXT_ISR_M(IRQn_USB0, isr_usbh0) -void isr_usbh0(void) -{ - USBH_IRQHandler(_hcd_busid[0]); -} - -#ifdef HPM_USB1_BASE -SDK_DECLARE_EXT_ISR_M(IRQn_USB1, isr_usbh1) -void isr_usbh1(void) -{ - USBH_IRQHandler(_hcd_busid[1]); -} -#endif - -#endif +} \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/kinetis/usb_dc_kinetis.c b/components/drivers/usb/cherryusb/port/kinetis/usb_dc_kinetis.c index bd2b2876670..341095302bc 100644 --- a/components/drivers/usb/cherryusb/port/kinetis/usb_dc_kinetis.c +++ b/components/drivers/usb/cherryusb/port/kinetis/usb_dc_kinetis.c @@ -102,12 +102,25 @@ int usb_dc_init(uint8_t busid) USB_INTEN_SLEEPEN_MASK | USB_INTEN_RESUMEEN_MASK | USB_INTEN_ERROREN_MASK; +#ifdef CONFIG_USBDEV_SOF_ENABLE + USB_OTG_DEV->INTEN |= USB_INTEN_SOFTOKEN_MASK; +#endif + USB_OTG_DEV->CTL |= USB_CTL_USBENSOFEN_MASK; return 0; } int usb_dc_deinit(uint8_t busid) { + USB_OTG_DEV->INTEN = 0; + USB_OTG_DEV->CTL &= ~USB_CTL_USBENSOFEN_MASK; + + memset(&g_kinetis_udc[busid], 0, sizeof(g_kinetis_udc[busid])); + + USB_OTG_DEV->BDTPAGE1 = (uint8_t)((uintptr_t)&g_kinetis_bdt[busid] >> 8); + USB_OTG_DEV->BDTPAGE2 = (uint8_t)((uintptr_t)&g_kinetis_bdt[busid] >> 16); + USB_OTG_DEV->BDTPAGE3 = (uint8_t)((uintptr_t)&g_kinetis_bdt[busid] >> 24); + usb_dc_low_level_deinit(busid); return 0; } @@ -147,9 +160,7 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) uint8_t regval; /* Must not exceed max endpoint number */ - if (ep_idx >= CONFIG_USBDEV_EP_NUM) { - return -1; - } + USB_ASSERT_MSG(ep_idx < CONFIG_USBDEV_EP_NUM, "Ep addr %02x overflow", ep->bEndpointAddress); if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { g_kinetis_udc[busid].out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); @@ -373,11 +384,12 @@ void USBD_IRQHandler(uint8_t busid) if (is & USB_ISTAT_RESUME_MASK) { USB_OTG_DEV->ISTAT = USB_ISTAT_RESUME_MASK; } - +#ifdef CONFIG_USBDEV_SOF_ENABLE if (is & USB_ISTAT_SOFTOK_MASK) { USB_OTG_DEV->ISTAT = USB_ISTAT_SOFTOK_MASK; + usbd_event_sof_handler(busid); } - +#endif if (is & USB_ISTAT_STALL_MASK) { USB_OTG_DEV->ISTAT = USB_ISTAT_STALL_MASK; } @@ -421,7 +433,7 @@ void USBD_IRQHandler(uint8_t busid) usbd_event_ep_in_complete_handler(busid, ep_idx | 0x80, g_kinetis_udc[busid].in_ep[ep_idx].actual_xfer_len); } else { kinetis_start_transfer(busid, ep_idx | 0x80, g_kinetis_udc[busid].in_ep[ep_idx].xfer_buf, - MIN(g_kinetis_udc[busid].in_ep[ep_idx].xfer_len, g_kinetis_udc[busid].in_ep[ep_idx].ep_mps)); + MIN(g_kinetis_udc[busid].in_ep[ep_idx].xfer_len, g_kinetis_udc[busid].in_ep[ep_idx].ep_mps)); } } else { g_kinetis_udc[busid].out_ep[ep_idx].xfer_buf += bc; @@ -432,7 +444,7 @@ void USBD_IRQHandler(uint8_t busid) usbd_event_ep_out_complete_handler(busid, ep_idx, g_kinetis_udc[busid].out_ep[ep_idx].actual_xfer_len); } else { kinetis_start_transfer(busid, ep_idx, g_kinetis_udc[busid].out_ep[ep_idx].xfer_buf, - MIN(g_kinetis_udc[busid].out_ep[ep_idx].xfer_len, g_kinetis_udc[busid].out_ep[ep_idx].ep_mps)); + MIN(g_kinetis_udc[busid].out_ep[ep_idx].xfer_len, g_kinetis_udc[busid].out_ep[ep_idx].ep_mps)); } } diff --git a/components/drivers/usb/cherryusb/port/kinetis/usb_glue_mm32.c b/components/drivers/usb/cherryusb/port/kinetis/usb_glue_mm32.c new file mode 100644 index 00000000000..75e722c495d --- /dev/null +++ b/components/drivers/usb/cherryusb/port/kinetis/usb_glue_mm32.c @@ -0,0 +1,36 @@ +#include +#include + +#include "mm32_device.h" +#include "hal_rcc.h" +#include "usbd_core.h" + +void usb_dc_low_level_init(uint8_t busid) +{ + /* Select USBCLK source */ + // RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1); + RCC->CFGR &= ~(0x3 << 22); + RCC->CFGR |= (0x1 << 22); + + /* Enable USB clock */ + RCC->AHB2ENR |= 0x1 << 7; + +#define USB_DEVICE_INTERRUPT_PRIORITY (7U) + NVIC_SetPriority((IRQn_Type)USB_OTGFS_IRQn, USB_DEVICE_INTERRUPT_PRIORITY); + NVIC_EnableIRQ(USB_OTGFS_IRQn); +} + +void usb_dc_low_level_deinit(uint8_t busid) +{ + RCC->AHB2ENR &= ~(0x1 << 7); +} + +void USB_OTGFS_IRQHandler(void) +{ + USBD_IRQHandler(0); +} + +void usbd_kinetis_delay_ms(uint8_t ms) +{ + //delay_ms(ms); +} diff --git a/components/drivers/usb/cherryusb/port/musb/usb_dc_musb.c b/components/drivers/usb/cherryusb/port/musb/usb_dc_musb.c index 845e583b59e..74234667a64 100644 --- a/components/drivers/usb/cherryusb/port/musb/usb_dc_musb.c +++ b/components/drivers/usb/cherryusb/port/musb/usb_dc_musb.c @@ -266,17 +266,17 @@ int usb_dc_init(uint8_t busid) offset = usbd_musb_fifo_config(&cfg[i], offset); } - if (offset > usb_get_musb_ram_size()) { - USB_LOG_ERR("offset:%d is overflow, please check your table\r\n", offset); - while (1) { - } - } + USB_ASSERT_MSG(offset <= usb_get_musb_ram_size(), "Your fifo config is overflow, please check"); /* Enable USB interrupts */ HWREGB(USB_BASE + MUSB_IE_OFFSET) = USB_IE_RESET | USB_IE_SUSPND | USB_IE_RESUME; HWREGH(USB_BASE + MUSB_TXIE_OFFSET) = USB_TXIE_EP0; HWREGH(USB_BASE + MUSB_RXIE_OFFSET) = 0; +#ifdef CONFIG_USBDEV_SOF_ENABLE + HWREGB(USB_BASE + MUSB_IE_OFFSET) |= USB_IE_SOF; +#endif + HWREGB(USB_BASE + MUSB_POWER_OFFSET) |= USB_POWER_SOFTCONN; return 0; } @@ -335,10 +335,7 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) return 0; } - if (ep_idx > (CONFIG_USBDEV_EP_NUM - 1)) { - USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } + USB_ASSERT_MSG(ep_idx < CONFIG_USBDEV_EP_NUM, "Ep addr %02x overflow", ep->bEndpointAddress); old_ep_idx = musb_get_active_ep(); musb_set_active_ep(ep_idx); @@ -348,10 +345,8 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) g_musb_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); g_musb_udc.out_ep[ep_idx].ep_enable = true; - if ((8 << HWREGB(USB_BASE + MUSB_RXFIFOSZ_OFFSET)) < g_musb_udc.out_ep[ep_idx].ep_mps) { - USB_LOG_ERR("Ep %02x fifo is overflow\r\n", ep->bEndpointAddress); - return -2; - } + USB_ASSERT_MSG((8 << HWREGB(USB_BASE + MUSB_RXFIFOSZ_OFFSET)) >= g_musb_udc.out_ep[ep_idx].ep_mps, + "Ep %02x fifo is overflow", ep->bEndpointAddress); HWREGH(USB_BASE + MUSB_IND_RXMAP_OFFSET) = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); @@ -392,15 +387,15 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) HWREGB(USB_BASE + MUSB_IND_RXCSRL_OFFSET) = (USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH); else HWREGB(USB_BASE + MUSB_IND_RXCSRL_OFFSET) = USB_RXCSRL1_CLRDT; + + HWREGB(USB_BASE + MUSB_IND_TXCSRH_OFFSET) &= ~USB_TXCSRH1_MODE; } else { g_musb_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); g_musb_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); g_musb_udc.in_ep[ep_idx].ep_enable = true; - if ((8 << HWREGB(USB_BASE + MUSB_TXFIFOSZ_OFFSET)) < g_musb_udc.in_ep[ep_idx].ep_mps) { - USB_LOG_ERR("Ep %02x fifo is overflow\r\n", ep->bEndpointAddress); - return -2; - } + USB_ASSERT_MSG((8 << HWREGB(USB_BASE + MUSB_TXFIFOSZ_OFFSET)) >= g_musb_udc.in_ep[ep_idx].ep_mps, + "Ep %02x fifo is overflow", ep->bEndpointAddress); HWREGH(USB_BASE + MUSB_IND_TXMAP_OFFSET) = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); @@ -428,7 +423,7 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) ui32Register |= USB_TXCSRH1_ISO; } - HWREGB(USB_BASE + MUSB_IND_TXCSRH_OFFSET) = ui32Register; + HWREGB(USB_BASE + MUSB_IND_TXCSRH_OFFSET) = ui32Register | USB_TXCSRH1_MODE; // Reset the Data toggle to zero. if (HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) & USB_TXCSRL1_TXRDY) @@ -516,13 +511,13 @@ int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) musb_set_active_ep(ep_idx); if (USB_EP_DIR_IS_OUT(ep)) { - if(HWREGB(USB_BASE + MUSB_IND_RXCSRL_OFFSET) & USB_RXCSRL1_STALL) { + if (HWREGB(USB_BASE + MUSB_IND_RXCSRL_OFFSET) & USB_RXCSRL1_STALL) { *stalled = 1; } else { *stalled = 0; } } else { - if(HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) & USB_TXCSRL1_STALL) { + if (HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) & USB_TXCSRL1_STALL) { *stalled = 1; } else { *stalled = 0; @@ -730,8 +725,11 @@ void USBD_IRQHandler(uint8_t busid) usb_ep0_state = USB_EP0_STATE_SETUP; } +#ifdef CONFIG_USBDEV_SOF_ENABLE if (is & USB_IS_SOF) { + usbd_event_sof_handler(0); } +#endif if (is & USB_IS_RESUME) { usbd_event_resume_handler(0); diff --git a/components/drivers/usb/cherryusb/port/musb/usb_hc_musb.c b/components/drivers/usb/cherryusb/port/musb/usb_hc_musb.c index c32a3b17297..3de4ef36c9f 100644 --- a/components/drivers/usb/cherryusb/port/musb/usb_hc_musb.c +++ b/components/drivers/usb/cherryusb/port/musb/usb_hc_musb.c @@ -504,11 +504,7 @@ int usb_hc_init(struct usbh_bus *bus) offset = usbh_musb_fifo_config(bus, &cfg[i], offset); } - if (offset > usb_get_musb_ram_size()) { - USB_LOG_ERR("offset:%d is overflow, please check your table\r\n", offset); - while (1) { - } - } + USB_ASSERT_MSG(offset <= usb_get_musb_ram_size(), "Your fifo config is overflow, please check"); /* Enable USB interrupts */ regval = USB_IE_RESET | USB_IE_CONN | USB_IE_DISCON | @@ -770,6 +766,16 @@ int usbh_kill_urb(struct usbh_urb *urb) urb->errorcode = -USB_ERR_SHUTDOWN; pipe->urb = NULL; + if (urb->ep->bEndpointAddress & 0x80) { + HWREGH(USB_BASE + MUSB_RXIE_OFFSET) &= ~(1 << (urb->ep->bEndpointAddress & 0x0f)); + HWREGH(USB_BASE + MUSB_RXIS_OFFSET) = (1 << (urb->ep->bEndpointAddress & 0x0f)); + } else { + HWREGH(USB_BASE + MUSB_TXIE_OFFSET) &= ~(1 << (urb->ep->bEndpointAddress & 0x0f)); + HWREGH(USB_BASE + MUSB_TXIS_OFFSET) = (1 << (urb->ep->bEndpointAddress & 0x0f)); + } + + musb_fifo_flush(bus, urb->ep->bEndpointAddress); + if (urb->timeout) { usb_osal_sem_give(pipe->waitsem); } else { diff --git a/components/drivers/usb/cherryusb/port/nxp/README.md b/components/drivers/usb/cherryusb/port/nxp/README.md new file mode 100644 index 00000000000..5c461b221f5 --- /dev/null +++ b/components/drivers/usb/cherryusb/port/nxp/README.md @@ -0,0 +1,17 @@ +# Note + +## Support Chip List + +### MCX + +Modify USB_NOCACHE_RAM_SECTION + +``` +#define USB_NOCACHE_RAM_SECTION __attribute__((section(".NonCacheable"))) +``` + +- MCXN9XX/MCXN236 (chipidea + EHCI) + +## IMRT + +- IMRT10XX/IMRT11XX (chipidea + EHCI) \ No newline at end of file diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_phy.c b/components/drivers/usb/cherryusb/port/nxp/usb_glue_mcx.c similarity index 50% rename from bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_phy.c rename to components/drivers/usb/cherryusb/port/nxp/usb_glue_mcx.c index 1480ec44a28..66f2cbe3319 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/usb_phy.c +++ b/components/drivers/usb/cherryusb/port/nxp/usb_glue_mcx.c @@ -1,15 +1,72 @@ /* - * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc. - * Copyright 2016 - 2017 NXP - * All rights reserved. + * Copyright (c) 2024 ~ 2025, sakumisu * - * SPDX-License-Identifier: BSD-3-Clause + * SPDX-License-Identifier: Apache-2.0 */ +#include "usbd_core.h" +#include "usbh_core.h" +#include "fsl_common.h" +#include "fsl_cache.h" +#include "usb_chipidea_reg.h" -#include "usb.h" -#include "fsl_device_registers.h" +__WEAK void USBD_IRQHandler(uint8_t busid) +{ +} + +__WEAK void USBH_IRQHandler(uint8_t busid) +{ +} + +#if !defined(CONFIG_USB_EHCI_NXP) +#error "mcx ehci must config CONFIG_USB_EHCI_NXP" +#endif + +#if !defined(CONFIG_USB_EHCI_HCCR_OFFSET) || CONFIG_USB_EHCI_HCCR_OFFSET != 0x100 +#error "mcx ehci must config CONFIG_USB_EHCI_HCCR_OFFSET to 0x100" +#endif + +#define USB_DEVICE_CONFIG_EHCI 1 -#include "usb_phy.h" +/*! @brief USB controller ID */ +typedef enum _usb_controller_index { + kUSB_ControllerKhci0 = 0U, /*!< KHCI 0U */ + kUSB_ControllerKhci1 = 1U, /*!< KHCI 1U, Currently, there are no platforms which have two KHCI IPs, this is reserved + to be used in the future. */ + kUSB_ControllerEhci0 = 2U, /*!< EHCI 0U */ + kUSB_ControllerEhci1 = 3U, /*!< EHCI 1U, Currently, there are no platforms which have two EHCI IPs, this is reserved + to be used in the future. */ + + kUSB_ControllerLpcIp3511Fs0 = 4U, /*!< LPC USB IP3511 FS controller 0 */ + kUSB_ControllerLpcIp3511Fs1 = 5U, /*!< LPC USB IP3511 FS controller 1, there are no platforms which have two IP3511 + IPs, this is reserved to be used in the future. */ + + kUSB_ControllerLpcIp3511Hs0 = 6U, /*!< LPC USB IP3511 HS controller 0 */ + kUSB_ControllerLpcIp3511Hs1 = 7U, /*!< LPC USB IP3511 HS controller 1, there are no platforms which have two IP3511 + IPs, this is reserved to be used in the future. */ + + kUSB_ControllerOhci0 = 8U, /*!< OHCI 0U */ + kUSB_ControllerOhci1 = 9U, /*!< OHCI 1U, Currently, there are no platforms which have two OHCI IPs, this is reserved + to be used in the future. */ + + kUSB_ControllerIp3516Hs0 = 10U, /*!< IP3516HS 0U */ + kUSB_ControllerIp3516Hs1 = 11U, /*!< IP3516HS 1U, Currently, there are no platforms which have two IP3516HS IPs, + this is reserved to be used in the future. */ + kUSB_ControllerDwc30 = 12U, /*!< DWC3 0U */ + kUSB_ControllerDwc31 = 13U, /*!< DWC3 1U Currently, there are no platforms which have two Dwc IPs, this is reserved + to be used in the future.*/ +} usb_controller_index_t; + +/* USB PHY condfiguration */ +#define BOARD_USB_PHY_D_CAL (0x04U) +#define BOARD_USB_PHY_TXCAL45DP (0x07U) +#define BOARD_USB_PHY_TXCAL45DM (0x07U) +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ + +typedef struct _usb_phy_config_struct { + uint8_t D_CAL; /* Decode to trim the nominal 17.78mA current source */ + uint8_t TXCAL45DP; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DP output pin */ + uint8_t TXCAL45DM; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DM output pin */ +} usb_phy_config_struct_t; void *USB_EhciPhyGetBase(uint8_t controllerId) { @@ -21,36 +78,25 @@ void *USB_EhciPhyGetBase(uint8_t controllerId) uint32_t usbphy_base[] = USBPHY_BASE_ADDRS; #endif uint32_t *temp; - if (controllerId < (uint8_t)kUSB_ControllerEhci0) - { + if (controllerId < (uint8_t)kUSB_ControllerEhci0) { return NULL; } - if ((controllerId == (uint8_t)kUSB_ControllerEhci0) || (controllerId == (uint8_t)kUSB_ControllerEhci1)) - { + if ((controllerId == (uint8_t)kUSB_ControllerEhci0) || (controllerId == (uint8_t)kUSB_ControllerEhci1)) { controllerId = controllerId - (uint8_t)kUSB_ControllerEhci0; - } - else if ((controllerId == (uint8_t)kUSB_ControllerLpcIp3511Hs0) || - (controllerId == (uint8_t)kUSB_ControllerLpcIp3511Hs1)) - { + } else if ((controllerId == (uint8_t)kUSB_ControllerLpcIp3511Hs0) || + (controllerId == (uint8_t)kUSB_ControllerLpcIp3511Hs1)) { controllerId = controllerId - (uint8_t)kUSB_ControllerLpcIp3511Hs0; - } - else if ((controllerId == (uint8_t)kUSB_ControllerIp3516Hs0) || (controllerId == (uint8_t)kUSB_ControllerIp3516Hs1)) - { + } else if ((controllerId == (uint8_t)kUSB_ControllerIp3516Hs0) || (controllerId == (uint8_t)kUSB_ControllerIp3516Hs1)) { controllerId = controllerId - (uint8_t)kUSB_ControllerIp3516Hs0; - } - else - { + } else { return NULL; } - if (controllerId < (sizeof(usbphy_base) / sizeof(usbphy_base[0]))) - { - temp = (uint32_t *)usbphy_base[controllerId]; + if (controllerId < (sizeof(usbphy_base) / sizeof(usbphy_base[0]))) { + temp = (uint32_t *)usbphy_base[controllerId]; usbPhyBase = (void *)temp; - } - else - { + } else { return NULL; } #endif @@ -66,8 +112,8 @@ void *USB_EhciPhyGetBase(uint8_t controllerId) * @param[in] freq the external input clock. * for example: if the external input clock is 16M, the parameter freq should be 16000000. * - * @retval kStatus_USB_Success cancel successfully. - * @retval kStatus_USB_Error the freq value is incorrect. + * @retval 0 cancel successfully. + * @retval -1 the freq value is incorrect. */ uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig) { @@ -75,9 +121,8 @@ uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_str USBPHY_Type *usbPhyBase; usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId); - if (NULL == usbPhyBase) - { - return (uint8_t)kStatus_USB_Error; + if (NULL == usbPhyBase) { + return (uint8_t)-1; } #if ((defined FSL_FEATURE_SOC_ANATOP_COUNT) && (FSL_FEATURE_SOC_ANATOP_COUNT > 0U)) @@ -104,13 +149,11 @@ uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_str usbPhyBase->PWD = 0U; if (((uint8_t)kUSB_ControllerIp3516Hs0 == controllerId) || ((uint8_t)kUSB_ControllerIp3516Hs1 == controllerId) || ((uint8_t)kUSB_ControllerLpcIp3511Hs0 == controllerId) || - ((uint8_t)kUSB_ControllerLpcIp3511Hs1 == controllerId)) - { + ((uint8_t)kUSB_ControllerLpcIp3511Hs1 == controllerId)) { usbPhyBase->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK; usbPhyBase->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK; } - if (NULL != phyConfig) - { + if (NULL != phyConfig) { /* Decode to trim the nominal 17.78mA current source for the High Speed TX drivers on USB_DP and USB_DM. */ usbPhyBase->TX = ((usbPhyBase->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) | @@ -119,7 +162,7 @@ uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_str } #endif - return (uint8_t)kStatus_USB_Success; + return (uint8_t)0; } /*! @@ -131,8 +174,8 @@ uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_str * @param[in] freq the external input clock. * for example: if the external input clock is 16M, the parameter freq should be 16000000. * - * @retval kStatus_USB_Success cancel successfully. - * @retval kStatus_USB_Error the freq value is incorrect. + * @retval 0 cancel successfully. + * @retval -1 the freq value is incorrect. */ uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig) { @@ -140,9 +183,8 @@ uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_co USBPHY_Type *usbPhyBase; usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId); - if (NULL == usbPhyBase) - { - return (uint8_t)kStatus_USB_Error; + if (NULL == usbPhyBase) { + return (uint8_t)-1; } #if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT))) @@ -169,12 +211,10 @@ uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_co usbPhyBase->ANACTRL &= ~USBPHY_ANACTRL_DEV_PULLDOWN_MASK; usbPhyBase->ANACTRL &= ~USBPHY_ANACTRL_PFD_CLKGATE_MASK; - while (0U == (usbPhyBase->ANACTRL & USBPHY_ANACTRL_PFD_STABLE_MASK)) - { + while (0U == (usbPhyBase->ANACTRL & USBPHY_ANACTRL_PFD_STABLE_MASK)) { } #endif - if (NULL != phyConfig) - { + if (NULL != phyConfig) { /* Decode to trim the nominal 17.78mA current source for the High Speed TX drivers on USB_DP and USB_DM. */ usbPhyBase->TX = ((usbPhyBase->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) | @@ -183,7 +223,7 @@ uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_co } #endif - return (uint8_t)kStatus_USB_Success; + return (uint8_t)0; } /*! @@ -199,8 +239,7 @@ void USB_EhciPhyDeinit(uint8_t controllerId) USBPHY_Type *usbPhyBase; usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId); - if (NULL == usbPhyBase) - { + if (NULL == usbPhyBase) { return; } #if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT))) @@ -227,17 +266,13 @@ void USB_EhcihostPhyDisconnectDetectCmd(uint8_t controllerId, uint8_t enable) USBPHY_Type *usbPhyBase; usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId); - if (NULL == usbPhyBase) - { + if (NULL == usbPhyBase) { return; } - if (0U != enable) - { + if (0U != enable) { usbPhyBase->CTRL |= USBPHY_CTRL_ENHOSTDISCONDETECT_MASK; - } - else - { + } else { usbPhyBase->CTRL &= (~USBPHY_CTRL_ENHOSTDISCONDETECT_MASK); } #endif @@ -250,26 +285,165 @@ void USB_PhyDeviceForceEnterFSMode(uint8_t controllerId, uint8_t enable) USBPHY_Type *usbPhyBase; usbPhyBase = (USBPHY_Type *)USB_EhciPhyGetBase(controllerId); - if (NULL == usbPhyBase) - { + if (NULL == usbPhyBase) { return; } - if (0U != enable) - { - uint32_t delay = 1000000; + if (0U != enable) { + uint32_t delay = 1000000; usbPhyBase->DEBUG0_CLR = USBPHY_DEBUG0_CLKGATE_MASK; - while ((0U != (usbPhyBase->USB1_VBUS_DET_STAT & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK)) && (0U != delay)) - { + while ((0U != (usbPhyBase->USB1_VBUS_DET_STAT & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK)) && (0U != delay)) { delay--; } usbPhyBase->USB1_LOOPBACK_SET = USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK; - } - else - { - usbPhyBase->DEBUG0_CLR = USBPHY_DEBUG0_CLKGATE_MASK; + } else { + usbPhyBase->DEBUG0_CLR = USBPHY_DEBUG0_CLKGATE_MASK; usbPhyBase->USB1_LOOPBACK_CLR = USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK; } } #endif #endif + +void USB_ClockInit(void) +{ + usb_phy_config_struct_t phyConfig = { + BOARD_USB_PHY_D_CAL, + BOARD_USB_PHY_TXCAL45DP, + BOARD_USB_PHY_TXCAL45DM, + }; + + SPC0->ACTIVE_VDELAY = 0x0500; + /* Change the power DCDC to 1.8v (By deafult, DCDC is 1.8V), CORELDO to 1.1v (By deafult, CORELDO is 1.0V) */ + SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK; + SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) | + SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u); + /* Wait until it is done */ + while (SPC0->SC & SPC_SC_BUSY_MASK) + ; + if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) { + SCG0->TRIM_LOCK = 0x5a5a0001U; + SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK; + /* wait LDO ready */ + while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)) + ; + } + SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK; + SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK); + /* xtal = 20 ~ 30MHz */ + SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT); + SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK; + while (1) { + if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) { + break; + } + } + SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; + CLOCK_EnableClock(kCLOCK_UsbHs); + CLOCK_EnableClock(kCLOCK_UsbHsPhy); + CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U); + CLOCK_EnableUsbhsClock(); + USB_EhciPhyInit(kUSB_ControllerEhci0, BOARD_XTAL0_CLK_HZ, &phyConfig); +} + +void (*g_usb_nxp_irq)(uint8_t busid); + +void usb_dc_low_level_init(uint8_t busid) +{ + USB_ClockInit(); + + g_usb_nxp_irq = USBD_IRQHandler; + + /* Install isr, set priority, and enable IRQ. */ + NVIC_SetPriority((IRQn_Type)USB1_HS_IRQn, 3); + EnableIRQ((IRQn_Type)USB1_HS_IRQn); +} + +void usb_dc_low_level_deinit(uint8_t busid) +{ + DisableIRQ((IRQn_Type)USB1_HS_IRQn); +} + +static void usb_host_mode_init(CHIPIDEA_TypeDef *ptr) +{ + /* Set mode to host, must be set immediately after reset */ + ptr->USBMODE &= ~USB_USBMODE_CM_MASK; + ptr->USBMODE |= USB_USBMODE_CM_SET(3); + + /* Set the endian */ + ptr->USBMODE &= ~USB_USBMODE_ES_MASK; + + /* Set parallel interface signal */ + ptr->PORTSC1 &= ~USB_PORTSC1_STS_MASK; + + /* Set parallel transceiver width */ + ptr->PORTSC1 &= ~USB_PORTSC1_PTW_MASK; + + /* Not use interrupt threshold. */ + ptr->USBCMD &= ~USB_USBCMD_ITC_MASK; +} + +void usb_hc_low_level_init(struct usbh_bus *bus) +{ + USB_ClockInit(); + + g_usb_nxp_irq = USBH_IRQHandler; + + /* Install isr, set priority, and enable IRQ. */ + NVIC_SetPriority((IRQn_Type)USB1_HS_IRQn, 3); + EnableIRQ((IRQn_Type)USB1_HS_IRQn); +} + +void usb_hc_low_level2_init(struct usbh_bus *bus) +{ + usb_host_mode_init((CHIPIDEA_TypeDef *)(bus->hcd.reg_base)); +} + +void usb_hc_low_level_deinit(struct usbh_bus *bus) +{ + DisableIRQ((IRQn_Type)USB1_HS_IRQn); +} + +uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port) +{ + (void)port; + uint8_t speed; + + CHIPIDEA_TypeDef *ptr = (CHIPIDEA_TypeDef *)bus->hcd.reg_base; + + speed = USB_PORTSC1_PSPD_GET(ptr->PORTSC1); + + if (speed == 0x00) { + return USB_SPEED_FULL; + } + if (speed == 0x01) { + return USB_SPEED_LOW; + } + if (speed == 0x02) { + USB_EhcihostPhyDisconnectDetectCmd(kUSB_ControllerEhci0, 1); + return USB_SPEED_HIGH; + } + + return 0; +} + +void USB1_HS_IRQHandler(void) +{ + g_usb_nxp_irq(0); +} + +#ifdef CONFIG_USB_DCACHE_ENABLE +void usb_dcache_clean(uintptr_t addr, size_t size) +{ + DCACHE_CleanByRange(addr, size); +} + +void usb_dcache_invalidate(uintptr_t addr, size_t size) +{ + DCACHE_InvalidateByRange(addr, size); +} + +void usb_dcache_flush(uintptr_t addr, size_t size) +{ + DCACHE_CleanInvalidateByRange(addr, size); +} +#endif \ No newline at end of file diff --git a/components/drivers/usb/cherryusb/port/ohci/usb_hc_ohci.h b/components/drivers/usb/cherryusb/port/ohci/usb_hc_ohci.h index 1b3220073a7..3daed971f38 100644 --- a/components/drivers/usb/cherryusb/port/ohci/usb_hc_ohci.h +++ b/components/drivers/usb/cherryusb/port/ohci/usb_hc_ohci.h @@ -22,13 +22,23 @@ #ifndef CONFIG_USB_OHCI_TD_NUM #define CONFIG_USB_OHCI_TD_NUM 3 #endif -#ifndef CONFIG_USB_OHCI_ALIGN_SIZE + +#if CONFIG_USB_ALIGN_SIZE <= 32 +#define CONFIG_USB_OHCI_ALIGN_SIZE 32 +#elif CONFIG_USB_ALIGN_SIZE <= 64 #define CONFIG_USB_OHCI_ALIGN_SIZE 64 +#else +#error "CONFIG_USB_ALIGN_SIZE must be 32 or 64" #endif struct ohci_ed_hw; struct ohci_td_hw { struct ohci_gtd hw; +#if defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 32) + uint8_t pad[16]; +#elif defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 64) + uint8_t pad[48]; +#endif struct usbh_urb *urb; bool dir_in; uint32_t buf_start; @@ -37,6 +47,11 @@ struct ohci_td_hw { struct ohci_ed_hw { struct ohci_ed hw; +#if defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 32) + uint8_t pad[16]; +#elif defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 64) + uint8_t pad[48]; +#endif struct ohci_td_hw td_pool[CONFIG_USB_OHCI_TD_NUM]; uint32_t td_count; uint8_t ed_type; diff --git a/components/drivers/usb/cherryusb/port/rp2040/usb_dc_rp2040.c b/components/drivers/usb/cherryusb/port/rp2040/usb_dc_rp2040.c index 418bcd040b8..1a48c0c05cd 100644 --- a/components/drivers/usb/cherryusb/port/rp2040/usb_dc_rp2040.c +++ b/components/drivers/usb/cherryusb/port/rp2040/usb_dc_rp2040.c @@ -181,6 +181,10 @@ int usb_dc_init(uint8_t busid) USB_INTS_DEV_SUSPEND_BITS | USB_INTS_DEV_RESUME_FROM_HOST_BITS | (FORCE_VBUS_DETECT ? 0 : USB_INTS_DEV_CONN_DIS_BITS); +#ifdef CONFIG_USBDEV_SOF_ENABLE + usb_hw->inte |= USB_INTS_DEV_SOF_BITS; +#endif + // Enable USB interrupt at processor irq_set_enabled(USBCTRL_IRQ, true); @@ -577,6 +581,13 @@ void USBD_IRQHandler(uint8_t busid) usbd_event_resume_handler(0); } +#ifdef CONFIG_USBDEV_SOF_ENABLE + if (status & USB_INTS_DEV_SOF_BITS) { + handled |= USB_INTS_DEV_SOF_BITS; + usbd_event_sof_handler(0); + } +#endif + if (status ^ handled) { USB_LOG_INFO("Unhandled IRQ 0x%x\n", (uint32_t)(status ^ handled)); }