benches: add sid benchmarking

Author: binaryfields

Cargo.toml

@@ -26,5 +26,5 @@ libm = { version = "0.2.0", optional = true }
 criterion = "0.2"
 
 [[bench]]
-name = "sampler_bench"
+name = "main"
 harness = false

benches/main.rs

@@ -0,0 +1,9 @@
+#[macro_use]
+extern crate criterion;
+
+mod sid_bench;
+mod sampler_bench;
+
+criterion_group!(benches, sid_bench::bench_sid, sampler_bench::bench_compute_convolution_fir);
+
+criterion_main!(benches);

benches/sampler_bench.rs

@@ -1,12 +1,9 @@
-#[macro_use]
-extern crate criterion;
-
 use criterion::Criterion;
 use resid::sampler::Sampler;
 use resid::synth::Synth;
 use resid::ChipModel;
 
-fn bench_compute_convolution_fir(c: &mut Criterion) {
+pub fn bench_compute_convolution_fir(c: &mut Criterion) {
     c.bench_function("convolution_fir", |b| {
         let sampler = Sampler::new(Synth::new(ChipModel::Mos6581));
         let samples = [2i16; 1024];
@@ -32,6 +29,3 @@ fn bench_compute_convolution_fir(c: &mut Criterion) {
         b.iter(|| sampler.compute_convolution_fir_fallback(&samples[..], &fir[..]))
     });
 }
-
-criterion_group!(benches, bench_compute_convolution_fir);
-criterion_main!(benches);

benches/sid_bench.rs

@@ -0,0 +1,15 @@
+use criterion::Criterion;
+use resid::{ChipModel, Sid};
+
+pub fn bench_sid(c: &mut Criterion) {
+    c.bench_function("clock_delta", |b| {
+        let mut sid = Sid::new(ChipModel::Mos6581);
+        sid.write(0x05, 0x09); // AD1
+        sid.write(0x06, 0x00); // SR1
+        sid.write(0x18, 0x0f); // MODVOL
+        sid.write(0x01, 25); // FREQHI1
+        sid.write(0x00, 177); // FREQLO1
+        sid.write(0x00, 0x21); // CR1
+        b.iter(|| sid.clock_delta(22))
+    });
+}

src/filter.rs

@@ -8,7 +8,6 @@
 use core::f64;
 
 use super::data::{SPLINE6581_F0, SPLINE8580_F0};
-use super::spline;
 use super::ChipModel;
 
 const MIXER_DC: i32 = (-0xfff * 0xff / 18) >> 7;