Skip to content

Commit f74729e

Browse files
committed
Enable Xtensa codegen for rustc_codegen_gcc
* Updates uses of object::Architecture within the compiler
1 parent 34f3222 commit f74729e

File tree

2 files changed

+11
-1
lines changed

2 files changed

+11
-1
lines changed

compiler/rustc_codegen_gcc/src/asm.rs

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -637,6 +637,9 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
637637
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
638638
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
639639
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
640+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => unimplemented!(),
641+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => unimplemented!(),
642+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => unimplemented!(),
640643
InlineAsmRegClass::Err => unreachable!(),
641644
}
642645
};
@@ -706,6 +709,9 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
706709
},
707710
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
708711
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
712+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(),
713+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(),
714+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => cx.type_i8(), // FIXME: should this be i1?
709715
InlineAsmRegClass::Err => unreachable!(),
710716
}
711717
}
@@ -862,7 +868,10 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
862868
InlineAsmRegClass::M68k(_) => None,
863869
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
864870
bug!("LLVM backend does not support SPIR-V")
865-
}
871+
},
872+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => unimplemented!(),
873+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => unimplemented!(),
874+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => unimplemented!(),
866875
InlineAsmRegClass::Err => unreachable!(),
867876
}
868877
}

compiler/rustc_codegen_ssa/src/back/metadata.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,7 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
211211
"avr" => Architecture::Avr,
212212
"msp430" => Architecture::Msp430,
213213
"hexagon" => Architecture::Hexagon,
214+
"xtensa" => Architecture::Xtensa,
214215
"bpf" => Architecture::Bpf,
215216
"loongarch64" => Architecture::LoongArch64,
216217
// Unsupported architecture.

0 commit comments

Comments
 (0)