Updated CPUID

Signed-off-by: Jonathan Woollett-Light <[email protected]>

Author: Jonathan Woollett-Light

Cargo.lock

@@ -16,6 +16,7 @@ vm-fdt = "0.1.0"
 derive_more = { version = "0.99.17", default-features = false, features = ["from"] }
 thiserror = "1.0.32"
 bitflags = ">=1.0.4"
+vmm-sys-util = ">=0.8.0"
 
 arch_gen = { path = "../arch_gen" }
 logger = { path = "../logger" }

src/arch/Cargo.toml

@@ -13,3 +13,40 @@ thiserror = "1.0.32"
 
 utils = { path = "../utils"}
 arch = { path = "../arch" }
+
+vmm-sys-util = ">=0.8.0"
+bit-fields = { path = "../bit-fields", features = ["serde_feature"] }
+phf = { version = "0.10", features = ["macros"] }
+serde = { version="1.0.138", features=["derive"] }
+log-derive = "0.4.1"
+log = "0.4.17"
+
+arrayvec = { version="0.7.2", features=["serde"], optional=true }
+
+libc = "0.2.126"
+# Testing template formats
+serde_json = "1.0.83"
+bincode = "1.3.3"
+
+[features]
+default = ["static","leaf_18"]
+static = ["arrayvec"]
+leaf_18 = []
+# We only have hardcoded static templates and these templates include leaf 18.
+templates = ["static","leaf_18"]
+c3 = ["templates"]
+t2s = ["templates"]
+t2 = ["templates"]
+
+[dev-dependencies]
+# # Error checking tests
+# libc = "0.2.126"
+# # Testing template formats
+# serde_json = "1.0.83"
+# bincode = "1.3.3"
+# Benchmarking
+criterion = "0.3"
+
+[[bench]]
+name = "benchmark"
+harness = false

src/cpuid/Cargo.toml

@@ -0,0 +1,42 @@
+use std::convert::{From, TryFrom};
+
+use cpuid::{AmdCpuid, Cpuid, IntelCpuid, RawCpuid};
+use criterion::{black_box, criterion_group, criterion_main, BenchmarkId, Criterion};
+
+pub fn conversions(c: &mut Criterion) {
+    let kvm = kvm_ioctls::Kvm::new().unwrap();
+    let vm = kvm.create_vm().unwrap();
+    let kvm_cpuid = kvm
+        .get_supported_cpuid(kvm_bindings::KVM_MAX_CPUID_ENTRIES)
+        .unwrap();
+    let raw_cpuid = RawCpuid::from(kvm_cpuid.clone());
+    let cpuid = Cpuid::try_from(raw_cpuid.clone()).unwrap();
+    let amd_cpuid = AmdCpuid::from(raw_cpuid.clone());
+    let intel_cpuid = IntelCpuid::from(raw_cpuid.clone());
+
+    c.bench_function("kvm.clone()", |b| b.iter(|| kvm_cpuid.clone()));
+    c.bench_function("raw.clone()", |b| b.iter(|| raw_cpuid.clone()));
+    c.bench_function("intel.clone()", |b| b.iter(|| intel_cpuid.clone()));
+    c.bench_function("amd.clone()", |b| b.iter(|| amd_cpuid.clone()));
+    c.bench_function("cpuid.clone()", |b| b.iter(|| cpuid.clone()));
+
+    c.bench_function("kvm->raw", |b| b.iter(|| RawCpuid::from(kvm_cpuid.clone())));
+    c.bench_function("raw->kvm", |b| {
+        b.iter(|| kvm_bindings::CpuId::from(raw_cpuid.clone()))
+    });
+    c.bench_function("raw->cpuid", |b| {
+        b.iter(|| Cpuid::try_from(raw_cpuid.clone()))
+    });
+    c.bench_function("cpuid->raw", |b| b.iter(|| RawCpuid::from(cpuid.clone())));
+    c.bench_function("amd->raw", |b| b.iter(|| RawCpuid::from(amd_cpuid.clone())));
+    c.bench_function("raw->amd", |b| b.iter(|| AmdCpuid::from(raw_cpuid.clone())));
+    c.bench_function("intel->raw", |b| {
+        b.iter(|| RawCpuid::from(intel_cpuid.clone()))
+    });
+    c.bench_function("raw->intel", |b| {
+        b.iter(|| IntelCpuid::from(raw_cpuid.clone()))
+    });
+}
+
+criterion_group!(benches, conversions);
+criterion_main!(benches);

src/cpuid/benches/benchmark.rs

@@ -0,0 +1,97 @@
+// Copyright 2022 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+// SPDX-License-Identifier: Apache-2.0
+#![warn(clippy::pedantic)]
+
+use std::cmp::{Ord, Ordering, PartialOrd};
+use std::convert::TryInto;
+
+use log_derive::{logfn, logfn_inputs};
+use serde::{Deserialize, Serialize};
+
+use super::{FixedString, RawCpuid};
+
+/// A structure containing the information as described in the AMD CPUID specification as described
+/// in
+/// [AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions](https://www.amd.com/system/files/TechDocs/24594.pdf)
+/// .
+///
+/// # Notes
+///
+/// We not do not currently check AMD features on snapshot restore.
+#[allow(clippy::unsafe_derive_deserialize, clippy::module_name_repetitions)]
+#[derive(Clone, Debug, PartialEq, Eq, Serialize, Deserialize)]
+#[repr(C)]
+pub struct AmdCpuid(pub RawCpuid);
+
+// TODO: Replace checking of CPUID avaiblity with `x86` and `x86_64` check and
+// [`std::arch_x86_64::has_cpuid()`] when this is stabilized. CPUID is supported when:
+// - We are on an x86 archtecture with `see` enabled and `sgx disabled`.
+// - We are on an x86_64 architecture with `sgx` disabled
+#[cfg(any(
+    all(target_arch = "x86", target_feature = "sse", not(target_env = "sgx")),
+    all(target_arch = "x86_64", not(target_env = "sgx"))
+))]
+impl AmdCpuid {
+    /// Alias for [`AmdCpuid::default`]
+    #[must_use]
+    pub fn new() -> Self {
+        Self(RawCpuid::new())
+    }
+}
+impl AmdCpuid {
+    /// Returns the CPUID manufacturers ID. E.g. `GenuineIntel` or `AuthenticAMD`.
+    ///
+    /// # Panics
+    ///
+    /// When the underlying [`RawCpuid`] has no entry for leaf 0.
+    #[must_use]
+    pub fn manufacturer_id(&self) -> FixedString<12> {
+        let leaf = self.0.get(0, 0).unwrap();
+        let manufacturer_str: [u8; 12] = [
+            leaf.ebx.to_ne_bytes(),
+            leaf.edx.to_ne_bytes(),
+            leaf.ecx.to_ne_bytes(),
+        ]
+        .concat()
+        .try_into()
+        .unwrap();
+        FixedString(manufacturer_str)
+    }
+}
+impl PartialOrd for AmdCpuid {
+    fn partial_cmp(&self, _other: &Self) -> Option<Ordering> {
+        Some(Ordering::Equal)
+    }
+}
+impl Default for AmdCpuid {
+    /// Constructs new `Cpuid` via [`core::arch::x86_64::__cpuid_count`].
+    ///
+    /// # Note
+    ///
+    /// As we do not currently support the AMD CPUID specification this constructs an empty
+    /// [`RawCpuid`].
+    fn default() -> Self {
+        Self(RawCpuid::new())
+    }
+}
+impl Ord for AmdCpuid {
+    /// Checks if `self` is a able to support `other`.
+    ///
+    /// Checks if a process from an environment with cpuid `other` could be continued in the
+    /// environment with the cpuid `self`.
+    #[logfn(Trace)]
+    #[logfn_inputs(Info)]
+    fn cmp(&self, other: &Self) -> Ordering {
+        self.partial_cmp(&other).unwrap()
+    }
+}
+impl From<RawCpuid> for AmdCpuid {
+    fn from(raw_cpuid: RawCpuid) -> Self {
+        Self(raw_cpuid)
+    }
+}
+impl From<AmdCpuid> for RawCpuid {
+    fn from(amd_cpuid: AmdCpuid) -> Self {
+        amd_cpuid.0
+    }
+}

src/cpuid/src/amd/mod.rs

@@ -1,7 +1,6 @@
 // Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
 // SPDX-License-Identifier: Apache-2.0
-
-#![macro_use]
+use std::convert::TryFrom;
 
 /// Structure representing a range of bits in a number.
 ///
@@ -15,14 +14,16 @@
 ///     lsb_index: 3,
 /// };
 /// ```
-/// The BitRange specified above will represent the following part of the number 72:
+/// The `BitRange` specified above will represent the following part of the number 72:
+/// ```text
 /// +-------------------------------------+---+---+---+---+---+---+---+---+---+---+
 /// | Base 2 Representation of the number | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 |
 /// +-------------------------------------+---+---+---+---+---+---+---+---+---+---+
 /// | bits indexes                        | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
 /// +-------------------------------------+---+---+---+---+---+---+---+---+---+---+
 /// | BitRange                            |   |   | * | * | * | * | * |   |   |   |
 /// +-------------------------------------+---+---+---+---+---+---+---+---+---+---+
+/// ```
 pub struct BitRange {
     /// most significant bit index
     pub msb_index: u32,
@@ -55,7 +56,7 @@ pub trait BitRangeExt<T> {
     /// ```
     fn get_mask(&self) -> T;
 
-    /// Checks if the current BitRange is valid for type `T`.
+    /// Checks if the current [`BitRange`] is valid for type `T`.
     fn is_valid(&self) -> bool;
 
     /// Asserts if `self.is_valid()` returns true.
@@ -70,23 +71,15 @@ impl BitRangeExt<u32> for BitRange {
     fn get_mask(&self) -> u32 {
         self.check();
 
-        ((((1_u64) << (self.msb_index - self.lsb_index + 1)) - 1) << self.lsb_index) as u32
+        u32::try_from((((1_u64) << (self.msb_index - self.lsb_index + 1)) - 1) << self.lsb_index)
+            .unwrap()
     }
 
     fn is_valid(&self) -> bool {
         self.msb_index >= self.lsb_index && self.msb_index <= MAX_U32_BIT_INDEX
     }
 }
 
-macro_rules! bit_range {
-    ($msb_index:expr, $lsb_index:expr) => {
-        BitRange {
-            msb_index: $msb_index,
-            lsb_index: $lsb_index,
-        }
-    };
-}
-
 /// Trait containing helper methods for bit operations.
 pub trait BitHelper {
     /// Reads the value of the bit at position `pos`

src/cpuid/src/bit_helper.rs

@@ -80,7 +80,7 @@ impl BrandString {
     ///
     /// For other CPUs, we'll just expose an empty string.
     ///
-    /// This is safe because we know BRAND_STRING_INTEL and BRAND_STRING_AMD to hold valid data
+    /// This is safe because we know `BRAND_STRING_INTEL` and `BRAND_STRING_AMD` to hold valid data
     /// (allowed length and holding only valid ASCII chars).
     pub fn from_vendor_id(vendor_id: &[u8; 12]) -> BrandString {
         match vendor_id {
@@ -139,6 +139,7 @@ impl BrandString {
     /// Returns the given register value for the given CPUID leaf.
     ///
     /// `leaf` must be between 0x80000002 and 0x80000004.
+    #[cfg(test)]
     #[inline]
     pub fn get_reg_for_leaf(&self, leaf: u32, reg: Reg) -> u32 {
         // It's ok not to validate parameters here, leaf and reg should
@@ -164,14 +165,17 @@ impl BrandString {
         // This is actually safe, because self.reg_buf has a fixed, known size,
         // and also there's no risk of misalignment, since we're downgrading
         // alignment constraints from dword to byte.
-        unsafe { slice::from_raw_parts(self.reg_buf.as_ptr() as *const u8, Self::REG_BUF_SIZE * 4) }
+        unsafe { slice::from_raw_parts(self.reg_buf.as_ptr().cast::<u8>(), Self::REG_BUF_SIZE * 4) }
     }
 
     /// Gets a mutable `u8` slice view into the brand string buffer.
     #[inline]
     fn as_bytes_mut(&mut self) -> &mut [u8] {
         unsafe {
-            slice::from_raw_parts_mut(self.reg_buf.as_mut_ptr() as *mut u8, Self::REG_BUF_SIZE * 4)
+            slice::from_raw_parts_mut(
+                self.reg_buf.as_mut_ptr().cast::<u8>(),
+                Self::REG_BUF_SIZE * 4,
+            )
         }
     }