@@ -1725,6 +1725,7 @@ module MakeImpl<InputSig Lang> {
1725
1725
pos = ret .getReturnPosition ( ) and
1726
1726
if allowsFieldFlow = false then ap instanceof ApNil else any ( )
1727
1727
|
1728
+ // both directions are needed for flow-through
1728
1729
FwdTypeFlowInput:: dataFlowTakenCallEdgeIn ( call , c , _) or
1729
1730
FwdTypeFlowInput:: dataFlowTakenCallEdgeOut ( call , c )
1730
1731
)
@@ -1894,13 +1895,15 @@ module MakeImpl<InputSig Lang> {
1894
1895
1895
1896
private module RevTypeFlow = TypeFlow< RevTypeFlowInput > ;
1896
1897
1898
+ pragma [ nomagic]
1897
1899
private predicate flowIntoCallApValid (
1898
1900
DataFlowCall call , DataFlowCallable c , ArgNodeEx arg , ParamNodeEx p , Ap ap
1899
1901
) {
1900
1902
flowIntoCallAp ( call , c , arg , p , ap ) and
1901
1903
RevTypeFlow:: typeFlowValidEdgeOut ( call , c )
1902
1904
}
1903
1905
1906
+ pragma [ nomagic]
1904
1907
private predicate flowOutOfCallApValid (
1905
1908
DataFlowCall call , RetNodeEx ret , ReturnPosition pos , NodeEx out , Ap ap , boolean cc
1906
1909
) {
@@ -2071,8 +2074,12 @@ module MakeImpl<InputSig Lang> {
2071
2074
flowIntoCallAp ( call , c , arg , p , ap ) and
2072
2075
revFlow ( arg , pragma [ only_bind_into ] ( state ) , pragma [ only_bind_into ] ( ap ) ) and
2073
2076
revFlow ( p , pragma [ only_bind_into ] ( state ) , pragma [ only_bind_into ] ( ap ) ) and
2077
+ // allowsFieldFlow has already been checked in flowIntoCallAp, since
2078
+ // `Ap` is at least as precise as a boolean from Stage 2 and
2079
+ // forward, so no need to check it again later.
2074
2080
allowsFieldFlow = true
2075
2081
|
2082
+ // both directions are needed for flow-through
2076
2083
RevTypeFlowInput:: dataFlowTakenCallEdgeIn ( call , c , _) or
2077
2084
RevTypeFlowInput:: dataFlowTakenCallEdgeOut ( call , c )
2078
2085
)
0 commit comments