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ioctl_helper_xe.cpp
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/*
* Copyright (C) 2023-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/os_interface/linux/xe/ioctl_helper_xe.h"
#include "shared/source/debugger/debugger.h"
#include "shared/source/execution_environment/execution_environment.h"
#include "shared/source/execution_environment/root_device_environment.h"
#include "shared/source/gmm_helper/gmm_helper.h"
#include "shared/source/helpers/aligned_memory.h"
#include "shared/source/helpers/basic_math.h"
#include "shared/source/helpers/common_types.h"
#include "shared/source/helpers/constants.h"
#include "shared/source/helpers/engine_control.h"
#include "shared/source/helpers/gfx_core_helper.h"
#include "shared/source/helpers/hw_info.h"
#include "shared/source/helpers/ptr_math.h"
#include "shared/source/helpers/string.h"
#include "shared/source/os_interface/linux/drm_buffer_object.h"
#include "shared/source/os_interface/linux/drm_neo.h"
#include "shared/source/os_interface/linux/engine_info.h"
#include "shared/source/os_interface/linux/memory_info.h"
#include "shared/source/os_interface/linux/os_context_linux.h"
#include "shared/source/os_interface/linux/sys_calls.h"
#include "shared/source/os_interface/linux/xe/xedrm.h"
#include "shared/source/os_interface/os_time.h"
#include <algorithm>
#include <iostream>
#include <limits>
#include <sstream>
#define STRINGIFY_ME(X) return #X
#define RETURN_ME(X) return X
namespace NEO {
const char *IoctlHelperXe::xeGetClassName(int className) {
switch (className) {
case DRM_XE_ENGINE_CLASS_RENDER:
return "rcs";
case DRM_XE_ENGINE_CLASS_COPY:
return "bcs";
case DRM_XE_ENGINE_CLASS_VIDEO_DECODE:
return "vcs";
case DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE:
return "vecs";
case DRM_XE_ENGINE_CLASS_COMPUTE:
return "ccs";
}
return "Unknown class name";
}
const char *IoctlHelperXe::xeGetBindOperationName(int bindOperation) {
switch (bindOperation) {
case DRM_XE_VM_BIND_OP_MAP:
return "MAP";
case DRM_XE_VM_BIND_OP_UNMAP:
return "UNMAP";
case DRM_XE_VM_BIND_OP_MAP_USERPTR:
return "MAP_USERPTR";
case DRM_XE_VM_BIND_OP_UNMAP_ALL:
return "UNMAP ALL";
case DRM_XE_VM_BIND_OP_PREFETCH:
return "PREFETCH";
}
return "Unknown operation";
}
std::string IoctlHelperXe::xeGetBindFlagNames(int bindFlags) {
if (bindFlags == 0) {
return "";
}
std::string flags;
if (bindFlags & DRM_XE_VM_BIND_FLAG_READONLY) {
bindFlags &= ~DRM_XE_VM_BIND_FLAG_READONLY;
flags += "READONLY ";
}
if (bindFlags & DRM_XE_VM_BIND_FLAG_IMMEDIATE) {
bindFlags &= ~DRM_XE_VM_BIND_FLAG_IMMEDIATE;
flags += "IMMEDIATE ";
}
if (bindFlags & DRM_XE_VM_BIND_FLAG_NULL) {
bindFlags &= ~DRM_XE_VM_BIND_FLAG_NULL;
flags += "NULL ";
}
if (bindFlags & DRM_XE_VM_BIND_FLAG_DUMPABLE) {
bindFlags &= ~DRM_XE_VM_BIND_FLAG_DUMPABLE;
flags += "DUMPABLE ";
}
if (bindFlags != 0) {
flags += "Unknown flag ";
}
// Remove the trailing space
if (!flags.empty() && flags.back() == ' ') {
flags.pop_back();
}
return flags;
}
const char *IoctlHelperXe::xeGetengineClassName(uint32_t engineClass) {
switch (engineClass) {
case DRM_XE_ENGINE_CLASS_RENDER:
return "DRM_XE_ENGINE_CLASS_RENDER";
case DRM_XE_ENGINE_CLASS_COPY:
return "DRM_XE_ENGINE_CLASS_COPY";
case DRM_XE_ENGINE_CLASS_VIDEO_DECODE:
return "DRM_XE_ENGINE_CLASS_VIDEO_DECODE";
case DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE:
return "DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE";
case DRM_XE_ENGINE_CLASS_COMPUTE:
return "DRM_XE_ENGINE_CLASS_COMPUTE";
default:
return "Unknown engine class";
}
}
IoctlHelperXe::IoctlHelperXe(Drm &drmArg) : IoctlHelper(drmArg) {
xeLog("IoctlHelperXe::IoctlHelperXe\n", "");
}
bool IoctlHelperXe::initialize() {
xeLog("IoctlHelperXe::initialize\n", "");
drm_xe_device_query queryConfig = {};
queryConfig.query = DRM_XE_DEVICE_QUERY_CONFIG;
auto retVal = IoctlHelper::ioctl(DrmIoctl::query, &queryConfig);
if (retVal != 0 || queryConfig.size == 0) {
return false;
}
auto data = std::vector<uint64_t>(Math::divideAndRoundUp(sizeof(drm_xe_query_config) + sizeof(uint64_t) * queryConfig.size, sizeof(uint64_t)), 0);
struct drm_xe_query_config *config = reinterpret_cast<struct drm_xe_query_config *>(data.data());
queryConfig.data = castToUint64(config);
IoctlHelper::ioctl(DrmIoctl::query, &queryConfig);
xeLog("DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID\t%#llx\n",
config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID]);
xeLog(" REV_ID\t\t\t\t%#llx\n",
(config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xff);
xeLog(" DEVICE_ID\t\t\t\t%#llx\n",
config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff);
xeLog("DRM_XE_QUERY_CONFIG_FLAGS\t\t\t%#llx\n",
config->info[DRM_XE_QUERY_CONFIG_FLAGS]);
xeLog(" DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM\t%s\n",
config->info[DRM_XE_QUERY_CONFIG_FLAGS] &
DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM
? "ON"
: "OFF");
xeLog("DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT\t\t%#llx\n",
config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT]);
xeLog("DRM_XE_QUERY_CONFIG_VA_BITS\t\t%#llx\n",
config->info[DRM_XE_QUERY_CONFIG_VA_BITS]);
xeLog("DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY\t\t%#llx\n",
config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY]);
maxExecQueuePriority = config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] & 0xffff;
memset(&queryConfig, 0, sizeof(queryConfig));
queryConfig.query = DRM_XE_DEVICE_QUERY_HWCONFIG;
IoctlHelper::ioctl(DrmIoctl::query, &queryConfig);
auto newSize = queryConfig.size / sizeof(uint32_t);
hwconfig.resize(newSize);
queryConfig.data = castToUint64(hwconfig.data());
IoctlHelper::ioctl(DrmIoctl::query, &queryConfig);
auto hwInfo = this->drm.getRootDeviceEnvironment().getMutableHardwareInfo();
hwInfo->platform.usDeviceID = config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff;
hwInfo->platform.usRevId = static_cast<int>((config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] >> 16) & 0xff);
hwInfo->capabilityTable.gpuAddressSpace = (1ull << config->info[DRM_XE_QUERY_CONFIG_VA_BITS]) - 1;
hwInfo->capabilityTable.cxlType = 0;
if (getCxlType() && config->num_params > *getCxlType()) {
hwInfo->capabilityTable.cxlType = static_cast<uint32_t>(config->info[*getCxlType()]);
}
queryGtListData = queryData<uint64_t>(DRM_XE_DEVICE_QUERY_GT_LIST);
if (queryGtListData.empty()) {
return false;
}
xeGtListData = reinterpret_cast<drm_xe_query_gt_list *>(queryGtListData.data());
gtIdToTileId.resize(xeGtListData->num_gt, invalidIndex);
for (auto i = 0u; i < xeGtListData->num_gt; i++) {
const auto > = xeGtListData->gt_list[i];
if (gt.type == DRM_XE_QUERY_GT_TYPE_MAIN) {
gtIdToTileId[gt.gt_id] = gt.tile_id;
if (tileIdToGtId.size() < gt.tile_id + 1u) {
tileIdToGtId.resize(gt.tile_id + 1, invalidIndex);
}
tileIdToGtId[gt.tile_id] = gt.gt_id;
}
}
querySupportedFeatures();
return true;
}
IoctlHelperXe::~IoctlHelperXe() {
xeLog("IoctlHelperXe::~IoctlHelperXe\n", "");
}
bool IoctlHelperXe::isSetPairAvailable() {
return false;
}
bool IoctlHelperXe::isChunkingAvailable() {
return false;
}
bool IoctlHelperXe::isVmBindAvailable() {
return true;
}
bool IoctlHelperXe::setDomainCpu(uint32_t handle, bool writeEnable) {
return false;
}
template <typename DataType>
std::vector<DataType> IoctlHelperXe::queryData(uint32_t queryId) {
struct drm_xe_device_query deviceQuery = {};
deviceQuery.query = queryId;
IoctlHelper::ioctl(DrmIoctl::query, &deviceQuery);
std::vector<DataType> retVal(Math::divideAndRoundUp(deviceQuery.size, sizeof(DataType)));
deviceQuery.data = castToUint64(retVal.data());
IoctlHelper::ioctl(DrmIoctl::query, &deviceQuery);
return retVal;
}
template std::vector<uint8_t> IoctlHelperXe::queryData(uint32_t queryId);
template std::vector<uint64_t> IoctlHelperXe::queryData(uint32_t queryId);
uint32_t IoctlHelperXe::getNumEngines(uint64_t *enginesData) const {
return reinterpret_cast<struct drm_xe_query_engines *>(enginesData)->num_engines;
}
std::unique_ptr<EngineInfo> IoctlHelperXe::createEngineInfo(bool isSysmanEnabled) {
auto enginesData = queryData<uint64_t>(DRM_XE_DEVICE_QUERY_ENGINES);
if (enginesData.empty()) {
return {};
}
auto queryEngines = reinterpret_cast<struct drm_xe_query_engines *>(enginesData.data());
auto numberHwEngines = getNumEngines(enginesData.data());
xeLog("numberHwEngines=%d\n", numberHwEngines);
StackVec<std::vector<EngineCapabilities>, 2> enginesPerTile{};
std::bitset<8> multiTileMask{};
auto hwInfo = drm.getRootDeviceEnvironment().getMutableHardwareInfo();
auto defaultEngineClass = getDefaultEngineClass(hwInfo->capabilityTable.defaultEngineType);
for (auto i = 0u; i < numberHwEngines; i++) {
const auto &engine = queryEngines->engines[i].instance;
auto tile = engine.gt_id;
multiTileMask.set(tile);
EngineClassInstance engineClassInstance{};
engineClassInstance.engineClass = engine.engine_class;
engineClassInstance.engineInstance = engine.engine_instance;
xeLog("\t%s:%d:%d\n", xeGetClassName(engineClassInstance.engineClass), engineClassInstance.engineInstance, engine.gt_id);
const bool isBaseEngineClass = engineClassInstance.engineClass == getDrmParamValue(DrmParam::engineClassCompute) ||
engineClassInstance.engineClass == getDrmParamValue(DrmParam::engineClassRender) ||
engineClassInstance.engineClass == getDrmParamValue(DrmParam::engineClassCopy);
const bool isSysmanEngineClass = isSysmanEnabled && (engineClassInstance.engineClass == getDrmParamValue(DrmParam::engineClassVideo) ||
engineClassInstance.engineClass == getDrmParamValue(DrmParam::engineClassVideoEnhance));
if (isBaseEngineClass || isSysmanEngineClass || isExtraEngineClassAllowed(engineClassInstance.engineClass)) {
if (enginesPerTile.size() <= tile) {
enginesPerTile.resize(tile + 1);
}
enginesPerTile[tile].push_back({engineClassInstance, {}});
if (!defaultEngine && engineClassInstance.engineClass == defaultEngineClass) {
defaultEngine = std::make_unique<drm_xe_engine_class_instance>();
*defaultEngine = engine;
}
}
}
UNRECOVERABLE_IF(!defaultEngine);
if (hwInfo->featureTable.flags.ftrMultiTileArch) {
auto &multiTileArchInfo = hwInfo->gtSystemInfo.MultiTileArchInfo;
multiTileArchInfo.IsValid = true;
multiTileArchInfo.TileCount = multiTileMask.count();
multiTileArchInfo.TileMask = static_cast<uint8_t>(multiTileMask.to_ulong());
}
return std::make_unique<EngineInfo>(&drm, enginesPerTile);
}
inline MemoryRegion createMemoryRegionFromXeMemRegion(const drm_xe_mem_region &xeMemRegion, std::bitset<4> tilesMask) {
MemoryRegion memoryRegion{};
memoryRegion.region.memoryInstance = xeMemRegion.instance;
memoryRegion.region.memoryClass = xeMemRegion.mem_class;
memoryRegion.probedSize = xeMemRegion.total_size;
memoryRegion.unallocatedSize = xeMemRegion.total_size - xeMemRegion.used;
memoryRegion.tilesMask = tilesMask;
return memoryRegion;
}
std::unique_ptr<MemoryInfo> IoctlHelperXe::createMemoryInfo() {
auto memUsageData = queryData<uint64_t>(DRM_XE_DEVICE_QUERY_MEM_REGIONS);
if (memUsageData.empty()) {
return {};
}
constexpr auto maxSupportedTilesNumber{4u};
std::array<std::bitset<maxSupportedTilesNumber>, 64> regionTilesMask{};
for (auto i{0u}; i < xeGtListData->num_gt; i++) {
const auto >Entry = xeGtListData->gt_list[i];
if (gtEntry.type != DRM_XE_QUERY_GT_TYPE_MAIN) {
continue;
}
uint64_t nearMemRegions{gtEntry.near_mem_regions};
auto regionIndex{Math::log2(nearMemRegions)};
regionTilesMask[regionIndex].set(gtEntry.tile_id);
}
MemoryInfo::RegionContainer regionsContainer{};
auto xeMemRegionsData = reinterpret_cast<drm_xe_query_mem_regions *>(memUsageData.data());
for (auto i = 0u; i < xeMemRegionsData->num_mem_regions; i++) {
auto &xeMemRegion{xeMemRegionsData->mem_regions[i]};
if (xeMemRegion.mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {
// Make sure sysmem is always put at the first position
regionsContainer.insert(regionsContainer.begin(), createMemoryRegionFromXeMemRegion(xeMemRegion, 0u));
} else {
auto regionIndex = xeMemRegion.instance;
UNRECOVERABLE_IF(regionIndex >= regionTilesMask.size());
if (auto tilesMask = regionTilesMask[regionIndex]; tilesMask.any()) {
regionsContainer.push_back(createMemoryRegionFromXeMemRegion(xeMemRegion, tilesMask));
}
}
}
if (regionsContainer.empty()) {
return {};
}
return std::make_unique<MemoryInfo>(regionsContainer, drm);
}
size_t IoctlHelperXe::getLocalMemoryRegionsSize(const MemoryInfo *memoryInfo, uint32_t subDevicesCount, uint32_t tileMask) const {
size_t size = 0;
for (const auto &memoryRegion : memoryInfo->getLocalMemoryRegions()) {
if ((memoryRegion.tilesMask & std::bitset<4>{tileMask}).any()) {
size += memoryRegion.probedSize;
}
}
return size;
}
void IoctlHelperXe::setupIpVersion() {
auto &rootDeviceEnvironment = drm.getRootDeviceEnvironment();
auto hwInfo = rootDeviceEnvironment.getMutableHardwareInfo();
if (auto hwIpVersion = GtIpVersion{}; queryHwIpVersion(hwIpVersion)) {
hwInfo->ipVersion.architecture = hwIpVersion.major;
hwInfo->ipVersion.release = hwIpVersion.minor;
hwInfo->ipVersion.revision = hwIpVersion.revision;
} else {
xeLog("No HW IP version received from drm_xe_gt. Falling back to default value.");
IoctlHelper::setupIpVersion();
}
}
bool IoctlHelperXe::queryHwIpVersion(GtIpVersion >IpVersion) {
auto gtListData = queryData<uint64_t>(DRM_XE_DEVICE_QUERY_GT_LIST);
if (gtListData.empty()) {
return false;
}
auto xeGtListData = reinterpret_cast<drm_xe_query_gt_list *>(gtListData.data());
for (auto i = 0u; i < xeGtListData->num_gt; i++) {
auto >Entry = xeGtListData->gt_list[i];
if (gtEntry.type == DRM_XE_QUERY_GT_TYPE_MEDIA || gtEntry.ip_ver_major == 0u) {
continue;
}
gtIpVersion.major = gtEntry.ip_ver_major;
gtIpVersion.minor = gtEntry.ip_ver_minor;
gtIpVersion.revision = gtEntry.ip_ver_rev;
return true;
}
return false;
}
bool IoctlHelperXe::setGpuCpuTimes(TimeStampData *pGpuCpuTime, OSTime *osTime) {
if (pGpuCpuTime == nullptr || osTime == nullptr) {
return false;
}
drm_xe_device_query deviceQuery = {};
deviceQuery.query = DRM_XE_DEVICE_QUERY_ENGINE_CYCLES;
auto ret = IoctlHelper::ioctl(DrmIoctl::query, &deviceQuery);
if (ret != 0) {
xeLog(" -> IoctlHelperXe::%s s=0x%lx r=%d\n", __FUNCTION__, deviceQuery.size, ret);
return false;
}
std::vector<uint8_t> retVal(deviceQuery.size);
deviceQuery.data = castToUint64(retVal.data());
drm_xe_query_engine_cycles *queryEngineCycles = reinterpret_cast<drm_xe_query_engine_cycles *>(retVal.data());
queryEngineCycles->clockid = CLOCK_MONOTONIC_RAW;
queryEngineCycles->eci = *this->defaultEngine;
ret = IoctlHelper::ioctl(DrmIoctl::query, &deviceQuery);
auto nValidBits = queryEngineCycles->width;
if (osTime->getDeviceTimestampWidth() != 0) {
nValidBits = osTime->getDeviceTimestampWidth();
}
auto gpuTimestampValidBits = maxNBitValue(nValidBits);
auto gpuCycles = queryEngineCycles->engine_cycles & gpuTimestampValidBits;
xeLog(" -> IoctlHelperXe::%s [%d,%d] clockId=0x%x s=0x%lx nValidBits=0x%x gpuCycles=0x%x cpuTimeInNS=0x%x r=%d\n", __FUNCTION__,
queryEngineCycles->eci.engine_class, queryEngineCycles->eci.engine_instance,
queryEngineCycles->clockid, deviceQuery.size, nValidBits, gpuCycles, queryEngineCycles->cpu_timestamp, ret);
pGpuCpuTime->gpuTimeStamp = gpuCycles;
pGpuCpuTime->cpuTimeinNS = queryEngineCycles->cpu_timestamp;
return ret == 0;
}
bool IoctlHelperXe::getTopologyDataAndMap(const HardwareInfo &hwInfo, DrmQueryTopologyData &topologyData, TopologyMap &topologyMap) {
auto queryGtTopology = queryData<uint8_t>(DRM_XE_DEVICE_QUERY_GT_TOPOLOGY);
auto fillMask = [](std::vector<std::bitset<8>> &vec, drm_xe_query_topology_mask *topo) {
for (uint32_t j = 0; j < topo->num_bytes; j++) {
vec.push_back(topo->mask[j]);
}
};
StackVec<std::vector<std::bitset<8>>, 2> geomDss;
StackVec<std::vector<std::bitset<8>>, 2> computeDss;
StackVec<std::vector<std::bitset<8>>, 2> euDss;
StackVec<std::vector<std::bitset<8>>, 2> l3Banks;
auto topologySize = queryGtTopology.size();
auto dataPtr = queryGtTopology.data();
auto numTiles = tileIdToGtId.size();
geomDss.resize(numTiles);
computeDss.resize(numTiles);
euDss.resize(numTiles);
l3Banks.resize(numTiles);
bool receivedDssInfo = false;
while (topologySize >= sizeof(drm_xe_query_topology_mask)) {
drm_xe_query_topology_mask *topo = reinterpret_cast<drm_xe_query_topology_mask *>(dataPtr);
UNRECOVERABLE_IF(topo == nullptr);
uint32_t gtId = topo->gt_id;
auto tileId = gtIdToTileId[gtId];
if (tileId != invalidIndex) {
switch (topo->type) {
case DRM_XE_TOPO_DSS_GEOMETRY:
fillMask(geomDss[tileId], topo);
receivedDssInfo = true;
break;
case DRM_XE_TOPO_DSS_COMPUTE:
fillMask(computeDss[tileId], topo);
receivedDssInfo = true;
break;
case DRM_XE_TOPO_L3_BANK:
fillMask(l3Banks[tileId], topo);
break;
default:
if (isEuPerDssTopologyType(topo->type)) {
fillMask(euDss[tileId], topo);
} else {
xeLog("Unhandle GT Topo type: %d\n", topo->type);
}
}
}
uint32_t itemSize = sizeof(drm_xe_query_topology_mask) + topo->num_bytes;
topologySize -= itemSize;
dataPtr = ptrOffset(dataPtr, itemSize);
}
int sliceCount = 0;
int subSliceCount = 0;
int euPerDss = 0;
int l3BankCount = 0;
uint32_t hwMaxSubSliceCount = hwInfo.gtSystemInfo.MaxSubSlicesSupported;
topologyData.maxSlices = hwInfo.gtSystemInfo.MaxSlicesSupported ? hwInfo.gtSystemInfo.MaxSlicesSupported : 1;
topologyData.maxSubSlicesPerSlice = hwMaxSubSliceCount / topologyData.maxSlices;
for (auto tileId = 0u; tileId < numTiles; tileId++) {
int subSliceCountPerTile = 0;
std::vector<int> sliceIndices;
std::vector<int> subSliceIndices;
int previouslyEnabledSlice = -1;
auto processSubSliceInfo = [&](const std::vector<std::bitset<8>> &subSliceInfo) -> void {
for (auto subSliceId = 0u; subSliceId < std::min(hwMaxSubSliceCount, static_cast<uint32_t>(subSliceInfo.size() * 8)); subSliceId++) {
auto byte = subSliceId / 8;
auto bit = subSliceId & 0b111;
int sliceId = static_cast<int>(subSliceId / topologyData.maxSubSlicesPerSlice);
if (subSliceInfo[byte].test(bit)) {
subSliceIndices.push_back(subSliceId);
subSliceCountPerTile++;
if (sliceId != previouslyEnabledSlice) {
previouslyEnabledSlice = sliceId;
sliceIndices.push_back(sliceId);
}
}
}
};
processSubSliceInfo(computeDss[tileId]);
if (subSliceCountPerTile == 0) {
processSubSliceInfo(geomDss[tileId]);
}
topologyMap[tileId].sliceIndices = std::move(sliceIndices);
if (topologyMap[tileId].sliceIndices.size() < 2u) {
topologyMap[tileId].subsliceIndices = std::move(subSliceIndices);
}
int sliceCountPerTile = static_cast<int>(topologyMap[tileId].sliceIndices.size());
int euPerDssPerTile = 0;
for (auto byte = 0u; byte < euDss[tileId].size(); byte++) {
euPerDssPerTile += euDss[tileId][byte].count();
}
int l3BankCountPerTile = 0;
for (auto byte = 0u; byte < l3Banks[tileId].size(); byte++) {
l3BankCountPerTile += l3Banks[tileId][byte].count();
}
// pick smallest config
sliceCount = (sliceCount == 0) ? sliceCountPerTile : std::min(sliceCount, sliceCountPerTile);
subSliceCount = (subSliceCount == 0) ? subSliceCountPerTile : std::min(subSliceCount, subSliceCountPerTile);
euPerDss = (euPerDss == 0) ? euPerDssPerTile : std::min(euPerDss, euPerDssPerTile);
l3BankCount = (l3BankCount == 0) ? l3BankCountPerTile : std::min(l3BankCount, l3BankCountPerTile);
// pick max config
topologyData.maxEusPerSubSlice = std::max(topologyData.maxEusPerSubSlice, euPerDssPerTile);
}
topologyData.sliceCount = sliceCount;
topologyData.subSliceCount = subSliceCount;
topologyData.euCount = subSliceCount * euPerDss;
topologyData.numL3Banks = l3BankCount;
return receivedDssInfo;
}
void IoctlHelperXe::updateBindInfo(uint32_t handle, uint64_t userPtr, uint64_t size) {
std::unique_lock<std::mutex> lock(xeLock);
BindInfo b = {handle, userPtr, 0, size};
bindInfo.push_back(b);
}
uint16_t IoctlHelperXe::getDefaultEngineClass(const aub_stream::EngineType &defaultEngineType) {
if (defaultEngineType == aub_stream::EngineType::ENGINE_CCS) {
return DRM_XE_ENGINE_CLASS_COMPUTE;
} else if (defaultEngineType == aub_stream::EngineType::ENGINE_RCS) {
return DRM_XE_ENGINE_CLASS_RENDER;
} else {
/* So far defaultEngineType is either ENGINE_RCS or ENGINE_CCS */
UNRECOVERABLE_IF(true);
return 0;
}
}
/**
* @brief returns caching policy for new allocation.
* For system memory caching policy is write-back, otherwise it's write-combined.
*
* @param[in] allocationInSystemMemory flag that indicates if allocation will be allocated in system memory
*
* @return returns caching policy defined as DRM_XE_GEM_CPU_CACHING_WC or DRM_XE_GEM_CPU_CACHING_WB
*/
uint16_t IoctlHelperXe::getCpuCachingMode(std::optional<bool> isCoherent, bool allocationInSystemMemory) const {
uint16_t cpuCachingMode = DRM_XE_GEM_CPU_CACHING_WC;
if (allocationInSystemMemory) {
if ((isCoherent.value_or(true) == true)) {
cpuCachingMode = DRM_XE_GEM_CPU_CACHING_WB;
}
}
if (debugManager.flags.OverrideCpuCaching.get() != -1) {
cpuCachingMode = debugManager.flags.OverrideCpuCaching.get();
}
return cpuCachingMode;
}
int IoctlHelperXe::createGemExt(const MemRegionsVec &memClassInstances, size_t allocSize, uint32_t &handle, uint64_t patIndex, std::optional<uint32_t> vmId, int32_t pairHandle, bool isChunked, uint32_t numOfChunks, std::optional<uint32_t> memPolicyMode, std::optional<std::vector<unsigned long>> memPolicyNodemask, std::optional<bool> isCoherent) {
struct drm_xe_gem_create create = {};
uint32_t regionsSize = static_cast<uint32_t>(memClassInstances.size());
if (!regionsSize) {
xeLog("memClassInstances empty !\n", "");
return -1;
}
if (vmId != std::nullopt) {
create.vm_id = vmId.value();
}
create.size = allocSize;
MemoryClassInstance mem = memClassInstances[regionsSize - 1];
std::bitset<32> memoryInstances{};
bool isSysMemOnly = true;
for (const auto &memoryClassInstance : memClassInstances) {
memoryInstances.set(memoryClassInstance.memoryInstance);
if (memoryClassInstance.memoryClass != drm_xe_memory_class::DRM_XE_MEM_REGION_CLASS_SYSMEM) {
isSysMemOnly = false;
}
}
create.placement = static_cast<uint32_t>(memoryInstances.to_ulong());
create.cpu_caching = this->getCpuCachingMode(isCoherent, isSysMemOnly);
printDebugString(debugManager.flags.PrintBOCreateDestroyResult.get(), stdout, "Performing DRM_IOCTL_XE_GEM_CREATE with {vmid=0x%x size=0x%lx flags=0x%x placement=0x%x caching=%hu }",
create.vm_id, create.size, create.flags, create.placement, create.cpu_caching);
auto ret = IoctlHelper::ioctl(DrmIoctl::gemCreate, &create);
handle = create.handle;
printDebugString(debugManager.flags.PrintBOCreateDestroyResult.get(), stdout, "DRM_IOCTL_XE_GEM_CREATE has returned: %d BO-%u with size: %lu\n", ret, handle, create.size);
xeLog(" -> IoctlHelperXe::%s [%d,%d] vmid=0x%x s=0x%lx f=0x%x p=0x%x h=0x%x c=%hu r=%d\n", __FUNCTION__,
mem.memoryClass, mem.memoryInstance,
create.vm_id, create.size, create.flags, create.placement, handle, create.cpu_caching, ret);
updateBindInfo(create.handle, 0u, create.size);
return ret;
}
uint32_t IoctlHelperXe::createGem(uint64_t size, uint32_t memoryBanks, std::optional<bool> isCoherent) {
struct drm_xe_gem_create create = {};
create.size = size;
auto pHwInfo = drm.getRootDeviceEnvironment().getHardwareInfo();
auto memoryInfo = drm.getMemoryInfo();
std::bitset<32> memoryInstances{};
auto banks = std::bitset<4>(memoryBanks);
size_t currentBank = 0;
size_t i = 0;
bool isSysMemOnly = true;
while (i < banks.count()) {
if (banks.test(currentBank)) {
auto regionClassAndInstance = memoryInfo->getMemoryRegionClassAndInstance(1u << currentBank, *pHwInfo);
memoryInstances.set(regionClassAndInstance.memoryInstance);
if (regionClassAndInstance.memoryClass != drm_xe_memory_class::DRM_XE_MEM_REGION_CLASS_SYSMEM) {
isSysMemOnly = false;
}
i++;
}
currentBank++;
}
if (memoryBanks == 0) {
auto regionClassAndInstance = memoryInfo->getMemoryRegionClassAndInstance(memoryBanks, *pHwInfo);
memoryInstances.set(regionClassAndInstance.memoryInstance);
}
create.placement = static_cast<uint32_t>(memoryInstances.to_ulong());
create.cpu_caching = this->getCpuCachingMode(isCoherent, isSysMemOnly);
printDebugString(debugManager.flags.PrintBOCreateDestroyResult.get(), stdout, "Performing DRM_IOCTL_XE_GEM_CREATE with {vmid=0x%x size=0x%lx flags=0x%x placement=0x%x caching=%hu }",
create.vm_id, create.size, create.flags, create.placement, create.cpu_caching);
[[maybe_unused]] auto ret = ioctl(DrmIoctl::gemCreate, &create);
printDebugString(debugManager.flags.PrintBOCreateDestroyResult.get(), stdout, "DRM_IOCTL_XE_GEM_CREATE has returned: %d BO-%u with size: %lu\n", ret, create.handle, create.size);
xeLog(" -> IoctlHelperXe::%s vmid=0x%x s=0x%lx f=0x%x p=0x%x h=0x%x c=%hu r=%d\n", __FUNCTION__,
create.vm_id, create.size, create.flags, create.placement, create.handle, create.cpu_caching, ret);
DEBUG_BREAK_IF(ret != 0);
updateBindInfo(create.handle, 0u, create.size);
return create.handle;
}
CacheRegion IoctlHelperXe::closAlloc() {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return CacheRegion::none;
}
uint16_t IoctlHelperXe::closAllocWays(CacheRegion closIndex, uint16_t cacheLevel, uint16_t numWays) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
CacheRegion IoctlHelperXe::closFree(CacheRegion closIndex) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return CacheRegion::none;
}
void IoctlHelperXe::setupXeWaitUserFenceStruct(void *arg, uint32_t ctxId, uint16_t op, uint64_t addr, uint64_t value, int64_t timeout) {
auto waitUserFence = reinterpret_cast<drm_xe_wait_user_fence *>(arg);
waitUserFence->addr = addr;
waitUserFence->op = op;
waitUserFence->value = value;
waitUserFence->mask = std::numeric_limits<uint64_t>::max();
waitUserFence->timeout = timeout;
waitUserFence->exec_queue_id = ctxId;
}
int IoctlHelperXe::xeWaitUserFence(uint32_t ctxId, uint16_t op, uint64_t addr, uint64_t value, int64_t timeout, bool userInterrupt, uint32_t externalInterruptId, GraphicsAllocation *allocForInterruptWait) {
UNRECOVERABLE_IF(addr == 0x0)
drm_xe_wait_user_fence waitUserFence = {};
setupXeWaitUserFenceStruct(&waitUserFence, ctxId, op, addr, value, timeout);
auto retVal = IoctlHelper::ioctl(DrmIoctl::gemWaitUserFence, &waitUserFence);
xeLog(" -> IoctlHelperXe::%s a=0x%llx v=0x%llx T=0x%llx F=0x%x ctx=0x%x retVal=0x%x\n", __FUNCTION__,
addr, value, timeout, waitUserFence.flags, ctxId, retVal);
return retVal;
}
int IoctlHelperXe::waitUserFence(uint32_t ctxId, uint64_t address,
uint64_t value, uint32_t dataWidth, int64_t timeout, uint16_t flags,
bool userInterrupt, uint32_t externalInterruptId, GraphicsAllocation *allocForInterruptWait) {
xeLog(" -> IoctlHelperXe::%s a=0x%llx v=0x%llx w=0x%x T=0x%llx F=0x%x ctx=0x%x\n", __FUNCTION__, address, value, dataWidth, timeout, flags, ctxId);
UNRECOVERABLE_IF(dataWidth != static_cast<uint32_t>(Drm::ValueWidth::u64));
if (address) {
return xeWaitUserFence(ctxId, DRM_XE_UFENCE_WAIT_OP_GTE, address, value, timeout, userInterrupt, externalInterruptId, allocForInterruptWait);
}
return 0;
}
uint32_t IoctlHelperXe::getAtomicAdvise(bool isNonAtomic) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
uint32_t IoctlHelperXe::getAtomicAccess(AtomicAccessMode mode) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
uint32_t IoctlHelperXe::getPreferredLocationAdvise() {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
std::optional<MemoryClassInstance> IoctlHelperXe::getPreferredLocationRegion(PreferredLocation memoryLocation, uint32_t memoryInstance) {
return std::nullopt;
}
bool IoctlHelperXe::setVmBoAdvise(int32_t handle, uint32_t attribute, void *region) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
// There is no vmAdvise attribute in Xe, so return success
return true;
}
bool IoctlHelperXe::setVmBoAdviseForChunking(int32_t handle, uint64_t start, uint64_t length, uint32_t attribute, void *region) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
// There is no vmAdvise attribute in Xe, so return success
return true;
}
bool IoctlHelperXe::setVmPrefetch(uint64_t start, uint64_t length, uint32_t region, uint32_t vmId) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return false;
}
uint32_t IoctlHelperXe::getDirectSubmissionFlag() {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
uint16_t IoctlHelperXe::getWaitUserFenceSoftFlag() {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
};
void IoctlHelperXe::fillExecObject(ExecObject &execObject, uint32_t handle, uint64_t gpuAddress, uint32_t drmContextId, bool bindInfo, bool isMarkedForCapture) {
auto execObjectXe = reinterpret_cast<ExecObjectXe *>(execObject.data);
execObjectXe->gpuAddress = gpuAddress;
execObjectXe->handle = handle;
}
void IoctlHelperXe::logExecObject(const ExecObject &execObject, std::stringstream &logger, size_t size) {
auto execObjectXe = reinterpret_cast<const ExecObjectXe *>(execObject.data);
logger << "ExecBufferXe = { handle: BO-" << execObjectXe->handle
<< ", address range: 0x" << reinterpret_cast<void *>(execObjectXe->gpuAddress) << " }\n";
}
void IoctlHelperXe::fillExecBuffer(ExecBuffer &execBuffer, uintptr_t buffersPtr, uint32_t bufferCount, uint32_t startOffset, uint32_t size, uint64_t flags, uint32_t drmContextId) {
auto execBufferXe = reinterpret_cast<ExecBufferXe *>(execBuffer.data);
execBufferXe->execObject = reinterpret_cast<ExecObjectXe *>(buffersPtr);
execBufferXe->startOffset = startOffset;
execBufferXe->drmContextId = drmContextId;
}
void IoctlHelperXe::logExecBuffer(const ExecBuffer &execBuffer, std::stringstream &logger) {
auto execBufferXe = reinterpret_cast<const ExecBufferXe *>(execBuffer.data);
logger << "ExecBufferXe { "
<< "exec object: " + std::to_string(reinterpret_cast<uintptr_t>(execBufferXe->execObject))
<< ", start offset: " + std::to_string(execBufferXe->startOffset)
<< ", drm context id: " + std::to_string(execBufferXe->drmContextId)
<< " }\n";
}
int IoctlHelperXe::execBuffer(ExecBuffer *execBuffer, uint64_t completionGpuAddress, TaskCountType counterValue) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
int ret = 0;
if (execBuffer) {
auto execBufferXe = reinterpret_cast<ExecBufferXe *>(execBuffer->data);
if (execBufferXe) {
auto execObject = execBufferXe->execObject;
uint32_t engine = execBufferXe->drmContextId;
xeLog("EXEC ofs=%d ctx=0x%x ptr=0x%p\n",
execBufferXe->startOffset, execBufferXe->drmContextId, execBufferXe->execObject);
xeLog(" -> IoctlHelperXe::%s CA=0x%llx v=0x%x ctx=0x%x\n", __FUNCTION__,
completionGpuAddress, counterValue, engine);
struct drm_xe_sync sync[1] = {};
sync[0].type = DRM_XE_SYNC_TYPE_USER_FENCE;
sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL;
sync[0].addr = completionGpuAddress;
sync[0].timeline_value = counterValue;
struct drm_xe_exec exec = {};
exec.exec_queue_id = engine;
exec.num_syncs = 1;
exec.syncs = reinterpret_cast<uintptr_t>(&sync);
exec.address = execObject->gpuAddress + execBufferXe->startOffset;
exec.num_batch_buffer = 1;
ret = IoctlHelper::ioctl(DrmIoctl::gemExecbuffer2, &exec);
xeLog("r=0x%x batch=0x%lx\n", ret, exec.address);
if (debugManager.flags.PrintCompletionFenceUsage.get()) {
std::cout << "Completion fence submitted."
<< " GPU address: " << std::hex << completionGpuAddress << std::dec
<< ", value: " << counterValue << std::endl;
}
}
}
return ret;
}
bool IoctlHelperXe::completionFenceExtensionSupported(const bool isVmBindAvailable) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return isVmBindAvailable;
}
uint64_t IoctlHelperXe::getFlagsForVmBind(bool bindCapture, bool bindImmediate, bool bindMakeResident, bool bindLock, bool readOnlyResource) {
uint64_t flags = 0;
xeLog(" -> IoctlHelperXe::%s %d %d %d %d %d\n", __FUNCTION__, bindCapture, bindImmediate, bindMakeResident, bindLock, readOnlyResource);
if (bindCapture) {
flags |= DRM_XE_VM_BIND_FLAG_DUMPABLE;
}
if (bindImmediate) {
flags |= DRM_XE_VM_BIND_FLAG_IMMEDIATE;
}
if (readOnlyResource) {
flags |= DRM_XE_VM_BIND_FLAG_READONLY;
}
if (bindMakeResident) {
flags |= DRM_XE_VM_BIND_FLAG_IMMEDIATE;
}
return flags;
}
int IoctlHelperXe::queryDistances(std::vector<QueryItem> &queryItems, std::vector<DistanceInfo> &distanceInfos) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
bool IoctlHelperXe::isPageFaultSupported() {
xeLog(" -> IoctlHelperXe::%s %d\n", __FUNCTION__, false);
return false;
};
uint32_t IoctlHelperXe::getEuStallFdParameter() {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0u;
}
std::unique_ptr<uint8_t[]> IoctlHelperXe::createVmControlExtRegion(const std::optional<MemoryClassInstance> ®ionInstanceClass) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return {};
}
uint32_t IoctlHelperXe::getFlagsForVmCreate(bool disableScratch, bool enablePageFault, bool useVmBind) {
xeLog(" -> IoctlHelperXe::%s %d,%d,%d\n", __FUNCTION__, disableScratch, enablePageFault, useVmBind);
uint32_t flags = DRM_XE_VM_CREATE_FLAG_LR_MODE;
if (enablePageFault) {
flags |= DRM_XE_VM_CREATE_FLAG_FAULT_MODE;
}
return flags;
}
uint32_t IoctlHelperXe::createContextWithAccessCounters(GemContextCreateExt &gcc) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
uint32_t IoctlHelperXe::createCooperativeContext(GemContextCreateExt &gcc) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
void IoctlHelperXe::fillVmBindExtSetPat(VmBindExtSetPatT &vmBindExtSetPat, uint64_t patIndex, uint64_t nextExtension) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
}
void IoctlHelperXe::fillVmBindExtUserFence(VmBindExtUserFenceT &vmBindExtUserFence, uint64_t fenceAddress, uint64_t fenceValue, uint64_t nextExtension) {
xeLog(" -> IoctlHelperXe::%s 0x%lx 0x%lx\n", __FUNCTION__, fenceAddress, fenceValue);
auto xeBindExtUserFence = reinterpret_cast<UserFenceExtension *>(vmBindExtUserFence);
UNRECOVERABLE_IF(!xeBindExtUserFence);
xeBindExtUserFence->tag = UserFenceExtension::tagValue;
xeBindExtUserFence->addr = fenceAddress;
xeBindExtUserFence->value = fenceValue;
}
void IoctlHelperXe::setVmBindUserFence(VmBindParams &vmBind, VmBindExtUserFenceT vmBindUserFence) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
vmBind.userFence = castToUint64(vmBindUserFence);
return;
}
std::optional<uint32_t> IoctlHelperXe::getVmAdviseAtomicAttribute() {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
// There is no vmAdvise attribute in Xe
return {};
}
int IoctlHelperXe::vmBind(const VmBindParams &vmBindParams) {
return xeVmBind(vmBindParams, true);
}
int IoctlHelperXe::vmUnbind(const VmBindParams &vmBindParams) {
return xeVmBind(vmBindParams, false);
}
int IoctlHelperXe::getResetStats(ResetStats &resetStats, uint32_t *status, ResetStatsFault *resetStatsFault) {
return ioctl(DrmIoctl::getResetStats, &resetStats);
}
UuidRegisterResult IoctlHelperXe::registerUuid(const std::string &uuid, uint32_t uuidClass, uint64_t ptr, uint64_t size) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return {};
}
UuidRegisterResult IoctlHelperXe::registerStringClassUuid(const std::string &uuid, uint64_t ptr, uint64_t size) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return {};
}
int IoctlHelperXe::unregisterUuid(uint32_t handle) {
xeLog(" -> IoctlHelperXe::%s\n", __FUNCTION__);
return 0;
}
bool IoctlHelperXe::isContextDebugSupported() {
return false;
}
int IoctlHelperXe::setContextDebugFlag(uint32_t drmContextId) {
return 0;
}
bool IoctlHelperXe::isDebugAttachAvailable() {
return true;
}
int IoctlHelperXe::getDrmParamValue(DrmParam drmParam) const {
xeLog(" -> IoctlHelperXe::%s 0x%x %s\n", __FUNCTION__, drmParam, getDrmParamString(drmParam).c_str());
switch (drmParam) {
case DrmParam::memoryClassDevice:
return DRM_XE_MEM_REGION_CLASS_VRAM;
case DrmParam::memoryClassSystem:
return DRM_XE_MEM_REGION_CLASS_SYSMEM;