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lines changed 1 file changed +48
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lines changed Original file line number Diff line number Diff line change @@ -61,36 +61,9 @@ impl TaskContext {
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}
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#[ cfg( target_arch = "riscv32" ) ]
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- core:: arch:: global_asm!(
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- r"
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- .ifndef XLENB
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- .equ XLENB, 4
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-
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- .macro LDR rd, rs, off
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- lw \rd, \off*XLENB(\rs)
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- .endm
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- .macro STR rs2, rs1, off
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- sw \rs2, \off*XLENB(\rs1)
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- .endm
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-
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- .endif"
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- ) ;
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-
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+ const XLENB : usize = 4 ;
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#[ cfg( target_arch = "riscv64" ) ]
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- core:: arch:: global_asm!(
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- r"
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- .ifndef XLENB
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- .equ XLENB, 8
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-
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- .macro LDR rd, rs, off
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- ld \rd, \off*XLENB(\rs)
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- .endm
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- .macro STR rs2, rs1, off
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- sd \rs2, \off*XLENB(\rs1)
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- .endm
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-
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- .endif" ,
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- ) ;
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+ const XLENB : usize = 8 ;
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#[ naked]
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/// Switches the context from the current task to the next task.
@@ -101,40 +74,52 @@ core::arch::global_asm!(
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pub unsafe extern "C" fn context_switch ( _current_task : & mut TaskContext , _next_task : & TaskContext ) {
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unsafe {
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naked_asm ! (
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- "
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- // save old context (callee-saved registers)
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- STR ra, a0, 0
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- STR sp, a0, 1
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- STR s0, a0, 2
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- STR s1, a0, 3
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- STR s2, a0, 4
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- STR s3, a0, 5
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- STR s4, a0, 6
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- STR s5, a0, 7
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- STR s6, a0, 8
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- STR s7, a0, 9
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- STR s8, a0, 10
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- STR s9, a0, 11
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- STR s10, a0, 12
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- STR s11, a0, 13
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-
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- // restore new context
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- LDR s11, a1, 13
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- LDR s10, a1, 12
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- LDR s9, a1, 11
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- LDR s8, a1, 10
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- LDR s7, a1, 9
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- LDR s6, a1, 8
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- LDR s5, a1, 7
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- LDR s4, a1, 6
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- LDR s3, a1, 5
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- LDR s2, a1, 4
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- LDR s1, a1, 3
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- LDR s0, a1, 2
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- LDR sp, a1, 1
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- LDR ra, a1, 0
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-
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- ret" ,
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+ r"
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+ .ifndef XLENB
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+ .equ XLENB, {XLENB}
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+
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+ .macro LDR rd, rs, off
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+ ld \rd, \off*XLENB(\rs)
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+ .endm
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+ .macro STR rs2, rs1, off
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+ sd \rs2, \off*XLENB(\rs1)
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+ .endm
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+ .endif
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+
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+ // save old context (callee-saved registers)
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+ STR ra, a0, 0
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+ STR sp, a0, 1
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+ STR s0, a0, 2
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+ STR s1, a0, 3
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+ STR s2, a0, 4
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+ STR s3, a0, 5
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+ STR s4, a0, 6
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+ STR s5, a0, 7
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+ STR s6, a0, 8
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+ STR s7, a0, 9
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+ STR s8, a0, 10
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+ STR s9, a0, 11
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+ STR s10, a0, 12
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+ STR s11, a0, 13
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+
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+ // restore new context
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+ LDR s11, a1, 13
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+ LDR s10, a1, 12
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+ LDR s9, a1, 11
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+ LDR s8, a1, 10
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+ LDR s7, a1, 9
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+ LDR s6, a1, 8
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+ LDR s5, a1, 7
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+ LDR s4, a1, 6
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+ LDR s3, a1, 5
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+ LDR s2, a1, 4
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+ LDR s1, a1, 3
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+ LDR s0, a1, 2
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+ LDR sp, a1, 1
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+ LDR ra, a1, 0
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+
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+ ret" ,
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+ XLENB = const XLENB
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)
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}
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}
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