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target/riscv: add is_virtual parameter to memory access method
Added is_virtual parameter to memory access method. This change is required to support hw translation appropriately. Updated repeat_read documentation according to new behaviour Change-Id: I6970b4dd9d57ff5c032a6c435358003e9a66d21c Signed-off-by: Farid Khaydari <[email protected]>
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5 files changed

+28
-17
lines changed

5 files changed

+28
-17
lines changed

doc/openocd.texi

+3-3
Original file line numberDiff line numberDiff line change
@@ -11465,9 +11465,9 @@ dump_sample_buf}.
1146511465
@end deffn
1146611466

1146711467
@deffn {Command} {riscv repeat_read} count address [size=4]
11468-
Quickly read count words of the given size from address. This can be useful
11469-
to read out a buffer that's memory-mapped to be accessed through a single
11470-
address, or to sample a changing value in a memory-mapped device.
11468+
Quickly read count words of the given size from physical address. This can
11469+
be useful to read out a buffer that's memory-mapped to be accessed through
11470+
a single address, or to sample a changing value in a memory-mapped device.
1147111471
@end deffn
1147211472

1147311473
@deffn {Command} {riscv info}

src/target/riscv/riscv-011.c

+2-1
Original file line numberDiff line numberDiff line change
@@ -2339,7 +2339,8 @@ static int write_memory(struct target *target, const riscv_mem_access_args_t arg
23392339
return ERROR_FAIL;
23402340
}
23412341

2342-
static int access_memory(struct target *target, const riscv_mem_access_args_t args)
2342+
static int access_memory(struct target *target,
2343+
const riscv_mem_access_args_t args, const bool is_virtual)
23432344
{
23442345
assert(riscv_mem_access_is_valid(args));
23452346
const bool is_write = riscv_mem_access_is_write(args);

src/target/riscv/riscv-013.c

+11-5
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,8 @@ static int register_read_direct(struct target *target, riscv_reg_t *value,
6464
enum gdb_regno number);
6565
static int register_write_direct(struct target *target, enum gdb_regno number,
6666
riscv_reg_t value);
67-
static int riscv013_access_memory(struct target *target, const riscv_mem_access_args_t args);
67+
static int riscv013_access_memory(struct target *target,
68+
const riscv_mem_access_args_t args, const bool is_virtual);
6869
static bool riscv013_get_impebreak(const struct target *target);
6970
static unsigned int riscv013_get_progbufsize(const struct target *target);
7071

@@ -1213,7 +1214,8 @@ static int scratch_read64(struct target *target, scratch_mem_t *scratch,
12131214
.count = 2,
12141215
.increment = 4,
12151216
};
1216-
if (riscv013_access_memory(target, args) != ERROR_OK)
1217+
if (riscv013_access_memory(target, args,
1218+
/* is_virtual */ false) != ERROR_OK)
12171219
return ERROR_FAIL;
12181220
*value = buf_get_u64(buffer,
12191221
/* first = */ 0, /* bit_num = */ 64);
@@ -1255,7 +1257,8 @@ static int scratch_write64(struct target *target, scratch_mem_t *scratch,
12551257
.count = 2,
12561258
.increment = 4,
12571259
};
1258-
if (riscv013_access_memory(target, args) != ERROR_OK)
1260+
if (riscv013_access_memory(target, args,
1261+
/* is_virtual */ false) != ERROR_OK)
12591262
return ERROR_FAIL;
12601263
}
12611264
break;
@@ -4518,8 +4521,8 @@ access_memory_abstract(struct target *target, const riscv_mem_access_args_t args
45184521
write_memory_abstract(target, args);
45194522
}
45204523

4521-
static int
4522-
riscv013_access_memory(struct target *target, const riscv_mem_access_args_t args)
4524+
static int riscv013_access_memory(struct target *target,
4525+
const riscv_mem_access_args_t args, const bool is_virtual)
45234526
{
45244527
assert(riscv_mem_access_is_valid(args));
45254528

@@ -4547,12 +4550,15 @@ riscv013_access_memory(struct target *target, const riscv_mem_access_args_t args
45474550
riscv_mem_access_method_t method = r->mem_access_methods[i];
45484551
switch (method) {
45494552
case RISCV_MEM_ACCESS_PROGBUF:
4553+
// TODO: pass is_virtual here in future commits
45504554
skip_reason[method] = access_memory_progbuf(target, args);
45514555
break;
45524556
case RISCV_MEM_ACCESS_SYSBUS:
4557+
// TODO: pass is_virtual here in future commits
45534558
skip_reason[method] = access_memory_sysbus(target, args);
45544559
break;
45554560
case RISCV_MEM_ACCESS_ABSTRACT:
4561+
// TODO: pass is_virtual here in future commits
45564562
skip_reason[method] = access_memory_abstract(target, args);
45574563
break;
45584564
default:

src/target/riscv/riscv.c

+10-7
Original file line numberDiff line numberDiff line change
@@ -3145,7 +3145,7 @@ static int riscv_address_translate(struct target *target,
31453145
.increment = 4,
31463146
.count = (1 << info->pte_shift) / 4,
31473147
};
3148-
int retval = r->access_memory(target, args);
3148+
int retval = r->access_memory(target, args, /* is_virtual */false);
31493149
if (retval != ERROR_OK)
31503150
return ERROR_FAIL;
31513151

@@ -3389,7 +3389,7 @@ static int riscv_read_phys_memory(struct target *target, target_addr_t phys_addr
33893389
.increment = size,
33903390
};
33913391
RISCV_INFO(r);
3392-
return r->access_memory(target, args);
3392+
return r->access_memory(target, args, /* is_virtual */ false);
33933393
}
33943394

33953395
static int riscv_write_phys_memory(struct target *target, target_addr_t phys_address,
@@ -3404,7 +3404,7 @@ static int riscv_write_phys_memory(struct target *target, target_addr_t phys_add
34043404
};
34053405

34063406
RISCV_INFO(r);
3407-
return r->access_memory(target, args);
3407+
return r->access_memory(target, args, /* is_virtual */ false);
34083408
}
34093409

34103410
static int riscv_rw_memory(struct target *target, const riscv_mem_access_args_t args)
@@ -3425,7 +3425,7 @@ static int riscv_rw_memory(struct target *target, const riscv_mem_access_args_t
34253425

34263426
RISCV_INFO(r);
34273427
if (!mmu_enabled)
3428-
return r->access_memory(target, args);
3428+
return r->access_memory(target, args, /* is_virtual */ true);
34293429

34303430
result = check_virt_memory_access(target, args.address,
34313431
args.size, args.count, is_write);
@@ -3457,7 +3457,8 @@ static int riscv_rw_memory(struct target *target, const riscv_mem_access_args_t
34573457
else
34583458
current_access.read_buffer += current_count * args.size;
34593459

3460-
result = r->access_memory(target, current_access);
3460+
result = r->access_memory(target,
3461+
current_access, /* is_virtual */ false);
34613462
if (result != ERROR_OK)
34623463
return result;
34633464

@@ -5228,7 +5229,9 @@ COMMAND_HANDLER(handle_repeat_read)
52285229
.count = count,
52295230
.increment = 0,
52305231
};
5231-
int result = r->access_memory(target, args);
5232+
/* TODO: Add a command parameter that enables
5233+
* choosing between virtual and physical access */
5234+
int result = r->access_memory(target, args, /* is_virtual */ false);
52325235
if (result == ERROR_OK) {
52335236
target_handle_md_output(cmd, target, address, size, count, buffer,
52345237
false);
@@ -5611,7 +5614,7 @@ static const struct command_registration riscv_exec_command_handlers[] = {
56115614
.handler = handle_repeat_read,
56125615
.mode = COMMAND_ANY,
56135616
.usage = "count address [size=4]",
5614-
.help = "Repeatedly read the value at address."
5617+
.help = "Repeatedly read the value at physical address."
56155618
},
56165619
{
56175620
.name = "set_command_timeout_sec",

src/target/riscv/riscv.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -303,7 +303,8 @@ struct riscv_info {
303303
riscv_sample_config_t *config,
304304
int64_t until_ms);
305305

306-
int (*access_memory)(struct target *target, const riscv_mem_access_args_t args);
306+
int (*access_memory)(struct target *target,
307+
const riscv_mem_access_args_t args, const bool is_virtual);
307308

308309
unsigned int (*data_bits)(struct target *target);
309310

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