Merge pull request #20 from japaric/fpu

enable the FPU before main if the target has an FPU

Author: japaric

Cargo.toml

@@ -13,14 +13,13 @@ version = "0.3.0"
 r0 = "0.2.1"
 
 [dependencies.cortex-m]
-optional = true
 version = "0.2.7"
 
 [features]
 default = ["exceptions", "linker-script"]
 # service all exceptions using the default handler
-exceptions = ["cortex-m"]
+exceptions = []
 # generic linker script
 linker-script = []
 # provides a panic_fmt implementation that calls the abort instruction (`udf 0xfe`)
-abort-on-panic = []
+abort-on-panic = []

build.rs

@@ -1,3 +1,5 @@
+use std::env;
+
 #[cfg(feature = "linker-script")]
 mod imp {
     use std::env;
@@ -6,6 +8,8 @@ mod imp {
     use std::path::PathBuf;
 
     pub fn main() {
+        ::has_fpu();
+
         // Put the linker script somewhere the linker can find it
         let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
         File::create(out.join("link.x"))
@@ -21,7 +25,17 @@ mod imp {
 
 #[cfg(not(feature = "linker-script"))]
 mod imp {
-    pub fn main() {}
+    pub fn main() {
+        ::has_fpu();
+    }
+}
+
+fn has_fpu() {
+    let target = env::var("TARGET").unwrap();
+
+    if target.ends_with("eabihf") {
+        println!("cargo:rustc-cfg=has_fpu");
+    }
 }
 
 fn main() {

src/lib.rs

@@ -155,7 +155,6 @@
 #![feature(used)]
 #![no_std]
 
-#[cfg(feature = "exceptions")]
 extern crate cortex_m;
 extern crate compiler_builtins;
 extern crate r0;
@@ -189,9 +188,34 @@ unsafe extern "C" fn reset_handler() -> ! {
     r0::zero_bss(&mut _sbss, &mut _ebss);
     r0::init_data(&mut _sdata, &mut _edata, &_sidata);
 
-    // Neither `argc` or `argv` make sense in bare metal context so we just
-    // stub them
-    main(0, ::core::ptr::null());
+    match () {
+        #[cfg(not(has_fpu))]
+        () => {
+            // Neither `argc` or `argv` make sense in bare metal context so we just
+            // stub them
+            main(0, ::core::ptr::null());
+        }
+        #[cfg(has_fpu)]
+        () => {
+            // NOTE(safe) no exception / interrupt that also accesses the FPU
+            // can occur here
+            let scb = &*cortex_m::peripheral::SCB.get();
+            scb.enable_fpu();
+
+            // Make sure the user main function never gets inlined into this
+            // function as that may cause FPU related instructions like vpush to
+            // be executed *before* enabling the FPU and that would generate an
+            // exception
+            #[inline(never)]
+            fn main() {
+                unsafe {
+                    ::main(0, ::core::ptr::null());
+                }
+            }
+
+            main()
+        }
+    }
 
     // If `main` returns, then we go into "reactive" mode and simply attend
     // interrupts as they occur.
@@ -210,6 +234,5 @@ static RESET_HANDLER: unsafe extern "C" fn() -> ! = reset_handler;
 #[cfg(feature = "exceptions")]
 #[link_section = ".rodata.exceptions"]
 #[used]
-static EXCEPTIONS: exception::Handlers = exception::Handlers {
-    ..exception::DEFAULT_HANDLERS
-};
+static EXCEPTIONS: exception::Handlers =
+    exception::Handlers { ..exception::DEFAULT_HANDLERS };