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Merge #203
203: Use u8 repr for enum instead of custom method r=jonas-schievink a=therealprof This is an alternative proposal to #202 as suggested in #202 (comment) Signed-off-by: Daniel Egger <[email protected]> Co-authored-by: Daniel Egger <[email protected]>
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src/peripheral/scb.rs

Lines changed: 19 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -648,8 +648,10 @@ impl SCB {
648648
/// a runtime-dependent `panic!()` call.
649649
#[inline]
650650
pub unsafe fn invalidate_dcache_by_slice<T>(&mut self, slice: &mut [T]) {
651-
self.invalidate_dcache_by_address(slice.as_ptr() as usize,
652-
slice.len() * core::mem::size_of::<T>());
651+
self.invalidate_dcache_by_address(
652+
slice.as_ptr() as usize,
653+
slice.len() * core::mem::size_of::<T>(),
654+
);
653655
}
654656

655657
/// Cleans D-cache by address.
@@ -732,8 +734,10 @@ impl SCB {
732734
/// to main memory, overwriting whatever was in main memory.
733735
#[inline]
734736
pub fn clean_dcache_by_slice<T>(&mut self, slice: &[T]) {
735-
self.clean_dcache_by_address(slice.as_ptr() as usize,
736-
slice.len() * core::mem::size_of::<T>());
737+
self.clean_dcache_by_address(
738+
slice.as_ptr() as usize,
739+
slice.len() * core::mem::size_of::<T>(),
740+
);
737741
}
738742

739743
/// Cleans and invalidates D-cache by address.
@@ -899,57 +903,38 @@ impl SCB {
899903
/// System handlers, exceptions with configurable priority
900904
#[allow(clippy::missing_inline_in_public_items)]
901905
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
906+
#[repr(u8)]
902907
pub enum SystemHandler {
903908
// NonMaskableInt, // priority is fixed
904909
// HardFault, // priority is fixed
905910
/// Memory management interrupt (not present on Cortex-M0 variants)
906911
#[cfg(not(armv6m))]
907-
MemoryManagement,
912+
MemoryManagement = 4,
908913

909914
/// Bus fault interrupt (not present on Cortex-M0 variants)
910915
#[cfg(not(armv6m))]
911-
BusFault,
916+
BusFault = 5,
912917

913918
/// Usage fault interrupt (not present on Cortex-M0 variants)
914919
#[cfg(not(armv6m))]
915-
UsageFault,
920+
UsageFault = 6,
916921

917922
/// Secure fault interrupt (only on ARMv8-M)
918923
#[cfg(any(armv8m, target_arch = "x86_64"))]
919-
SecureFault,
924+
SecureFault = 7,
920925

921926
/// SV call interrupt
922-
SVCall,
927+
SVCall = 11,
923928

924929
/// Debug monitor interrupt (not present on Cortex-M0 variants)
925930
#[cfg(not(armv6m))]
926-
DebugMonitor,
931+
DebugMonitor = 12,
927932

928933
/// Pend SV interrupt
929-
PendSV,
934+
PendSV = 14,
930935

931936
/// System Tick interrupt
932-
SysTick,
933-
}
934-
935-
impl SystemHandler {
936-
fn index(self) -> u8 {
937-
match self {
938-
#[cfg(not(armv6m))]
939-
SystemHandler::MemoryManagement => 4,
940-
#[cfg(not(armv6m))]
941-
SystemHandler::BusFault => 5,
942-
#[cfg(not(armv6m))]
943-
SystemHandler::UsageFault => 6,
944-
#[cfg(any(armv8m, target_arch = "x86_64"))]
945-
SystemHandler::SecureFault => 7,
946-
SystemHandler::SVCall => 11,
947-
#[cfg(not(armv6m))]
948-
SystemHandler::DebugMonitor => 12,
949-
SystemHandler::PendSV => 14,
950-
SystemHandler::SysTick => 15,
951-
}
952-
}
937+
SysTick = 15,
953938
}
954939

955940
impl SCB {
@@ -959,7 +944,7 @@ impl SCB {
959944
/// [`NVIC.get_priority`](struct.NVIC.html#method.get_priority) for more details.
960945
#[inline]
961946
pub fn get_priority(system_handler: SystemHandler) -> u8 {
962-
let index = system_handler.index();
947+
let index = system_handler as u8;
963948

964949
#[cfg(not(armv6m))]
965950
{
@@ -990,7 +975,7 @@ impl SCB {
990975
/// [`register::basepri`](../register/basepri/index.html)) and compromise memory safety.
991976
#[inline]
992977
pub unsafe fn set_priority(&mut self, system_handler: SystemHandler, prio: u8) {
993-
let index = system_handler.index();
978+
let index = system_handler as u8;
994979

995980
#[cfg(not(armv6m))]
996981
{

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