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1 parent 33a5fa0 commit cc5ea7fCopy full SHA for cc5ea7f
src/peripheral/nvic.rs
@@ -1,8 +1,8 @@
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//! Nested Vector Interrupt Controller
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#[cfg(not(armv6m))]
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-use volatile_register::RO;
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-use volatile_register::{RW, WO};
+use volatile_register::{RO, WO};
+use volatile_register::RW;
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use interrupt::Nr;
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use peripheral::NVIC;
@@ -78,6 +78,7 @@ pub struct RegisterBlock {
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}
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impl NVIC {
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+ #[cfg(not(armv6m))]
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/// Request an IRQ in software
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///
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/// Writing a value to the INTID field is the same as manually pending an interrupt by setting
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