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Split nb and can traits to separate crates.
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‎Cargo.toml

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@@ -14,10 +14,3 @@ name = "embedded-hal"
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readme = "README.md"
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repository = "https://github.com/rust-embedded/embedded-hal"
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version = "1.0.0-alpha.8"
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[dependencies]
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nb = "1"
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[dev-dependencies.stm32f1]
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version = "0.14"
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features = ["stm32f103", "rt"]

‎embedded-can/Cargo.toml

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[package]
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name = "embedded-can"
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version = "0.4.0"
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edition = "2018"
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description = "HAL traits for Controller Area Netowrk (CAN) devices."
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categories = ["embedded", "hardware-support", "no-std"]
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documentation = "https://docs.rs/embedded-hal-can"
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keywords = ["hal", "IO"]
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license = "MIT OR Apache-2.0"
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readme = "README.md"
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repository = "https://github.com/rust-embedded/embedded-hal"
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[dependencies]
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embedded-hal = { version = "=1.0.0-alpha.8", path = ".." }
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nb = "1"

‎embedded-can/README.md

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[![crates.io](https://img.shields.io/crates/d/embedded-hal-nb.svg)](https://crates.io/crates/embedded-hal-nb)
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[![crates.io](https://img.shields.io/crates/v/embedded-hal-nb.svg)](https://crates.io/crates/embedded-hal-nb)
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[![Documentation](https://docs.rs/embedded-hal-nb/badge.svg)](https://docs.rs/embedded-hal-nb)
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![Minimum Supported Rust Version](https://img.shields.io/badge/rustc-1.54+-blue.svg)
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# `embedded-hal-nb`
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A non-blocking Hardware Abstraction Layer (HAL) for embedded systems, using the `nb` crate.
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This crate contains versions of some [`embedded-hal`] traits using `nb`, and shares its scope and [design goals].
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This project is developed and maintained by the [HAL team][team].
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## [API reference]
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[API reference]: https://docs.rs/embedded-hal-nb
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## Minimum Supported Rust Version (MSRV)
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This crate is guaranteed to compile on stable Rust 1.54 and up. It *might*
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compile with older versions but that may change in any new patch release.
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See [here](docs/msrv.md) for details on how the MSRV may be upgraded.
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## License
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Licensed under either of
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- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
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http://www.apache.org/licenses/LICENSE-2.0)
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- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
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at your option.
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### Contribution
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Unless you explicitly state otherwise, any contribution intentionally submitted
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for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
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dual licensed as above, without any additional terms or conditions.
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## Code of Conduct
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Contribution to this crate is organized under the terms of the [Rust Code of
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Conduct][CoC], the maintainer of this crate, the [HAL team][team], promises
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to intervene to uphold that code of conduct.
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[CoC]: ../CODE_OF_CONDUCT.md
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[team]: https://github.com/rust-embedded/wg#the-hal-team
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[`embedded-hal`]: https://crates.io/crates/embedded-hal
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[design goals]: https://docs.rs/embedded-hal/latest/embedded_hal/#design-goals

‎src/can/blocking.rs renamed to ‎embedded-can/src/blocking.rs

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/// A blocking CAN interface that is able to transmit and receive frames.
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pub trait Can {
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/// Associated frame type.
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type Frame: crate::can::Frame;
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type Frame: crate::Frame;
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/// Associated error type.
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type Error: crate::can::Error;
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type Error: crate::Error;
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/// Puts a frame in the transmit buffer. Blocks until space is available in
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/// the transmit buffer.

‎src/can/id.rs renamed to ‎embedded-can/src/id.rs

File renamed without changes.

‎src/can/mod.rs renamed to ‎embedded-can/src/lib.rs

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//! Controller Area Network
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//! Controller Area Network (CAN) traits
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#![warn(missing_docs)]
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#![no_std]
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pub mod blocking;
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pub mod nb;

‎src/can/nb.rs renamed to ‎embedded-can/src/nb.rs

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/// A CAN interface that is able to transmit and receive frames.
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pub trait Can {
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/// Associated frame type.
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type Frame: crate::can::Frame;
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type Frame: crate::Frame;
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/// Associated error type.
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type Error: crate::can::Error;
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type Error: crate::Error;
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/// Puts a frame in the transmit buffer to be sent on the bus.
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///

‎embedded-hal-async/src/i2c.rs

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//! `SevenBitAddress` has been set as default mode and thus can be omitted if desired.
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use core::future::Future;
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pub use embedded_hal::i2c::blocking::Operation;
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pub use embedded_hal::i2c::Operation;
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pub use embedded_hal::i2c::{
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AddressMode, Error, ErrorKind, ErrorType, NoAcknowledgeSource, SevenBitAddress, TenBitAddress,
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};

‎embedded-hal-async/src/spi.rs

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use core::{fmt::Debug, future::Future};
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use embedded_hal::digital::OutputPin;
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use embedded_hal::spi as blocking;
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pub use embedded_hal::spi::{
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Error, ErrorKind, ErrorType, Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3,
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};
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use embedded_hal::{digital::blocking::OutputPin, spi::blocking};
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type ReadFuture<'a, T, Word>
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where

‎embedded-hal-bus/src/spi.rs

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//! SPI bus sharing mechanisms.
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/// SPI bus sharing with blocking traits
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pub mod blocking {
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use core::fmt::Debug;
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use embedded_hal::{
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digital::blocking::OutputPin,
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spi::{
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blocking::{SpiBusFlush, SpiDevice},
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Error, ErrorKind, ErrorType,
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},
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};
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use core::fmt::Debug;
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use embedded_hal::digital::OutputPin;
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use embedded_hal::spi::{Error, ErrorKind, ErrorType, SpiBusFlush, SpiDevice};
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/// Error type for [`ExclusiveDevice`] operations.
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#[derive(Copy, Clone, Eq, PartialEq, Debug)]
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pub enum ExclusiveDeviceError<BUS, CS> {
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/// An inner SPI bus operation failed
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Spi(BUS),
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/// Asserting or deasserting CS failed
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Cs(CS),
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}
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/// Error type for [`ExclusiveDevice`] operations.
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#[derive(Copy, Clone, Eq, PartialEq, Debug)]
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pub enum ExclusiveDeviceError<BUS, CS> {
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/// An inner SPI bus operation failed
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Spi(BUS),
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/// Asserting or deasserting CS failed
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Cs(CS),
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}
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impl<BUS, CS> Error for ExclusiveDeviceError<BUS, CS>
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where
25-
BUS: Error + Debug,
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CS: Debug,
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{
28-
fn kind(&self) -> ErrorKind {
29-
match self {
30-
Self::Spi(e) => e.kind(),
31-
Self::Cs(_) => ErrorKind::ChipSelectFault,
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}
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impl<BUS, CS> Error for ExclusiveDeviceError<BUS, CS>
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where
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BUS: Error + Debug,
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CS: Debug,
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{
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fn kind(&self) -> ErrorKind {
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match self {
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Self::Spi(e) => e.kind(),
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Self::Cs(_) => ErrorKind::ChipSelectFault,
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}
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}
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}
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/// [`SpiDevice`] implementation with exclusive access to the bus (not shared).
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///
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/// This is the most straightforward way of obtaining an [`SpiDevice`] from an [`SpiBus`],
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/// ideal for when no sharing is required (only one SPI device is present on the bus).
40-
pub struct ExclusiveDevice<BUS, CS> {
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bus: BUS,
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cs: CS,
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}
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/// [`SpiDevice`] implementation with exclusive access to the bus (not shared).
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///
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/// This is the most straightforward way of obtaining an [`SpiDevice`] from an [`SpiBus`],
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/// ideal for when no sharing is required (only one SPI device is present on the bus).
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pub struct ExclusiveDevice<BUS, CS> {
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bus: BUS,
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cs: CS,
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}
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45-
impl<BUS, CS> ExclusiveDevice<BUS, CS> {
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/// Create a new ExclusiveDevice
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pub fn new(bus: BUS, cs: CS) -> Self {
48-
Self { bus, cs }
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}
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impl<BUS, CS> ExclusiveDevice<BUS, CS> {
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/// Create a new ExclusiveDevice
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pub fn new(bus: BUS, cs: CS) -> Self {
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Self { bus, cs }
5042
}
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}
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impl<BUS, CS> ErrorType for ExclusiveDevice<BUS, CS>
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where
54-
BUS: ErrorType,
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CS: OutputPin,
56-
{
57-
type Error = ExclusiveDeviceError<BUS::Error, CS::Error>;
58-
}
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impl<BUS, CS> ErrorType for ExclusiveDevice<BUS, CS>
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where
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BUS: ErrorType,
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CS: OutputPin,
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{
50+
type Error = ExclusiveDeviceError<BUS::Error, CS::Error>;
51+
}
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60-
impl<BUS, CS> SpiDevice for ExclusiveDevice<BUS, CS>
61-
where
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BUS: SpiBusFlush,
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CS: OutputPin,
64-
{
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type Bus = BUS;
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impl<BUS, CS> SpiDevice for ExclusiveDevice<BUS, CS>
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where
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BUS: SpiBusFlush,
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CS: OutputPin,
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{
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type Bus = BUS;
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67-
fn transaction<R>(
68-
&mut self,
69-
f: impl FnOnce(&mut Self::Bus) -> Result<R, <Self::Bus as ErrorType>::Error>,
70-
) -> Result<R, Self::Error> {
71-
self.cs.set_low().map_err(ExclusiveDeviceError::Cs)?;
60+
fn transaction<R>(
61+
&mut self,
62+
f: impl FnOnce(&mut Self::Bus) -> Result<R, <Self::Bus as ErrorType>::Error>,
63+
) -> Result<R, Self::Error> {
64+
self.cs.set_low().map_err(ExclusiveDeviceError::Cs)?;
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73-
let f_res = f(&mut self.bus);
66+
let f_res = f(&mut self.bus);
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75-
// On failure, it's important to still flush and deassert CS.
76-
let flush_res = self.bus.flush();
77-
let cs_res = self.cs.set_high();
68+
// On failure, it's important to still flush and deassert CS.
69+
let flush_res = self.bus.flush();
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let cs_res = self.cs.set_high();
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79-
let f_res = f_res.map_err(ExclusiveDeviceError::Spi)?;
80-
flush_res.map_err(ExclusiveDeviceError::Spi)?;
81-
cs_res.map_err(ExclusiveDeviceError::Cs)?;
72+
let f_res = f_res.map_err(ExclusiveDeviceError::Spi)?;
73+
flush_res.map_err(ExclusiveDeviceError::Spi)?;
74+
cs_res.map_err(ExclusiveDeviceError::Cs)?;
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83-
Ok(f_res)
84-
}
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Ok(f_res)
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}
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}

‎embedded-hal-nb/Cargo.toml

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[package]
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name = "embedded-hal-nb"
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version = "1.0.0-alpha.1"
4+
edition = "2018"
5+
6+
categories = ["embedded", "hardware-support", "no-std"]
7+
description = "Non-blocking Hardware Abstraction Layer (HAL) for embedded systems using the `nb` crate."
8+
documentation = "https://docs.rs/embedded-hal-nb"
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keywords = ["hal", "IO"]
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license = "MIT OR Apache-2.0"
11+
readme = "README.md"
12+
repository = "https://github.com/rust-embedded/embedded-hal"
13+
14+
[dependencies]
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embedded-hal = { version = "=1.0.0-alpha.8", path = ".." }
16+
nb = "1"
17+
18+
[dev-dependencies.stm32f1]
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version = "0.14"
20+
features = ["stm32f103", "rt"]

‎embedded-hal-nb/README.md

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[![crates.io](https://img.shields.io/crates/d/embedded-hal-nb.svg)](https://crates.io/crates/embedded-hal-nb)
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[![crates.io](https://img.shields.io/crates/v/embedded-hal-nb.svg)](https://crates.io/crates/embedded-hal-nb)
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[![Documentation](https://docs.rs/embedded-hal-nb/badge.svg)](https://docs.rs/embedded-hal-nb)
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![Minimum Supported Rust Version](https://img.shields.io/badge/rustc-1.54+-blue.svg)
5+
6+
# `embedded-hal-nb`
7+
8+
A non-blocking Hardware Abstraction Layer (HAL) for embedded systems, using the `nb` crate.
9+
10+
This crate contains versions of some [`embedded-hal`] traits using `nb`, and shares its scope and [design goals].
11+
12+
This project is developed and maintained by the [HAL team][team].
13+
14+
## [API reference]
15+
16+
[API reference]: https://docs.rs/embedded-hal-nb
17+
18+
## Minimum Supported Rust Version (MSRV)
19+
20+
This crate is guaranteed to compile on stable Rust 1.54 and up. It *might*
21+
compile with older versions but that may change in any new patch release.
22+
23+
See [here](docs/msrv.md) for details on how the MSRV may be upgraded.
24+
25+
## License
26+
27+
Licensed under either of
28+
29+
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
30+
http://www.apache.org/licenses/LICENSE-2.0)
31+
- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
32+
33+
at your option.
34+
35+
### Contribution
36+
37+
Unless you explicitly state otherwise, any contribution intentionally submitted
38+
for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
39+
dual licensed as above, without any additional terms or conditions.
40+
41+
## Code of Conduct
42+
43+
Contribution to this crate is organized under the terms of the [Rust Code of
44+
Conduct][CoC], the maintainer of this crate, the [HAL team][team], promises
45+
to intervene to uphold that code of conduct.
46+
47+
[CoC]: ../CODE_OF_CONDUCT.md
48+
[team]: https://github.com/rust-embedded/wg#the-hal-team
49+
[`embedded-hal`]: https://crates.io/crates/embedded-hal
50+
[design goals]: https://docs.rs/embedded-hal/latest/embedded_hal/#design-goals

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