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Merge pull request #10 from rust-embedded/new-asm
Update to new assembly syntax. Create release v0.3.0.
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CHANGELOG.md

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@@ -7,14 +7,23 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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## [v0.3.0] - 2022-01-25
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### Changed
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- Bumped `bare-metal` to version `1.0.0`.
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- Bumped `bare-metal` to version `1.0.0`. Using bare_metal v1.x causes
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incompatible type errors with device crates (PACs) using bare-metal v0.2.x.
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This, _among other removed features_, requires a major version bump to fix.
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- All uses of the `llvm_asm!` macro have been replaced with `asm!`, in
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accordance with [Issue 92816](https://github.com/rust-lang/rust/pull/92816).
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### Removed
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- `enable_cs` removed due to soundness hole when interacting with `Clone` and
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`interrupt::free`.
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- Remove `peripherals` module since the peripheral API is no longer provided by
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`bare-metal`.
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- `register::{sp, pc}::write` have been removed; inline assembly [mandates](https://doc.rust-lang.org/nightly/reference/inline-assembly.html#rules-for-inline-assembly)
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that the stack pointer is restored before leaving an asm block. Writing
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PC is also being removed as a precaution.
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## [v0.2.2] - 2020-04-23
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@@ -50,7 +59,8 @@ Initial release.
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[bare-metal]: https://github.com/japaric/bare-metal
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[Unreleased]: https://github.com/rust-embedded/msp430/compare/v0.2.2...HEAD
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[Unreleased]: https://github.com/rust-embedded/msp430/compare/v0.3.0...HEAD
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[v0.3.0]: https://github.com/rust-embedded/msp430/compare/v0.2.2...v0.3.0
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[v0.2.2]: https://github.com/rust-embedded/msp430/compare/v0.2.1...v0.2.2
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[v0.2.1]: https://github.com/rust-embedded/msp430/compare/v0.2.0...v0.2.1
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[v0.2.0]: https://github.com/rust-embedded/msp430/compare/v0.1.0...v0.2.0

README.md

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@@ -7,10 +7,15 @@
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This crate is based on [cortex-m](https://docs.rs/cortex-m) crate by Jorge Aparicio (@japaric).
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**This crate requires a nightly rust due to the use of the `llvm_asm!`
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(`0.2.2` and above) or `asm!` (`0.2.1` and below) macro.** For `0.2.2`,
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`nightly-2020-04-22` is known to work. For `0.2.1`, `nightly-2020-01-04` is
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known to work.
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**This crate requires a nightly rust due to the use of the new `asm!` (`0.3.0`
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and above), `llvm_asm!` (`0.2.2`) or old `asm!` (`0.2.1` and below) macros.**
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The below table contains compilers which are known to work:
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|`msp430` version|`rustc` compiler |
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|----------------|--------------------|
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|`0.3.0` |`nightly-2022-01-24`|
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|`0.2.2` |`nightly-2020-04-22`|
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|`0.2.1` |`nightly-2020-01-04`|
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## [Documentation](https://docs.rs/crate/msp430)
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src/asm.rs

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//! Miscellaneous assembly instructions
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use crate::asm;
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/// A no-operation. Useful to prevent delay loops from being optimized away.
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#[inline(always)]
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pub fn nop() {
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unsafe {
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llvm_asm!("nop"
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:
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:
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:
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: "volatile");
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asm!("nop");
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}
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}
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/// A compiler fence, prevents instruction reordering.
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#[inline(always)]
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pub fn barrier() {
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unsafe {
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llvm_asm!("" ::: "memory" : "volatile");
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asm!("");
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}
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}

src/interrupt.rs

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//! Interrupts
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use crate::asm;
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pub use bare_metal::{CriticalSection, Mutex};
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/// Disables all interrupts
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match () {
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#[cfg(target_arch = "msp430")]
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() => unsafe {
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llvm_asm!("dint { nop"
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:
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:
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: "memory"
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: "volatile");
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asm!("dint {{ nop");
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},
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#[cfg(not(target_arch = "msp430"))]
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() => {}
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match () {
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#[cfg(target_arch = "msp430")]
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() => {
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llvm_asm!("nop { eint { nop"
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:
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:
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: "memory"
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: "volatile");
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asm!("nop {{ eint {{ nop");
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}
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#[cfg(not(target_arch = "msp430"))]
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() => {}

src/lib.rs

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//! - Safe wrappers around assembly instructions like `nop`
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#![deny(missing_docs)]
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#![feature(llvm_asm)]
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#![feature(asm_experimental_arch)]
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#![no_std]
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use core::arch::asm;
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extern crate bare_metal;
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#[macro_use]

src/register/pc.rs

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//! Program counter
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use crate::asm;
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/// Reads the CPU register
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#[inline(always)]
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pub fn read() -> u16 {
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let r;
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unsafe {
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llvm_asm!("mov R0,$0"
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: "=r"(r)
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:
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:
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: "volatile");
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asm!("mov R0, {0}", out(reg) r);
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}
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r
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}
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/// Writes `bits` to the CPU register
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#[inline(always)]
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pub unsafe fn write(bits: u16) {
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llvm_asm!("mov $0,R0"
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:
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: "r"(bits)
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:
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: "volatile");
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}

src/register/sp.rs

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//! Main Stack Pointer
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use crate::asm;
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/// Reads the CPU register
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#[inline(always)]
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pub fn read() -> u16 {
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let r;
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unsafe {
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llvm_asm!("mov R1,$0"
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: "=r"(r)
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:
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:
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: "volatile");
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asm!("mov R1, {0}", out(reg) r);
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}
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r
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}
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/// Writes `bits` to the CPU register
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#[inline(always)]
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pub unsafe fn write(bits: u16) {
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llvm_asm!("mov $0,R1"
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:
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: "r"(bits)
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:
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: "volatile");
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}

src/register/sr.rs

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//! Status Register
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use crate::asm;
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/// Status Register
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#[derive(Clone, Copy, Debug)]
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pub struct Sr {
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pub fn read() -> Sr {
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let r: u16;
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unsafe {
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llvm_asm!("mov R2, $0"
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: "=r"(r)
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:
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:
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: "volatile");
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asm!("mov R2, {0}", out(reg) r);
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}
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Sr { bits: r }
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}

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