Skip to content

Commit eac74d5

Browse files
committed
add configuration parameters
1 parent b930ea3 commit eac74d5

File tree

5 files changed

+96
-78
lines changed

5 files changed

+96
-78
lines changed

Cargo.lock

Lines changed: 6 additions & 4 deletions
Some generated files are not rendered by default. Learn more about customizing how changed files appear on GitHub.

Cargo.toml

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -58,16 +58,12 @@ html-escape = "0.2"
5858
url = { version = "2.5", features = ["serde"] }
5959

6060
[dependencies.svd-parser]
61-
git = "https://github.com/rust-embedded/svd.git" # TODO use crates.io
62-
branch = "master"
6361
features = ["expand"]
64-
# version = "0.14.5"
62+
version = "0.14.6"
6563

6664
[dependencies.svd-rs]
67-
git = "https://github.com/rust-embedded/svd.git" # TODO use crates.io
68-
branch = "master"
6965
features = ["serde"]
70-
# version = "0.14.8"
66+
version = "0.14.9"
7167

7268
[dependencies.syn]
7369
version = "2.0"

src/config.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,10 @@ pub struct Config {
3636
pub field_names_for_enums: bool,
3737
pub base_address_shift: u64,
3838
pub html_url: Option<url::Url>,
39+
#[cfg(feature = "unstable-riscv")]
40+
pub use_riscv_peripheral: bool,
41+
#[cfg(feature = "unstable-riscv")]
42+
pub riscv_clint_freq: Option<u64>,
3943
}
4044

4145
#[allow(clippy::upper_case_acronyms)]

src/generate/device.rs

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,12 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result<Toke
193193
#[cfg(feature = "unstable-riscv")]
194194
Target::RISCV => {
195195
debug!("Rendering RISC-V specific code");
196-
out.extend(riscv::render(d.riscv.as_ref(), &d.peripherals, device_x)?);
196+
out.extend(riscv::render(
197+
d.riscv.as_ref(),
198+
&d.peripherals,
199+
device_x,
200+
config,
201+
)?);
197202
}
198203
_ => {
199204
debug!("Rendering interrupts");
@@ -215,7 +220,10 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result<Toke
215220
continue;
216221
}
217222
#[cfg(feature = "unstable-riscv")]
218-
if config.target == Target::RISCV && riscv::is_riscv_peripheral(p) {
223+
if config.target == Target::RISCV
224+
&& config.use_riscv_peripheral
225+
&& riscv::is_riscv_peripheral(p)
226+
{
219227
// RISC-V specific peripherals are handled above
220228
continue;
221229
}

src/generate/riscv.rs

Lines changed: 74 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
use crate::{
22
svd::{Peripheral, Riscv},
3-
util,
3+
util, Config,
44
};
55
use anyhow::Result;
66
use log::debug;
@@ -16,7 +16,8 @@ pub fn is_riscv_peripheral(p: &Peripheral) -> bool {
1616
pub fn render(
1717
r: Option<&Riscv>,
1818
peripherals: &[Peripheral],
19-
device_x: &mut String, // TODO
19+
device_x: &mut String,
20+
config: &Config,
2021
) -> Result<TokenStream> {
2122
let mut mod_items = TokenStream::new();
2223

@@ -236,74 +237,81 @@ pub fn render(
236237
});
237238
}
238239

239-
let harts = match r {
240-
Some(r) => r
241-
.harts
242-
.iter()
243-
.map(|h| {
244-
let name = TokenStream::from_str(&h.name).unwrap();
245-
let value = h.value;
246-
(name, value)
247-
})
248-
.collect::<Vec<_>>(),
249-
None => vec![],
250-
};
251-
252240
let mut riscv_peripherals = TokenStream::new();
253-
for p in peripherals.iter() {
254-
match p.name.to_uppercase().as_ref() {
255-
"PLIC" => {
256-
let base = TokenStream::from_str(&format!("0x{:X}", p.base_address)).unwrap();
257-
let ctxs = harts
258-
.iter()
259-
.map(|(name, value)| {
260-
let ctx_name = TokenStream::from_str(&format!("ctx{value}")).unwrap();
261-
let doc = format!("[{value}](crate::interrupt::Hart::{name})");
262-
quote! {#ctx_name = (crate::interrupt::Hart::#name, #doc)}
263-
})
264-
.collect::<Vec<_>>();
265-
let ctxs = match ctxs.len() {
266-
0 => quote! {},
267-
_ => quote! {ctxs [ #(#ctxs),* ],},
268-
};
241+
if config.use_riscv_peripheral {
242+
let harts = match r {
243+
Some(r) => r
244+
.harts
245+
.iter()
246+
.map(|h| {
247+
let name = TokenStream::from_str(&h.name).unwrap();
248+
let value = h.value;
249+
(name, value)
250+
})
251+
.collect::<Vec<_>>(),
252+
None => vec![],
253+
};
254+
for p in peripherals.iter() {
255+
match p.name.to_uppercase().as_ref() {
256+
"PLIC" => {
257+
let base =
258+
TokenStream::from_str(&format!("base 0x{:X},", p.base_address)).unwrap();
259+
let ctxs = harts
260+
.iter()
261+
.map(|(name, value)| {
262+
let ctx_name = TokenStream::from_str(&format!("ctx{value}")).unwrap();
263+
let doc = format!("[{value}](crate::interrupt::Hart::{name})");
264+
quote! {#ctx_name = (crate::interrupt::Hart::#name, #doc)}
265+
})
266+
.collect::<Vec<_>>();
267+
let ctxs = match ctxs.len() {
268+
0 => quote! {},
269+
_ => quote! {ctxs [ #(#ctxs),* ],},
270+
};
269271

270-
riscv_peripherals.extend(quote! {
271-
riscv_peripheral::plic_codegen!(base #base, #ctxs);
272-
});
273-
}
274-
"CLINT" => {
275-
let base = TokenStream::from_str(&format!("0x{:X}", p.base_address)).unwrap();
276-
let mtimecmps = harts
277-
.iter()
278-
.map(|(name, value)| {
279-
let mtimecmp_name =
280-
TokenStream::from_str(&format!("mtimecmp{value}")).unwrap();
281-
let doc = format!("[{value}](crate::interrupt::Hart::{name})");
282-
quote! {#mtimecmp_name = (crate::interrupt::Hart::#name, #doc)}
283-
})
284-
.collect::<Vec<_>>();
285-
let mtimecmps = match mtimecmps.len() {
286-
0 => quote! {},
287-
_ => quote! {mtimecmps [ #(#mtimecmps),* ],},
288-
};
289-
let msips = harts
290-
.iter()
291-
.map(|(name, value)| {
292-
let msip_name = TokenStream::from_str(&format!("msip{value}")).unwrap();
293-
let doc = format!("[{value}](crate::interrupt::Hart::{name})");
294-
quote! {#msip_name = (crate::interrupt::Hart::#name, #doc)}
295-
})
296-
.collect::<Vec<_>>();
297-
let msips = match msips.len() {
298-
0 => quote! {},
299-
_ => quote! {msips [ #(#msips),* ],},
300-
};
272+
riscv_peripherals.extend(quote! {
273+
riscv_peripheral::plic_codegen!(#base #ctxs);
274+
});
275+
}
276+
"CLINT" => {
277+
let base =
278+
TokenStream::from_str(&format!("base 0x{:X},", p.base_address)).unwrap();
279+
let freq = match config.riscv_clint_freq {
280+
Some(clk) => TokenStream::from_str(&format!("freq {clk},")).unwrap(),
281+
None => quote! {},
282+
};
283+
let mtimecmps = harts
284+
.iter()
285+
.map(|(name, value)| {
286+
let mtimecmp_name =
287+
TokenStream::from_str(&format!("mtimecmp{value}")).unwrap();
288+
let doc = format!("[{value}](crate::interrupt::Hart::{name})");
289+
quote! {#mtimecmp_name = (crate::interrupt::Hart::#name, #doc)}
290+
})
291+
.collect::<Vec<_>>();
292+
let mtimecmps = match mtimecmps.len() {
293+
0 => quote! {},
294+
_ => quote! {mtimecmps [ #(#mtimecmps),* ],},
295+
};
296+
let msips = harts
297+
.iter()
298+
.map(|(name, value)| {
299+
let msip_name = TokenStream::from_str(&format!("msip{value}")).unwrap();
300+
let doc = format!("[{value}](crate::interrupt::Hart::{name})");
301+
quote! {#msip_name = (crate::interrupt::Hart::#name, #doc)}
302+
})
303+
.collect::<Vec<_>>();
304+
let msips = match msips.len() {
305+
0 => quote! {},
306+
_ => quote! {msips [ #(#msips),* ],},
307+
};
301308

302-
riscv_peripherals.extend(quote! {
303-
riscv_peripheral::clint_codegen!(base #base, #mtimecmps #msips);
304-
});
309+
riscv_peripherals.extend(quote! {
310+
riscv_peripheral::clint_codegen!(#base #freq #mtimecmps #msips);
311+
});
312+
}
313+
_ => {}
305314
}
306-
_ => {}
307315
}
308316
}
309317

0 commit comments

Comments
 (0)