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Revert "[XCOFF][AIX] Peephole optimization for toc-data."
This reverts commit 5e28d30. (cherry picked from commit cef56b9)
1 parent 28874fe commit 5bd2c0c

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5 files changed

+61
-119
lines changed

5 files changed

+61
-119
lines changed

‎llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

Lines changed: 4 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -7633,20 +7633,6 @@ void PPCDAGToDAGISel::PeepholePPC64() {
76337633
case PPC::ADDItocL:
76347634
Flags = PPCII::MO_TOC_LO;
76357635
break;
7636-
case PPC::ADDItoc:
7637-
case PPC::ADDItoc8:
7638-
if (RequiresMod4Offset) {
7639-
if (GlobalAddressSDNode *GA =
7640-
dyn_cast<GlobalAddressSDNode>(Base.getOperand(0))) {
7641-
const GlobalValue *GV = GA->getGlobal();
7642-
Align Alignment = GV->getPointerAlignment(CurDAG->getDataLayout());
7643-
// XMC_TD global that is underaligned being accessed with a DS form
7644-
// instruction.
7645-
if (Alignment < 4)
7646-
continue;
7647-
}
7648-
}
7649-
break;
76507636
}
76517637

76527638
SDValue ImmOpnd = Base.getOperand(1);
@@ -7741,27 +7727,12 @@ void PPCDAGToDAGISel::PeepholePPC64() {
77417727
}
77427728
}
77437729

7744-
const unsigned BaseOpcode = Base.getMachineOpcode();
7745-
// ADDItoc and ADDItoc8 are pseudos used exclusively by AIX small code
7746-
// model when a global is defined in the TOC.
7747-
const bool OpcodeIsAIXTocData =
7748-
BaseOpcode == PPC::ADDItoc || BaseOpcode == PPC::ADDItoc8;
7749-
77507730
if (FirstOp == 1) // Store
7751-
if (OpcodeIsAIXTocData)
7752-
(void)CurDAG->UpdateNodeOperands(N, N->getOperand(0),
7753-
Base.getOperand(0), Base.getOperand(1),
7754-
N->getOperand(3));
7755-
else
7756-
(void)CurDAG->UpdateNodeOperands(N, N->getOperand(0), ImmOpnd,
7757-
Base.getOperand(0), N->getOperand(3));
7731+
(void)CurDAG->UpdateNodeOperands(N, N->getOperand(0), ImmOpnd,
7732+
Base.getOperand(0), N->getOperand(3));
77587733
else // Load
7759-
if (OpcodeIsAIXTocData)
7760-
(void)CurDAG->UpdateNodeOperands(N, Base.getOperand(0),
7761-
Base.getOperand(1), N->getOperand(2));
7762-
else
7763-
(void)CurDAG->UpdateNodeOperands(N, ImmOpnd, Base.getOperand(0),
7764-
N->getOperand(2));
7734+
(void)CurDAG->UpdateNodeOperands(N, ImmOpnd, Base.getOperand(0),
7735+
N->getOperand(2));
77657736

77667737
if (UpdateHBase)
77677738
(void)CurDAG->UpdateNodeOperands(HBase.getNode(), HBase.getOperand(0),

‎llvm/lib/Target/PowerPC/PPCMCInstLower.cpp

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -42,10 +42,6 @@ static MCSymbol *GetSymbolFromOperand(const MachineOperand &MO,
4242
Mangler::getNameWithPrefix(Name, MO.getSymbolName(), DL);
4343
} else {
4444
const GlobalValue *GV = MO.getGlobal();
45-
if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
46-
if (GVar->hasAttribute("toc-data"))
47-
return TM.getSymbol(GV);
48-
4945
TM.getNameWithPrefix(Name, GV, Mang);
5046
}
5147

‎llvm/test/CodeGen/PowerPC/toc-data-const.ll

Lines changed: 31 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,5 @@
1-
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -O0 < %s | FileCheck %s --check-prefixes=CHECK,CHECK32,NOOPT
2-
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -O0 < %s | FileCheck %s --check-prefixes=CHECK,CHECK64,NOOPT
3-
4-
; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s --check-prefixes=CHECK,CHECK32,OPT
5-
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefixes=CHECK,CHECK64,OPT
1+
; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s --check-prefix CHECK
2+
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefix CHECK
63

74
; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
85
; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s --check-prefix=OBJ32
@@ -26,31 +23,27 @@ define ptr @retptr() {
2623

2724
attributes #0 = { "toc-data" }
2825

29-
; CHECK-LABEL: .read:
30-
; NOOPT: la 3, i1[TD](2)
31-
; NOOPT: lwz 3, 0(3)
32-
; OPT: lwz 3, i1[TD](2)
26+
; CHECK: .read:
27+
; CHECK: la 3, i1[TD](2)
3328

34-
; CHECK-LABEL: .retptr:
35-
; CHECK: la 3, i2[TD](2)
36-
; CHECK-NEXT: blr
29+
; CHECK: .retptr:
30+
; CHECK: la 3, i2[TD](2)
3731

3832
; CHECK-DAG: .toc
3933
; CHECK: .extern i1[TD]
40-
; CHECK32: .csect i2[TD],2
41-
; CHECK64: .csect i2[TD],3
34+
; CHECK: .csect i2[TD]
4235

4336
; OBJ32: Relocations [
4437
; OBJ32-NEXT: Section (index: 1) .text {
4538
; OBJ32-NEXT: 0x2 R_TOC i1(1) 0xF
46-
; OBJ32-NEXT: 0x22 R_TOC i2(15) 0xF
39+
; OBJ32-NEXT: 0x26 R_TOC i2(15) 0xF
4740
; OBJ32-NEXT: }
4841
; OBJ32-NEXT: Section (index: 2) .data {
49-
; OBJ32-NEXT: 0x40 R_POS .read(5) 0x1F
50-
; OBJ32-NEXT: 0x44 R_POS TOC(13) 0x1F
51-
; OBJ32-NEXT: 0x4C R_POS .retptr(7) 0x1F
52-
; OBJ32-NEXT: 0x50 R_POS TOC(13) 0x1F
53-
; OBJ32-NEXT: 0x58 R_POS i1(1) 0x1F
42+
; OBJ32-NEXT: 0x44 R_POS .read(5) 0x1F
43+
; OBJ32-NEXT: 0x48 R_POS TOC(13) 0x1F
44+
; OBJ32-NEXT: 0x50 R_POS .retptr(7) 0x1F
45+
; OBJ32-NEXT: 0x54 R_POS TOC(13) 0x1F
46+
; OBJ32-NEXT: 0x5C R_POS i1(1) 0x1F
5447
; OBJ32-NEXT: }
5548
; OBJ32-NEXT: ]
5649

@@ -77,7 +70,7 @@ attributes #0 = { "toc-data" }
7770
; OBJ32: Symbol {
7871
; OBJ32: Index: 13
7972
; OBJ32-NEXT: Name: TOC
80-
; OBJ32-NEXT: Value (RelocatableAddress): 0x58
73+
; OBJ32-NEXT: Value (RelocatableAddress): 0x5C
8174
; OBJ32-NEXT: Section: .data
8275
; OBJ32-NEXT: Type: 0x0
8376
; OBJ32-NEXT: StorageClass: C_HIDEXT (0x6B)
@@ -97,7 +90,7 @@ attributes #0 = { "toc-data" }
9790
; OBJ32: Symbol {
9891
; OBJ32: Index: 15
9992
; OBJ32-NEXT: Name: i2
100-
; OBJ32-NEXT: Value (RelocatableAddress): 0x58
93+
; OBJ32-NEXT: Value (RelocatableAddress): 0x5C
10194
; OBJ32-NEXT: Section: .data
10295
; OBJ32-NEXT: Type: 0x0
10396
; OBJ32-NEXT: StorageClass: C_EXT (0x2)
@@ -118,14 +111,14 @@ attributes #0 = { "toc-data" }
118111
; OBJ64: Relocations [
119112
; OBJ64-NEXT: Section (index: 1) .text {
120113
; OBJ64-NEXT: 0x2 R_TOC i1(1) 0xF
121-
; OBJ64-NEXT: 0x22 R_TOC i2(15) 0xF
114+
; OBJ64-NEXT: 0x26 R_TOC i2(15) 0xF
122115
; OBJ64-NEXT: }
123116
; OBJ64-NEXT: Section (index: 2) .data {
124-
; OBJ64-NEXT: 0x40 R_POS .read(5) 0x3F
125-
; OBJ64-NEXT: 0x48 R_POS TOC(13) 0x3F
126-
; OBJ64-NEXT: 0x58 R_POS .retptr(7) 0x3F
127-
; OBJ64-NEXT: 0x60 R_POS TOC(13) 0x3F
128-
; OBJ64-NEXT: 0x70 R_POS i1(1) 0x3F
117+
; OBJ64-NEXT: 0x48 R_POS .read(5) 0x3F
118+
; OBJ64-NEXT: 0x50 R_POS TOC(13) 0x3F
119+
; OBJ64-NEXT: 0x60 R_POS .retptr(7) 0x3F
120+
; OBJ64-NEXT: 0x68 R_POS TOC(13) 0x3F
121+
; OBJ64-NEXT: 0x78 R_POS i1(1) 0x3F
129122
; OBJ64-NEXT: }
130123
; OBJ64-NEXT: ]
131124

@@ -151,7 +144,7 @@ attributes #0 = { "toc-data" }
151144
; OBJ64: Symbol {
152145
; OBJ64: Index: 13
153146
; OBJ64-NEXT: Name: TOC
154-
; OBJ64-NEXT: Value (RelocatableAddress): 0x70
147+
; OBJ64-NEXT: Value (RelocatableAddress): 0x78
155148
; OBJ64-NEXT: Section: .data
156149
; OBJ64-NEXT: Type: 0x0
157150
; OBJ64-NEXT: StorageClass: C_HIDEXT (0x6B)
@@ -170,7 +163,7 @@ attributes #0 = { "toc-data" }
170163
; OBJ64: Symbol {
171164
; OBJ64: Index: 15
172165
; OBJ64-NEXT: Name: i2
173-
; OBJ64-NEXT: Value (RelocatableAddress): 0x70
166+
; OBJ64-NEXT: Value (RelocatableAddress): 0x78
174167
; OBJ64-NEXT: Section: .data
175168
; OBJ64-NEXT: Type: 0x0
176169
; OBJ64-NEXT: StorageClass: C_EXT (0x2)
@@ -188,15 +181,15 @@ attributes #0 = { "toc-data" }
188181
; OBJ64-NEXT: }
189182

190183
; DIS32: 00000000 <.read>:
191-
; DIS32-NEXT: 0: 80 62 00 00 lwz 3, 0(2)
184+
; DIS32-NEXT: 0: 38 62 00 00 addi 3, 2, 0
192185
; DIS32-NEXT: 00000002: R_TOC i1
193-
; DIS32: 00000020 <.retptr>:
194-
; DIS32-NEXT: 20: 38 62 00 00 addi 3, 2, 0
195-
; DIS32-NEXT: 00000022: R_TOC i2
186+
; DIS32: 00000024 <.retptr>:
187+
; DIS32-NEXT: 24: 38 62 00 00 addi 3, 2, 0
188+
; DIS32-NEXT: 00000026: R_TOC i2
196189

197190
; DIS64: 0000000000000000 <.read>:
198-
; DIS64-NEXT: 0: 80 62 00 00 lwz 3, 0(2)
191+
; DIS64-NEXT: 0: 38 62 00 00 addi 3, 2, 0
199192
; DIS64-NEXT: 0000000000000002: R_TOC i1
200-
; DIS64: 0000000000000020 <.retptr>:
201-
; DIS64-NEXT: 20: 38 62 00 00 addi 3, 2, 0
202-
; DIS64-NEXT: 0000000000000022: R_TOC i2
193+
; DIS64: 0000000000000024 <.retptr>:
194+
; DIS64-NEXT: 24: 38 62 00 00 addi 3, 2, 0
195+
; DIS64-NEXT: 0000000000000026: R_TOC i2

‎llvm/test/CodeGen/PowerPC/toc-data-peephole-aligment.ll

Lines changed: 0 additions & 16 deletions
This file was deleted.

‎llvm/test/CodeGen/PowerPC/toc-data.ll

Lines changed: 26 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,16 @@
11
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s \
2-
; RUN: -stop-before=ppc-vsx-copy | FileCheck %s --check-prefixes=CHECK32,OPT32
2+
; RUN: -stop-before=ppc-vsx-copy | FileCheck %s --check-prefix CHECK32
33
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s \
44
; RUN: -stop-before=ppc-vsx-copy | FileCheck %s --check-prefix CHECK64
5-
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefixes=TEST32,ASMOPT32
6-
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefixes=TEST64,ASMOPT64
5+
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix TEST32
6+
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix TEST64
77

88
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s \
9-
; RUN: -stop-before=ppc-vsx-copy -O0 | FileCheck %s --check-prefixes=CHECK32,NOOPT32
9+
; RUN: -stop-before=ppc-vsx-copy -O0 | FileCheck %s --check-prefix CHECK32
1010
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s \
1111
; RUN: -stop-before=ppc-vsx-copy -O0 | FileCheck %s --check-prefix CHECK64-NOOPT
12-
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs -O0 < %s | FileCheck %s --check-prefixes=TEST32,ASMNOOPT32
13-
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs -O0 < %s | FileCheck %s --check-prefixes=TEST64,ASMNOOPT64
12+
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs -O0 < %s | FileCheck %s --check-prefix TEST32
13+
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs -O0 < %s | FileCheck %s --check-prefix TEST64
1414

1515
@i = dso_local global i32 0, align 4 #0
1616
@d = dso_local local_unnamed_addr global double 3.141590e+00, align 8
@@ -24,27 +24,26 @@ define dso_local void @write_int(i32 signext %in) {
2424
ret void
2525
}
2626
; CHECK32: name: write_int
27-
; NOOPT32: %[[SCRATCH:[0-9]+]]:gprc_and_gprc_nor0 = ADDItoc @i, $r2
28-
; NOOPT32-NEXT: STW %{{[0-9]+}}, 0, killed %[[SCRATCH]] :: (store (s32) into @i)
29-
; OPT32: STW %{{[0-9]+}}, @i, $r2 :: (store (s32) into @i)
27+
; CHECK32: %[[SCRATCH:[0-9]+]]:gprc_and_gprc_nor0 = ADDItoc @i, $r2
28+
; CHECK32-NEXT: STW %{{[0-9]+}}, 0, killed %[[SCRATCH]] :: (store (s32) into @i)
3029

3130
; TEST32: .write_int:
32-
; ASMNOOPT32: la 4, i[TD](2)
33-
; ASMNOOPT32-NEXT: stw 3, 0(4)
34-
; ASMOPT32: stw 3, i[TD](2)
31+
; TEST32: la 4, i[TD](2)
32+
; TEST32-NEXT: stw 3, 0(4)
3533

3634
; CHECK64: name: write_int
37-
; CHECK64: STW8 %{{[0-9]+}}, @i, $x2 :: (store (s32) into @i)
35+
; CHECK64: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2
36+
; CHECK64-NEXT: STW8 %{{[0-9]+}}, 0, killed %[[SCRATCH]] :: (store (s32) into @i)
3837

3938
; CHECK64-NOOPT: name: write_int
4039
; CHECK64-NOOPT: %[[SUBREG:[0-9]+]]:gprc = COPY %{{[0-9]}}.sub_32
4140
; CHECK64-NOOPT: %[[ADDR:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2 :: (load (s64) from got)
4241
; CHECK64-NOOPT: STW %[[SUBREG]], 0, killed %[[ADDR]] :: (store (s32) into @i)
4342

4443
; TEST64: .write_int:
45-
; ASMNOOPT64: la 4, i[TD](2)
46-
; ASMNOOPT64-NEXT: stw 3, 0(4)
47-
; ASMOPT64: stw 3, i[TD](2)
44+
; TEST64: la 4, i[TD](2)
45+
; TEST64-NEXT: stw 3, 0(4)
46+
4847

4948
define dso_local i64 @read_ll() {
5049
entry:
@@ -78,26 +77,25 @@ define dso_local float @read_float() {
7877
ret float %0
7978
}
8079
; CHECK32: name: read_float
81-
; NOOPT32: %[[SCRATCH:[0-9]+]]:gprc_and_gprc_nor0 = ADDItoc @f, $r2
82-
; NOOPT32: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]] :: (dereferenceable load (s32) from @f)
83-
; OPT32: %{{[0-9]+}}:f4rc = LFS @f, $r2 :: (dereferenceable load (s32) from @f)
80+
; CHECK32: %[[SCRATCH:[0-9]+]]:gprc_and_gprc_nor0 = ADDItoc @f, $r2
81+
; CHECK32: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]] :: (dereferenceable load (s32) from @f)
8482

85-
; TEST32: .read_float:
86-
; ASMNOOPT32: la 3, f[TD](2)
87-
; ASMNOOPT32-NEXT: lfs 1, 0(3)
88-
; ASMOPT32: lfs 1, f[TD](2)
83+
; TEST32: .read_float:
84+
; TEST32: la 3, f[TD](2)
85+
; TEST32-NEXT: lfs 1, 0(3)
8986

9087
; CHECK64: name: read_float
91-
; CHECK64: %{{[0-9]+}}:f4rc = LFS @f, $x2 :: (dereferenceable load (s32) from @f)
88+
; CHECK64: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @f, $x2
89+
; CHECK64: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]] :: (dereferenceable load (s32) from @f)
9290

9391
; CHECK64-NOOPT: name: read_float
9492
; CHECK64-NOOPT: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @f, $x2
9593
; CHECK64-NOOPT: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]]
9694

97-
; TEST64: .read_float:
98-
; ASMNOOPT64: la 3, f[TD](2)
99-
; ASMNOOPT64-NEXT: lfs 1, 0(3)
100-
; ASMOPT64: lfs 1, f[TD](2)
95+
; TEST64: .read_float:
96+
; TEST64: la 3, f[TD](2)
97+
; TEST64-NEXT: lfs 1, 0(3)
98+
10199

102100
define dso_local void @write_double(double %in) {
103101
entry:

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