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Commit 48f8910

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calebzulawskicalebzulawski
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Change as_slice to as_array
1 parent 558d86e commit 48f8910

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6 files changed

+21
-53
lines changed

6 files changed

+21
-53
lines changed

‎crates/core_simd/src/first.rs

Lines changed: 5 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,13 @@ macro_rules! impl_vector {
77
Self([value; LANES])
88
}
99

10-
/// Returns a slice containing the entire SIMD vector.
11-
pub const fn as_slice(&self) -> &[$type] {
10+
/// Returns an array reference containing the entire SIMD vector.
11+
pub const fn as_array(&self) -> &[$type; LANES] {
1212
&self.0
1313
}
1414

15-
/// Returns a mutable slice containing the entire SIMD vector.
16-
pub fn as_mut_slice(&mut self) -> &mut [$type] {
15+
/// Returns a mutable array reference containing the entire SIMD vector.
16+
pub fn as_mut_array(&mut self) -> &mut [$type; LANES] {
1717
&mut self.0
1818
}
1919

@@ -24,23 +24,7 @@ macro_rules! impl_vector {
2424

2525
/// Converts a SIMD vector to an array.
2626
pub const fn to_array(self) -> [$type; LANES] {
27-
// workaround for rust-lang/rust#80108
28-
// TODO fix this
29-
#[cfg(target_arch = "wasm32")]
30-
{
31-
let mut arr = [self.0[0]; LANES];
32-
let mut i = 0;
33-
while i < LANES {
34-
arr[i] = self.0[i];
35-
i += 1;
36-
}
37-
arr
38-
}
39-
40-
#[cfg(not(target_arch = "wasm32"))]
41-
{
42-
self.0
43-
}
27+
self.0
4428
}
4529
}
4630

‎crates/core_simd/src/ops.rs

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -331,7 +331,7 @@ macro_rules! impl_unsigned_int_ops {
331331

332332
#[inline]
333333
fn div(self, rhs: Self) -> Self::Output {
334-
if rhs.as_slice()
334+
if rhs.as_array()
335335
.iter()
336336
.any(|x| *x == 0)
337337
{
@@ -340,8 +340,8 @@ macro_rules! impl_unsigned_int_ops {
340340

341341
// Guards for div(MIN, -1),
342342
// this check only applies to signed ints
343-
if <$scalar>::MIN != 0 && self.as_slice().iter()
344-
.zip(rhs.as_slice().iter())
343+
if <$scalar>::MIN != 0 && self.as_array().iter()
344+
.zip(rhs.as_array().iter())
345345
.any(|(x,y)| *x == <$scalar>::MIN && *y == -1 as _) {
346346
panic!("attempt to divide with overflow");
347347
}
@@ -363,7 +363,7 @@ macro_rules! impl_unsigned_int_ops {
363363
panic!("attempt to divide by zero");
364364
}
365365
if <$scalar>::MIN != 0 &&
366-
self.as_slice().iter().any(|x| *x == <$scalar>::MIN) &&
366+
self.as_array().iter().any(|x| *x == <$scalar>::MIN) &&
367367
rhs == -1 as _ {
368368
panic!("attempt to divide with overflow");
369369
}
@@ -421,7 +421,7 @@ macro_rules! impl_unsigned_int_ops {
421421

422422
#[inline]
423423
fn rem(self, rhs: Self) -> Self::Output {
424-
if rhs.as_slice()
424+
if rhs.as_array()
425425
.iter()
426426
.any(|x| *x == 0)
427427
{
@@ -430,8 +430,8 @@ macro_rules! impl_unsigned_int_ops {
430430

431431
// Guards for rem(MIN, -1)
432432
// this branch applies the check only to signed ints
433-
if <$scalar>::MIN != 0 && self.as_slice().iter()
434-
.zip(rhs.as_slice().iter())
433+
if <$scalar>::MIN != 0 && self.as_array().iter()
434+
.zip(rhs.as_array().iter())
435435
.any(|(x,y)| *x == <$scalar>::MIN && *y == -1 as _) {
436436
panic!("attempt to calculate the remainder with overflow");
437437
}
@@ -453,7 +453,7 @@ macro_rules! impl_unsigned_int_ops {
453453
panic!("attempt to calculate the remainder with a divisor of zero");
454454
}
455455
if <$scalar>::MIN != 0 &&
456-
self.as_slice().iter().any(|x| *x == <$scalar>::MIN) &&
456+
self.as_array().iter().any(|x| *x == <$scalar>::MIN) &&
457457
rhs == -1 as _ {
458458
panic!("attempt to calculate the remainder with overflow");
459459
}
@@ -512,7 +512,7 @@ macro_rules! impl_unsigned_int_ops {
512512
#[inline]
513513
fn shl(self, rhs: Self) -> Self::Output {
514514
// TODO there is probably a better way of doing this
515-
if rhs.as_slice()
515+
if rhs.as_array()
516516
.iter()
517517
.copied()
518518
.any(invalid_shift_rhs)
@@ -577,7 +577,7 @@ macro_rules! impl_unsigned_int_ops {
577577
#[inline]
578578
fn shr(self, rhs: Self) -> Self::Output {
579579
// TODO there is probably a better way of doing this
580-
if rhs.as_slice()
580+
if rhs.as_array()
581581
.iter()
582582
.copied()
583583
.any(invalid_shift_rhs)

‎crates/core_simd/src/reduction.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ macro_rules! impl_float_reductions {
6464
pub fn horizontal_sum(self) -> $scalar {
6565
// LLVM sum is inaccurate on i586
6666
if cfg!(all(target_arch = "x86", not(target_feature = "sse2"))) {
67-
self.as_slice().iter().sum()
67+
self.as_array().iter().sum()
6868
} else {
6969
unsafe { crate::intrinsics::simd_reduce_add_ordered(self, 0.) }
7070
}
@@ -75,7 +75,7 @@ macro_rules! impl_float_reductions {
7575
pub fn horizontal_product(self) -> $scalar {
7676
// LLVM product is inaccurate on i586
7777
if cfg!(all(target_arch = "x86", not(target_feature = "sse2"))) {
78-
self.as_slice().iter().product()
78+
self.as_array().iter().product()
7979
} else {
8080
unsafe { crate::intrinsics::simd_reduce_mul_ordered(self, 1.) }
8181
}

‎crates/core_simd/src/vector/int.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ macro_rules! impl_integer_vector {
1212
#[inline]
1313
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
1414
// TODO use SIMD cmp
15-
self.to_array().cmp(other.as_ref())
15+
self.as_array().cmp(other.as_ref())
1616
}
1717
}
1818

@@ -22,7 +22,7 @@ macro_rules! impl_integer_vector {
2222
where
2323
H: core::hash::Hasher
2424
{
25-
self.as_slice().hash(state)
25+
self.as_array().hash(state)
2626
}
2727
}
2828

‎crates/core_simd/src/vector/mod.rs

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -30,12 +30,6 @@ pub trait Vector: sealed::Sealed {
3030
/// Generates a SIMD vector with the same value in every lane.
3131
#[must_use]
3232
fn splat(val: Self::Scalar) -> Self;
33-
34-
/// Returns a slice containing the entire SIMD vector.
35-
fn as_slice(&self) -> &[Self::Scalar];
36-
37-
/// Returns a mutable slice containing the entire SIMD vector.
38-
fn as_mut_slice(&mut self) -> &mut [Self::Scalar];
3933
}
4034

4135
macro_rules! impl_vector_for {
@@ -60,16 +54,6 @@ macro_rules! impl_vector_for {
6054
fn splat(val: Self::Scalar) -> Self {
6155
Self::splat(val)
6256
}
63-
64-
#[inline]
65-
fn as_slice(&self) -> &[Self::Scalar] {
66-
self.as_slice()
67-
}
68-
69-
#[inline]
70-
fn as_mut_slice(&mut self) -> &mut [Self::Scalar] {
71-
self.as_mut_slice()
72-
}
7357
}
7458
};
7559
}

‎crates/core_simd/src/vector/uint.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ macro_rules! impl_unsigned_vector {
1212
#[inline]
1313
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
1414
// TODO use SIMD cmp
15-
self.to_array().cmp(other.as_ref())
15+
self.as_array().cmp(other.as_ref())
1616
}
1717
}
1818

@@ -22,7 +22,7 @@ macro_rules! impl_unsigned_vector {
2222
where
2323
H: core::hash::Hasher
2424
{
25-
self.as_slice().hash(state)
25+
self.as_array().hash(state)
2626
}
2727
}
2828
}

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