Rename the masked_store family of functions to store_select

Author: farnoy

crates/core_simd/src/vector.rs

@@ -645,15 +645,15 @@ where
     /// let write = Simd::from_array([-5, -4, -3, -2]);
     /// let enable = Mask::from_array([false, true, true, true]);
     ///
-    /// write.masked_store(&mut arr[..3], enable);
+    /// write.store_select(&mut arr[..3], enable);
     /// assert_eq!(arr, [0, -4, -3, 0]);
     /// ```
     #[inline]
-    pub fn masked_store(self, slice: &mut [T], mut enable: Mask<<T as SimdElement>::Mask, N>) {
+    pub fn store_select(self, slice: &mut [T], mut enable: Mask<<T as SimdElement>::Mask, N>) {
         enable &= mask_up_to(slice.len());
         // SAFETY: We performed the bounds check by updating the mask. &[T] is properly aligned to
         // the element.
-        unsafe { self.masked_store_ptr(slice.as_mut_ptr(), enable) }
+        unsafe { self.store_select_ptr(slice.as_mut_ptr(), enable) }
     }
 
     /// Conditionally write contiguous elements to `slice`. The `enable` mask controls
@@ -673,18 +673,18 @@ where
     /// let write = Simd::from_array([-5, -4, -3, -2]);
     /// let enable = Mask::from_array([false, true, true, true]);
     ///
-    /// unsafe { write.masked_store_unchecked(&mut arr, enable) };
+    /// unsafe { write.store_select_unchecked(&mut arr, enable) };
     /// assert_eq!(arr, [0, -4, -3, -3]);
     /// ```
     #[inline]
-    pub unsafe fn masked_store_unchecked(
+    pub unsafe fn store_select_unchecked(
         self,
         slice: &mut [T],
         enable: Mask<<T as SimdElement>::Mask, N>,
     ) {
         let ptr = slice.as_mut_ptr();
         // SAFETY: The safety of writing elements in `slice` is ensured by the caller.
-        unsafe { self.masked_store_ptr(ptr, enable) }
+        unsafe { self.store_select_ptr(ptr, enable) }
     }
 
     /// Conditionally write contiguous elements starting from `ptr`.
@@ -696,7 +696,7 @@ where
     /// Memory addresses for element are calculated [`core::ptr::wrapping_offset`] and
     /// each enabled element must satisfy the same conditions as [`core::ptr::write`].
     #[inline]
-    pub unsafe fn masked_store_ptr(self, ptr: *mut T, enable: Mask<<T as SimdElement>::Mask, N>) {
+    pub unsafe fn store_select_ptr(self, ptr: *mut T, enable: Mask<<T as SimdElement>::Mask, N>) {
         // SAFETY: The safety of writing elements through `ptr` is ensured by the caller.
         unsafe { core::intrinsics::simd::simd_masked_store(enable.to_int(), ptr, self) }
     }

crates/core_simd/tests/masked_load_store.rs

@@ -12,11 +12,11 @@ wasm_bindgen_test_configure!(run_in_browser);
 fn masked_load_store() {
     let mut arr = [u8::MAX; 7];
 
-    u8x4::splat(0).masked_store(&mut arr[5..], Mask::from_array([false, true, false, true]));
+    u8x4::splat(0).store_select(&mut arr[5..], Mask::from_array([false, true, false, true]));
     // write to index 8 is OOB and dropped
     assert_eq!(arr, [255u8, 255, 255, 255, 255, 255, 0]);
 
-    u8x4::from_array([0, 1, 2, 3]).masked_store(&mut arr[1..], Mask::splat(true));
+    u8x4::from_array([0, 1, 2, 3]).store_select(&mut arr[1..], Mask::splat(true));
     assert_eq!(arr, [255u8, 0, 1, 2, 3, 255, 0]);
 
     // read from index 8 is OOB and dropped