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The Miri Cronjob Bot
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Merge from rustc
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‎Cargo.lock

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -469,9 +469,9 @@ version = "0.1.0"
469469

470470
[[package]]
471471
name = "cc"
472-
version = "1.0.79"
472+
version = "1.0.90"
473473
source = "registry+https://github.com/rust-lang/crates.io-index"
474-
checksum = "50d30906286121d95be3d479533b458f87493b30a4b5f79a607db8f5d11aa91f"
474+
checksum = "8cd6604a82acf3039f1144f54b8eb34e91ffba622051189e71b781822d5ee1f5"
475475

476476
[[package]]
477477
name = "cfg-if"

‎compiler/rustc_ast_lowering/src/lib.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -427,7 +427,7 @@ pub fn lower_to_hir(tcx: TyCtxt<'_>, (): ()) -> hir::Crate<'_> {
427427
tcx.ensure_with_value().early_lint_checks(());
428428
tcx.ensure_with_value().debugger_visualizers(LOCAL_CRATE);
429429
tcx.ensure_with_value().get_lang_items(());
430-
let (mut resolver, krate) = tcx.resolver_for_lowering(()).steal();
430+
let (mut resolver, krate) = tcx.resolver_for_lowering().steal();
431431

432432
let ast_index = index_crate(&resolver.node_id_to_def_id, &krate);
433433
let mut owners = IndexVec::from_fn_n(

‎compiler/rustc_ast_passes/src/ast_validation.rs

Lines changed: 30 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -929,35 +929,38 @@ impl<'a> Visitor<'a> for AstValidator<'a> {
929929
only_trait: only_trait.then_some(()),
930930
};
931931

932-
self.visibility_not_permitted(
933-
&item.vis,
934-
errors::VisibilityNotPermittedNote::IndividualImplItems,
935-
);
936-
if let &Unsafe::Yes(span) = unsafety {
937-
self.dcx().emit_err(errors::InherentImplCannotUnsafe {
938-
span: self_ty.span,
939-
annotation_span: span,
940-
annotation: "unsafe",
941-
self_ty: self_ty.span,
942-
});
943-
}
944-
if let &ImplPolarity::Negative(span) = polarity {
945-
self.dcx().emit_err(error(span, "negative", false));
946-
}
947-
if let &Defaultness::Default(def_span) = defaultness {
948-
self.dcx().emit_err(error(def_span, "`default`", true));
949-
}
950-
if let &Const::Yes(span) = constness {
951-
self.dcx().emit_err(error(span, "`const`", true));
952-
}
932+
self.with_in_trait_impl(None, |this| {
933+
this.visibility_not_permitted(
934+
&item.vis,
935+
errors::VisibilityNotPermittedNote::IndividualImplItems,
936+
);
937+
if let &Unsafe::Yes(span) = unsafety {
938+
this.dcx().emit_err(errors::InherentImplCannotUnsafe {
939+
span: self_ty.span,
940+
annotation_span: span,
941+
annotation: "unsafe",
942+
self_ty: self_ty.span,
943+
});
944+
}
945+
if let &ImplPolarity::Negative(span) = polarity {
946+
this.dcx().emit_err(error(span, "negative", false));
947+
}
948+
if let &Defaultness::Default(def_span) = defaultness {
949+
this.dcx().emit_err(error(def_span, "`default`", true));
950+
}
951+
if let &Const::Yes(span) = constness {
952+
this.dcx().emit_err(error(span, "`const`", true));
953+
}
953954

954-
self.visit_vis(&item.vis);
955-
self.visit_ident(item.ident);
956-
self.with_tilde_const(Some(DisallowTildeConstContext::Impl(item.span)), |this| {
957-
this.visit_generics(generics)
955+
this.visit_vis(&item.vis);
956+
this.visit_ident(item.ident);
957+
this.with_tilde_const(
958+
Some(DisallowTildeConstContext::Impl(item.span)),
959+
|this| this.visit_generics(generics),
960+
);
961+
this.visit_ty(self_ty);
962+
walk_list!(this, visit_assoc_item, items, AssocCtxt::Impl);
958963
});
959-
self.visit_ty(self_ty);
960-
walk_list!(self, visit_assoc_item, items, AssocCtxt::Impl);
961964
walk_list!(self, visit_attribute, &item.attrs);
962965
return; // Avoid visiting again.
963966
}

‎compiler/rustc_ast_passes/src/feature_gate.rs

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -206,14 +206,6 @@ impl<'a> Visitor<'a> for PostExpansionVisitor<'a> {
206206
);
207207
}
208208
}
209-
if !attr.is_doc_comment()
210-
&& let [seg, _] = attr.get_normal_item().path.segments.as_slice()
211-
&& seg.ident.name == sym::diagnostic
212-
&& !self.features.diagnostic_namespace
213-
{
214-
let msg = "`#[diagnostic]` attribute name space is experimental";
215-
gate!(self, diagnostic_namespace, seg.ident.span, msg);
216-
}
217209

218210
// Emit errors for non-staged-api crates.
219211
if !self.features.staged_api {

‎compiler/rustc_codegen_llvm/src/back/archive.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@ fn llvm_machine_type(cpu: &str) -> LLVMMachineType {
5555
"x86_64" => LLVMMachineType::AMD64,
5656
"x86" => LLVMMachineType::I386,
5757
"aarch64" => LLVMMachineType::ARM64,
58+
"arm64ec" => LLVMMachineType::ARM64EC,
5859
"arm" => LLVMMachineType::ARM,
5960
_ => panic!("unsupported cpu type {cpu}"),
6061
}

‎compiler/rustc_codegen_llvm/src/llvm/ffi.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@ pub enum LLVMMachineType {
5656
AMD64 = 0x8664,
5757
I386 = 0x14c,
5858
ARM64 = 0xaa64,
59+
ARM64EC = 0xa641,
5960
ARM = 0x01c0,
6061
}
6162

‎compiler/rustc_codegen_llvm/src/llvm_util.rs

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -201,7 +201,13 @@ impl<'a> IntoIterator for LLVMFeature<'a> {
201201
// which might lead to failures if the oldest tested / supported LLVM version
202202
// doesn't yet support the relevant intrinsics
203203
pub fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> LLVMFeature<'a> {
204-
let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
204+
let arch = if sess.target.arch == "x86_64" {
205+
"x86"
206+
} else if sess.target.arch == "arm64ec" {
207+
"aarch64"
208+
} else {
209+
&*sess.target.arch
210+
};
205211
match (arch, s) {
206212
("x86", "sse4.2") => {
207213
LLVMFeature::with_dependency("sse4.2", TargetFeatureFoldStrength::EnableOnly("crc32"))

‎compiler/rustc_codegen_llvm/src/va_arg.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -288,7 +288,7 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
288288
// Generic x86
289289
"x86" => emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(4).unwrap(), true),
290290
// Windows AArch64
291-
"aarch64" if target.is_like_windows => {
291+
"aarch64" | "arm64ec" if target.is_like_windows => {
292292
emit_ptr_va_arg(bx, addr, target_ty, false, Align::from_bytes(8).unwrap(), false)
293293
}
294294
// macOS / iOS AArch64

‎compiler/rustc_codegen_ssa/Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ edition = "2021"
77
# tidy-alphabetical-start
88
ar_archive_writer = "0.1.5"
99
bitflags = "2.4.1"
10-
cc = "1.0.69"
10+
cc = "1.0.90"
1111
itertools = "0.11"
1212
jobserver = "0.1.28"
1313
pathdiff = "0.2.0"

‎compiler/rustc_codegen_ssa/src/back/metadata.rs

Lines changed: 29 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ use std::path::Path;
88
use object::write::{self, StandardSegment, Symbol, SymbolSection};
99
use object::{
1010
elf, pe, xcoff, Architecture, BinaryFormat, Endianness, FileFlags, Object, ObjectSection,
11-
ObjectSymbol, SectionFlags, SectionKind, SymbolFlags, SymbolKind, SymbolScope,
11+
ObjectSymbol, SectionFlags, SectionKind, SubArchitecture, SymbolFlags, SymbolKind, SymbolScope,
1212
};
1313

1414
use rustc_data_structures::memmap::Mmap;
@@ -182,37 +182,40 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
182182
Endian::Little => Endianness::Little,
183183
Endian::Big => Endianness::Big,
184184
};
185-
let architecture = match &sess.target.arch[..] {
186-
"arm" => Architecture::Arm,
187-
"aarch64" => {
185+
let (architecture, sub_architecture) = match &sess.target.arch[..] {
186+
"arm" => (Architecture::Arm, None),
187+
"aarch64" => (
188188
if sess.target.pointer_width == 32 {
189189
Architecture::Aarch64_Ilp32
190190
} else {
191191
Architecture::Aarch64
192-
}
193-
}
194-
"x86" => Architecture::I386,
195-
"s390x" => Architecture::S390x,
196-
"mips" | "mips32r6" => Architecture::Mips,
197-
"mips64" | "mips64r6" => Architecture::Mips64,
198-
"x86_64" => {
192+
},
193+
None,
194+
),
195+
"x86" => (Architecture::I386, None),
196+
"s390x" => (Architecture::S390x, None),
197+
"mips" | "mips32r6" => (Architecture::Mips, None),
198+
"mips64" | "mips64r6" => (Architecture::Mips64, None),
199+
"x86_64" => (
199200
if sess.target.pointer_width == 32 {
200201
Architecture::X86_64_X32
201202
} else {
202203
Architecture::X86_64
203-
}
204-
}
205-
"powerpc" => Architecture::PowerPc,
206-
"powerpc64" => Architecture::PowerPc64,
207-
"riscv32" => Architecture::Riscv32,
208-
"riscv64" => Architecture::Riscv64,
209-
"sparc64" => Architecture::Sparc64,
210-
"avr" => Architecture::Avr,
211-
"msp430" => Architecture::Msp430,
212-
"hexagon" => Architecture::Hexagon,
213-
"bpf" => Architecture::Bpf,
214-
"loongarch64" => Architecture::LoongArch64,
215-
"csky" => Architecture::Csky,
204+
},
205+
None,
206+
),
207+
"powerpc" => (Architecture::PowerPc, None),
208+
"powerpc64" => (Architecture::PowerPc64, None),
209+
"riscv32" => (Architecture::Riscv32, None),
210+
"riscv64" => (Architecture::Riscv64, None),
211+
"sparc64" => (Architecture::Sparc64, None),
212+
"avr" => (Architecture::Avr, None),
213+
"msp430" => (Architecture::Msp430, None),
214+
"hexagon" => (Architecture::Hexagon, None),
215+
"bpf" => (Architecture::Bpf, None),
216+
"loongarch64" => (Architecture::LoongArch64, None),
217+
"csky" => (Architecture::Csky, None),
218+
"arm64ec" => (Architecture::Aarch64, Some(SubArchitecture::Arm64EC)),
216219
// Unsupported architecture.
217220
_ => return None,
218221
};
@@ -227,6 +230,7 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
227230
};
228231

229232
let mut file = write::Object::new(binary_format, architecture, endianness);
233+
file.set_sub_architecture(sub_architecture);
230234
if sess.target.is_like_osx {
231235
if macho_is_arm64e(&sess.target) {
232236
file.set_macho_cpu_subtype(object::macho::CPU_SUBTYPE_ARM64E);
@@ -335,7 +339,7 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
335339
"ilp32s" | "lp64s" => e_flags |= elf::EF_LARCH_ABI_SOFT_FLOAT,
336340
"ilp32f" | "lp64f" => e_flags |= elf::EF_LARCH_ABI_SINGLE_FLOAT,
337341
"ilp32d" | "lp64d" => e_flags |= elf::EF_LARCH_ABI_DOUBLE_FLOAT,
338-
_ => bug!("unknown RISC-V ABI name"),
342+
_ => bug!("unknown LoongArch ABI name"),
339343
}
340344

341345
e_flags

‎compiler/rustc_codegen_ssa/src/back/symbol_export.rs

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -567,9 +567,10 @@ pub fn linking_symbol_name_for_instance_in_crate<'tcx>(
567567
return undecorated;
568568
}
569569

570-
let x86 = match &target.arch[..] {
571-
"x86" => true,
572-
"x86_64" => false,
570+
let prefix = match &target.arch[..] {
571+
"x86" => Some('_'),
572+
"x86_64" => None,
573+
"arm64ec" => Some('#'),
573574
// Only x86/64 use symbol decorations.
574575
_ => return undecorated,
575576
};
@@ -606,8 +607,8 @@ pub fn linking_symbol_name_for_instance_in_crate<'tcx>(
606607
Conv::X86Stdcall => ("_", "@"),
607608
Conv::X86VectorCall => ("", "@@"),
608609
_ => {
609-
if x86 {
610-
undecorated.insert(0, '_');
610+
if let Some(prefix) = prefix {
611+
undecorated.insert(0, prefix);
611612
}
612613
return undecorated;
613614
}

‎compiler/rustc_codegen_ssa/src/base.rs

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -907,7 +907,11 @@ impl CrateInfo {
907907
lang_items::required(tcx, l).then_some(name)
908908
})
909909
.collect();
910-
let prefix = if target.is_like_windows && target.arch == "x86" { "_" } else { "" };
910+
let prefix = match (target.is_like_windows, target.arch.as_ref()) {
911+
(true, "x86") => "_",
912+
(true, "arm64ec") => "#",
913+
_ => "",
914+
};
911915

912916
// This loop only adds new items to values of the hash map, so the order in which we
913917
// iterate over the values is not important.

‎compiler/rustc_codegen_ssa/src/mir/place.rs

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -104,10 +104,6 @@ impl<'a, 'tcx, V: CodegenObject> PlaceRef<'tcx, V> {
104104
let mut simple = || {
105105
let llval = if offset.bytes() == 0 {
106106
self.llval
107-
} else if field.is_zst() {
108-
// FIXME(erikdesjardins): it should be fine to use inbounds for ZSTs too;
109-
// keeping this logic for now to preserve previous behavior.
110-
bx.ptradd(self.llval, bx.const_usize(offset.bytes()))
111107
} else {
112108
bx.inbounds_ptradd(self.llval, bx.const_usize(offset.bytes()))
113109
};
@@ -168,8 +164,7 @@ impl<'a, 'tcx, V: CodegenObject> PlaceRef<'tcx, V> {
168164
debug!("struct_field_ptr: DST field offset: {:?}", offset);
169165

170166
// Adjust pointer.
171-
// FIXME(erikdesjardins): should be able to use inbounds here too.
172-
let ptr = bx.ptradd(self.llval, offset);
167+
let ptr = bx.inbounds_ptradd(self.llval, offset);
173168

174169
PlaceRef { llval: ptr, llextra: self.llextra, layout: field, align: effective_field_align }
175170
}

‎compiler/rustc_const_eval/src/const_eval/machine.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ use crate::errors::{LongRunning, LongRunningWarn};
2424
use crate::fluent_generated as fluent;
2525
use crate::interpret::{
2626
self, compile_time_machine, AllocId, AllocRange, ConstAllocation, CtfeProvenance, FnArg, FnVal,
27-
Frame, ImmTy, InterpCx, InterpResult, OpTy, PlaceTy, Pointer, PointerArithmetic, Scalar,
27+
Frame, ImmTy, InterpCx, InterpResult, MPlaceTy, OpTy, Pointer, PointerArithmetic, Scalar,
2828
};
2929

3030
use super::error::*;
@@ -219,7 +219,7 @@ impl<'mir, 'tcx: 'mir> CompileTimeEvalContext<'mir, 'tcx> {
219219
&mut self,
220220
instance: ty::Instance<'tcx>,
221221
args: &[FnArg<'tcx>],
222-
dest: &PlaceTy<'tcx>,
222+
dest: &MPlaceTy<'tcx>,
223223
ret: Option<mir::BasicBlock>,
224224
) -> InterpResult<'tcx, Option<ty::Instance<'tcx>>> {
225225
let def_id = instance.def_id();
@@ -280,7 +280,7 @@ impl<'mir, 'tcx: 'mir> CompileTimeEvalContext<'mir, 'tcx> {
280280
&mut self,
281281
instance: ty::Instance<'tcx>,
282282
args: &[OpTy<'tcx>],
283-
dest: &PlaceTy<'tcx>,
283+
dest: &MPlaceTy<'tcx>,
284284
ret: Option<mir::BasicBlock>,
285285
) -> InterpResult<'tcx, ControlFlow<()>> {
286286
assert_eq!(args.len(), 2);
@@ -410,7 +410,7 @@ impl<'mir, 'tcx> interpret::Machine<'mir, 'tcx> for CompileTimeInterpreter<'mir,
410410
orig_instance: ty::Instance<'tcx>,
411411
_abi: CallAbi,
412412
args: &[FnArg<'tcx>],
413-
dest: &PlaceTy<'tcx>,
413+
dest: &MPlaceTy<'tcx>,
414414
ret: Option<mir::BasicBlock>,
415415
_unwind: mir::UnwindAction, // unwinding is not supported in consts
416416
) -> InterpResult<'tcx, Option<(&'mir mir::Body<'tcx>, ty::Instance<'tcx>)>> {
@@ -455,7 +455,7 @@ impl<'mir, 'tcx> interpret::Machine<'mir, 'tcx> for CompileTimeInterpreter<'mir,
455455
ecx: &mut InterpCx<'mir, 'tcx, Self>,
456456
instance: ty::Instance<'tcx>,
457457
args: &[OpTy<'tcx>],
458-
dest: &PlaceTy<'tcx, Self::Provenance>,
458+
dest: &MPlaceTy<'tcx, Self::Provenance>,
459459
target: Option<mir::BasicBlock>,
460460
_unwind: mir::UnwindAction,
461461
) -> InterpResult<'tcx> {

‎compiler/rustc_const_eval/src/interpret/eval_context.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -108,7 +108,7 @@ pub struct Frame<'mir, 'tcx, Prov: Provenance = CtfeProvenance, Extra = ()> {
108108

109109
/// The location where the result of the current stack frame should be written to,
110110
/// and its layout in the caller.
111-
pub return_place: PlaceTy<'tcx, Prov>,
111+
pub return_place: MPlaceTy<'tcx, Prov>,
112112

113113
/// The list of locals for this stack frame, stored in order as
114114
/// `[return_ptr, arguments..., variables..., temporaries...]`.
@@ -771,7 +771,7 @@ impl<'mir, 'tcx: 'mir, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
771771
&mut self,
772772
instance: ty::Instance<'tcx>,
773773
body: &'mir mir::Body<'tcx>,
774-
return_place: &PlaceTy<'tcx, M::Provenance>,
774+
return_place: &MPlaceTy<'tcx, M::Provenance>,
775775
return_to_block: StackPopCleanup,
776776
) -> InterpResult<'tcx> {
777777
trace!("body: {:#?}", body);
@@ -912,7 +912,7 @@ impl<'mir, 'tcx: 'mir, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
912912
} else {
913913
self.copy_op_allow_transmute(&op, &dest)
914914
};
915-
trace!("return value: {:?}", self.dump_place(&dest));
915+
trace!("return value: {:?}", self.dump_place(&dest.into()));
916916
// We delay actually short-circuiting on this error until *after* the stack frame is
917917
// popped, since we want this error to be attributed to the caller, whose type defines
918918
// this transmute.

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