@@ -137,6 +137,8 @@ pub enum Event {
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// /// [`Serial::set_wakeup_from_stopmode_reason()`]
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// #[doc(alias = "WUF")]
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// WakeupFromStopMode,
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+ /// Any of the above events occurred
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+ Any ,
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}
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/// Serial error
@@ -490,7 +492,8 @@ where
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self . configure_interrupt ( event, Switch :: Off ) ;
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}
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- /// Enable or disable the interrupt for the specified [`Event`].
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+ /// Enable or disable the interrupt for the specified [`Event`], if passing [`Event::Any`]
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+ /// , it will be apply to all events.
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#[ inline]
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pub fn configure_interrupt ( & mut self , event : Event , enable : impl Into < Switch > ) {
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// Do a round way trip to be convert Into<Switch> -> bool
@@ -513,7 +516,28 @@ where
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Event :: ReceiverTimeout => self . usart . cr1 . modify ( |_, w| w. rtoie ( ) . bit ( enable) ) ,
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// Event::EndOfBlock => self.usart.cr1.modify(|_, w| w.eobie().bit(enable)),
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// Event::WakeupFromStopMode => self.usart.cr3.modify(|_, w| w.wufie().bit(enable)),
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+ Event :: Any => {
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+ self . usart . cr1 . modify ( |_, w| {
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+ w. txeie ( ) . bit ( enable) ;
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+ w. tcie ( ) . bit ( enable) ;
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+ w. rxneie ( ) . bit ( enable) ;
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+ w. peie ( ) . bit ( enable) ;
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+ w. idleie ( ) . bit ( enable) ;
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+ w. cmie ( ) . bit ( enable) ;
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+ w. rtoie ( ) . bit ( enable)
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+ // w.eobie().bit(enable);
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+ } ) ;
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+ self . usart . cr2 . modify ( |_, w| {
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+ w. lbdie ( ) . bit ( enable)
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+ } ) ;
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+ self . usart . cr3 . modify ( |_, w| {
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+ w. ctsie ( ) . bit ( enable) ;
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+ w. eie ( ) . bit ( enable)
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+ // w.wufie().bit(enable);
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+ } )
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+ }
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} ;
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+
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}
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/// Enable or disable interrupt for the specified [`Event`]s.
@@ -640,6 +664,21 @@ where
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// Do nothing with this event (only useful for Smartcard, which is not
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// supported right now)
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Event :: TransmitDataRegisterEmtpy => w,
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+ Event :: Any => {
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+ w. ctscf ( ) . clear ( ) ;
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+ w. tccf ( ) . clear ( ) ;
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+ w. orecf ( ) . clear ( ) ;
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+ w. idlecf ( ) . clear ( ) ;
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+ w. pecf ( ) . clear ( ) ;
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+ w. pecf ( ) . clear ( ) ;
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+ w. lbdcf ( ) . clear ( ) ;
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+ w. ncf ( ) . clear ( ) ;
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+ w. fecf ( ) . clear ( ) ;
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+ w. cmcf ( ) . clear ( ) ;
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+ w. rtocf ( ) . clear ( ) ;
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+ self . usart . rqr . write ( |w| w. rxfrq ( ) . set_bit ( ) ) ;
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+ w
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+ }
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} ) ;
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}
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