Fix most GPIO compilation errors

This commit switches to the current nightly version of the stm32f3 PAC
to make use of the fixes regarding the F3 GPIO peripherals.

We also need to adjust the codegen of the GPIO pin mappings a bit to
account for the fact that the F373 GPIO is still special in that the PAC
contains an additional `gpiod` module for it.

Author: teskje

Cargo.toml

@@ -1,6 +1,9 @@
 [package]
 edition = "2018"
-authors = ["Jorge Aparicio <[email protected]>", "Dylan Frankland <[email protected]>"]
+authors = [
+    "Jorge Aparicio <[email protected]>",
+    "Dylan Frankland <[email protected]>",
+]
 categories = ["embedded", "hardware-support", "no-std"]
 description = "Peripheral access API for STM32F3 series microcontrollers"
 keywords = ["arm", "cortex-m", "stm32f3xx", "hal"]
@@ -22,7 +25,7 @@ cortex-m-rt = "0.6"
 embedded-hal = "0.2"
 nb = "0.1"
 paste = "1"
-stm32f3 = "0.11"
+stm32f3 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies" }
 
 [dependencies.bare-metal]
 version = "0.2"

codegen/src/codegen/gpio.rs

@@ -22,7 +22,7 @@ fn gen_gpio_ip(ip: &gpio::Ip) -> Result<()> {
     let ports = merge_pins_by_port(&ip.pins)?;
 
     println!(r#"#[cfg(feature = "{}")]"#, feature);
-    gen_gpio_macro_call(&ports)?;
+    gen_gpio_macro_call(&ports, &feature)?;
     Ok(())
 }
 
@@ -59,17 +59,17 @@ fn merge_pins_by_port(pins: &[gpio::Pin]) -> Result<Vec<Port>> {
     Ok(ports)
 }
 
-fn gen_gpio_macro_call(ports: &[Port]) -> Result<()> {
+fn gen_gpio_macro_call(ports: &[Port], feature: &str) -> Result<()> {
     println!("gpio!([");
     for port in ports {
-        gen_port(port)?;
+        gen_port(port, feature)?;
     }
     println!("]);");
     Ok(())
 }
 
-fn gen_port(port: &Port) -> Result<()> {
-    let pac_module = get_port_pac_module(port);
+fn gen_port(port: &Port, feature: &str) -> Result<()> {
+    let pac_module = get_port_pac_module(port, feature);
 
     println!("    {{");
     println!(
@@ -89,12 +89,13 @@ fn gen_port(port: &Port) -> Result<()> {
     Ok(())
 }
 
-fn get_port_pac_module(port: &Port) -> &'static str {
+fn get_port_pac_module(port: &Port, feature: &str) -> &'static str {
     // The registers in ports A and B have different reset values due to the
     // presence of debug pins, so they get dedicated PAC modules.
     match port.id {
         'A' => "gpioa",
         'B' => "gpiob",
+        'D' if feature == "gpio-f373" => "gpiod",
         _ => "gpioc",
     }
 }

src/gpio.rs

@@ -1175,7 +1175,7 @@ gpio!([
         ],
     },
     {
-        port: (D/d, pac: gpioc),
+        port: (D/d, pac: gpiod),
         pins: [
             0 => { reset: Input<Floating>, afr: L/l, af: [1, 2, 7] },
             1 => { reset: Input<Floating>, afr: L/l, af: [1, 2, 7] },