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usbalbinusbalbin
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Reduce amount of unsafe code for setting bits
1 parent 677f07a commit c813ea1

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9 files changed

+101
-147
lines changed

9 files changed

+101
-147
lines changed

‎src/adc.rs

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -937,11 +937,9 @@ where
937937
});
938938

939939
if let config::ConversionMode::Discontinuous(n) = conversion_mode {
940-
unsafe {
941-
self.reg
942-
.cfgr()
943-
.modify(|_, w| w.discnum().bits(if n < 0b111 { n } else { 0b111 }));
944-
}
940+
self.reg
941+
.cfgr()
942+
.modify(|_, w| w.discnum().set(if n < 0b111 { n } else { 0b111 }));
945943
}
946944
}
947945

@@ -1101,9 +1099,7 @@ where
11011099
/// the end of a single conversion of a "slot" is notfied via [`Event::EndOfConversion`].
11021100
#[inline]
11031101
pub fn set_sequence_length(&mut self, sequence: config::Sequence) {
1104-
unsafe {
1105-
self.reg.sqr1().modify(|_, w| w.l().bits(sequence.into()));
1106-
}
1102+
self.reg.sqr1().modify(|_, w| w.l().set(sequence.into()));
11071103
}
11081104

11091105
// TODO(Sh3Rm4n): Implement, when injection mode is implemented.

‎src/dac.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ impl Dac {
3232
// SAFETY: Direct write to register for easier sharing between different stm32f3xx svd
3333
// generated API
3434
unsafe {
35-
w.dacc1dhr().bits(data)
35+
w.dacc1dhr().set(data)
3636
}
3737
});
3838
}

‎src/gpio.rs

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -753,30 +753,37 @@ macro_rules! gpio_trait {
753753
impl GpioRegExt for crate::pac::$gpioy::RegisterBlock {
754754
#[inline(always)]
755755
fn is_low(&self, i: u8) -> bool {
756-
self.idr().read().bits() & (1 << i) == 0
756+
self.idr().read().idr(i).is_low()
757757
}
758758

759759
#[inline(always)]
760760
fn is_set_low(&self, i: u8) -> bool {
761-
self.odr().read().bits() & (1 << i) == 0
761+
self.odr().read().odr(i).is_low()
762762
}
763763

764764
#[inline(always)]
765765
fn set_high(&self, i: u8) {
766766
// SAFETY: atomic write to a stateless register
767-
unsafe { self.bsrr().write(|w| w.bits(1 << i)) };
767+
self.bsrr().write(|w| w.bs(i).set_bit());
768768
}
769769

770770
#[inline(always)]
771771
fn set_low(&self, i: u8) {
772772
// SAFETY: atomic write to a stateless register
773-
unsafe { self.bsrr().write(|w| w.bits(1 << (16 + i))) };
773+
self.bsrr().write(|w| w.br(i).set_bit());
774774
}
775775
}
776776
)+
777777
};
778778
}
779779

780+
fn foo(x: crate::pac::gpioa::RegisterBlock, n: u8) {
781+
x.bsrr().write(|w| w.br(n).set_bit());
782+
x.odr().read().odr(n).is_low();
783+
784+
}
785+
786+
780787
/// Implement `private::{Moder, Ospeedr, Otyper, Pupdr}` traits for each opaque register structs
781788
macro_rules! r_trait {
782789
(

‎src/i2c.rs

Lines changed: 26 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -190,20 +190,18 @@ impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
190190

191191
// Configure for "fast mode" (400 KHz)
192192
// NOTE(write): writes all non-reserved bits.
193-
unsafe {
194-
i2c.timingr().write(|w| {
195-
w.presc()
196-
.bits(crate::unwrap!(u8::try_from(presc)))
197-
.sdadel()
198-
.bits(crate::unwrap!(u8::try_from(sdadel)))
199-
.scldel()
200-
.bits(crate::unwrap!(u8::try_from(scldel)))
201-
.scll()
202-
.bits(scl_low)
203-
.sclh()
204-
.bits(scl_high)
205-
});
206-
}
193+
i2c.timingr().write(|w| {
194+
w.presc()
195+
.set(crate::unwrap!(u8::try_from(presc)))
196+
.sdadel()
197+
.set(crate::unwrap!(u8::try_from(sdadel)))
198+
.scldel()
199+
.set(crate::unwrap!(u8::try_from(scldel)))
200+
.scll()
201+
.set(scl_low)
202+
.sclh()
203+
.set(scl_high)
204+
});
207205

208206
// Enable the peripheral
209207
i2c.cr1().modify(|_, w| w.pe().set_bit());
@@ -252,16 +250,11 @@ where
252250
self.i2c.cr2().modify(|_, w| {
253251
if i == 0 {
254252
w.add10().bit7();
255-
unsafe {
256-
w.sadd()
257-
.bits(u16::from(crate::unwrap!(addr.checked_shl(1))));
258-
}
253+
w.sadd().set(u16::from(crate::unwrap!(addr.checked_shl(1))));
259254
w.rd_wrn().read();
260255
w.start().start();
261256
}
262-
unsafe {
263-
w.nbytes().bits(crate::unwrap!(u8::try_from(buffer.len())));
264-
}
257+
w.nbytes().set(crate::unwrap!(u8::try_from(buffer.len())));
265258
if i == end {
266259
w.reload().completed().autoend().automatic()
267260
} else {
@@ -308,14 +301,9 @@ where
308301
// 0 byte write
309302
self.i2c.cr2().modify(|_, w| {
310303
w.add10().bit7();
311-
unsafe {
312-
w.sadd()
313-
.bits(u16::from(crate::unwrap!(addr.checked_shl(1))));
314-
}
304+
w.sadd().set(u16::from(crate::unwrap!(addr.checked_shl(1))));
315305
w.rd_wrn().write();
316-
unsafe {
317-
w.nbytes().bits(0);
318-
}
306+
w.nbytes().set(0);
319307
w.reload().completed();
320308
w.autoend().automatic();
321309
w.start().start()
@@ -329,16 +317,11 @@ where
329317
self.i2c.cr2().modify(|_, w| {
330318
if i == 0 {
331319
w.add10().bit7();
332-
unsafe {
333-
w.sadd()
334-
.bits(u16::from(crate::unwrap!(addr.checked_shl(1))));
335-
}
320+
w.sadd().set(u16::from(crate::unwrap!(addr.checked_shl(1))));
336321
w.rd_wrn().write();
337322
w.start().start();
338323
}
339-
unsafe {
340-
w.nbytes().bits(crate::unwrap!(u8::try_from(bytes.len())));
341-
}
324+
w.nbytes().set(crate::unwrap!(u8::try_from(bytes.len())));
342325
if i == end {
343326
w.reload().completed().autoend().automatic()
344327
} else {
@@ -353,9 +336,7 @@ where
353336

354337
// Put byte on the wire
355338
// NOTE(write): Writes all non-reserved bits.
356-
unsafe {
357-
self.i2c.txdr().write(|w| w.txdata().bits(*byte));
358-
}
339+
self.i2c.txdr().write(|w| w.txdata().set(*byte));
359340
}
360341

361342
if i != end {
@@ -397,16 +378,12 @@ where
397378
self.i2c.cr2().modify(|_, w| {
398379
if i == 0 {
399380
w.add10().bit7();
400-
unsafe {
401-
w.sadd()
402-
.bits(u16::from(crate::unwrap!(addr.checked_shl(1))));
403-
}
381+
w.sadd()
382+
.set(u16::from(crate::unwrap!(addr.checked_shl(1))));
404383
w.rd_wrn().write();
405384
w.start().start();
406385
}
407-
unsafe {
408-
w.nbytes().bits(crate::unwrap!(u8::try_from(bytes.len())));
409-
}
386+
w.nbytes().set(crate::unwrap!(u8::try_from(bytes.len())));
410387
if i == end {
411388
w.reload().completed().autoend().software()
412389
} else {
@@ -421,9 +398,7 @@ where
421398

422399
// Put byte on the wire
423400
// NOTE(write): Writes all non-reserved bits.
424-
unsafe {
425-
self.i2c.txdr().write(|w| w.txdata().bits(*byte));
426-
}
401+
self.i2c.txdr().write(|w| w.txdata().set(*byte));
427402
}
428403

429404
if i != end {
@@ -445,16 +420,12 @@ where
445420
self.i2c.cr2().modify(|_, w| {
446421
if i == 0 {
447422
w.add10().bit7();
448-
unsafe {
449-
w.sadd()
450-
.bits(u16::from(crate::unwrap!(addr.checked_shl(1))));
451-
}
423+
w.sadd()
424+
.set(u16::from(crate::unwrap!(addr.checked_shl(1))));
452425
w.rd_wrn().read();
453426
w.start().start();
454427
}
455-
unsafe {
456-
w.nbytes().bits(crate::unwrap!(u8::try_from(buffer.len())));
457-
}
428+
w.nbytes().set(crate::unwrap!(u8::try_from(buffer.len())));
458429
if i == end {
459430
w.reload().completed().autoend().automatic()
460431
} else {

‎src/pwm.rs

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -317,9 +317,7 @@ macro_rules! pwm_timer_private {
317317
let clock_freq = clocks.$pclkz().0 * if clocks.ppre1() == 1 { 1 } else { 2 };
318318
let prescale_factor = clock_freq / res as u32 / freq.integer();
319319
// NOTE(write): uses all bits of this register.
320-
unsafe {
321-
tim.psc().write(|w| w.psc().bits(prescale_factor as u16 - 1));
322-
}
320+
tim.psc().write(|w| w.psc().set(prescale_factor as u16 - 1));
323321

324322
// Make the settings reload immediately
325323
// NOTE(write): write to a state-less register.

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