Skip to content

Commit cc6fc30

Browse files
committed
DMA impl improvements
1. Wrap the TX transfer struct in a helper type which also checks whether the TC IRQ flag was set. This is strongly recommended in the datasheet 2. Basic refactoring to prepare allowing checks of events for both the split Tx and Rx handle
1 parent b0cead1 commit cc6fc30

File tree

3 files changed

+470
-21
lines changed

3 files changed

+470
-21
lines changed

CHANGELOG.md

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,24 @@ No changes.
6868
### Changed
6969

7070
- The MSRV was bumped to 1.59 ([#340])
71+
### Changed
72+
73+
- serial: The DMA functions `write_all` and `read_exact` now returns
74+
the wrapper structs `SerialDmaTx` and `SerialDmaRx` instead of the direct
75+
DMA transfer struct. These allow checking the USART ISR events
76+
with `is_event_triggered` as well.
77+
78+
### Fixed
79+
80+
- serial: The previous DMA `write_all` implementation did use the DMA transfer completion
81+
event to check for transfer completion, but MCU datasheet specifies that the TC
82+
flag of the USART peripheral should be checked for transfer completion to avoid
83+
corruption of the last transfer. This is now done by the new `SerialDmaTx` wrapper.
84+
85+
## Added
86+
87+
- serial: Public `is_event_triggered` method which allows to check for events
88+
given an event and a USART reference.
7189

7290
## [v0.9.1] - 2022-09-07
7391

src/dma.rs

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -172,6 +172,11 @@ impl<B, C: Channel, T: Target> Transfer<B, C, T> {
172172

173173
self.stop()
174174
}
175+
176+
pub(crate) fn target(&self) -> &T {
177+
let inner = crate::unwrap!(self.inner.as_ref());
178+
&inner.target
179+
}
175180
}
176181

177182
impl<B, C: Channel, T: Target> Drop for Transfer<B, C, T> {

0 commit comments

Comments
 (0)