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update can configuration
1 parent 2ad1dae commit d4b3ccd

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src/can.rs

+22-3
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
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//!
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use crate::bb;
5+
#[cfg(any(feature = "stm32f405", feature = "stm32f407"))]
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use crate::gpio::{
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gpioa::{PA11, PA12},
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gpiob::{PB12, PB13, PB5, PB6, PB8, PB9},
@@ -10,6 +11,14 @@ use crate::gpio::{
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gpioi::PI9,
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Alternate, AF9,
1213
};
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#[cfg(feature = "stm32f446")]
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use crate::gpio::{
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gpioa::{PA11, PA12},
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gpiob::{PB12, PB13, PB5, PB6, PB8, PB9},
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gpiod::{PD0, PD1},
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Alternate, AF9,
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};
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use crate::pac::{CAN1, CAN2};
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use crate::rcc::APB1;
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@@ -43,10 +52,8 @@ macro_rules! pins {
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/*
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See DS8626 Rev 9 Table 9.
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47-
Applies to stm32f405, stm32f407, stm32f446.
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To add MCUs, add has-can and check the pins.
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*/
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#[cfg(any(feature = "stm32f405", feature = "stm32f407"))]
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pins! {
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CAN1 => (PA12, PA11),
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CAN1 => (PB9, PB8),
@@ -56,6 +63,18 @@ pins! {
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CAN2 => (PB6, PB5),
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}
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/*
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See DS10693 Rev 9 Table 11.
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*/
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#[cfg(feature = "stm32f446")]
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pins! {
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CAN1 => (PA12, PA11),
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CAN1 => (PB9, PB8),
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CAN1 => (PD1, PD0),
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CAN2 => (PB13, PB12),
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CAN2 => (PB6, PB5),
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}
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use sealed::RccBus;
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/// Enable/disable peripheral

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