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fugit
1 parent d51a0b1 commit f827ed2

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CHANGELOG.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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### Changed
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16+
- Usw `fugit`-based time types instead of `embedded-time`
1617
- Update gpios: add `DynamicPin`, add default modes, reexport pins, resort generics, etc.
1718
- Improved RCC infrastructure.
1819
- RTC support has been rewritten.

Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@ features = ["stm32f746", "rt"]
2020
as-slice = "0.2"
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cortex-m = "0.7.4"
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cortex-m-rt = ">=0.6.15, <0.8"
23-
embedded-time = "0.12.0"
2423
nb = "1.0"
2524
stm32f7 = "0.14.0"
2625
micromath = "2.0"
@@ -29,6 +28,7 @@ stm32-fmc = { version = "0.2.0", features = ["sdram"], optional = true }
2928
rand_core = "0.6"
3029
bxcan = "0.6"
3130
bare-metal = "1.0"
31+
fugit = "0.3.5"
3232

3333
[dependencies.time]
3434
version = "0.3"

src/adc.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -257,7 +257,7 @@ macro_rules! adc_hal {
257257
// The reference manual says that a stabilization time is needed after power_up,
258258
// this time can be found in the datasheets.
259259
// for STM32F7xx : delay(216_000_000/800_000)= delay(270 cycles) = 1.25us
260-
delay(self.clocks.sysclk().0 / 800_000);
260+
delay(self.clocks.sysclk().raw() / 800_000);
261261
}
262262

263263
// 15.3.1 ADC on-off control
@@ -466,7 +466,7 @@ impl Adc<ADC1> {
466466

467467
// The reference manual says that a stabilization time is needed after the powering the
468468
// sensor, this time can be found in the datasheets.
469-
delay(self.clocks.sysclk().0 / 80_000);
469+
delay(self.clocks.sysclk().raw() / 80_000);
470470
true
471471
} else {
472472
false

src/delay.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ impl DelayUs<u32> for Delay {
5050
// The SysTick Reload Value register supports values between 1 and 0x00FFFFFF.
5151
const MAX_RVR: u32 = 0x00FF_FFFF;
5252

53-
let mut total_rvr = us * (self.clocks.hclk().0 / 8_000_000);
53+
let mut total_rvr = us * (self.clocks.hclk().raw() / 8_000_000);
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5555
while total_rvr != 0 {
5656
let current_rvr = if total_rvr <= MAX_RVR {

src/fmc.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@
66
use stm32_fmc::FmcPeripheral;
77
use stm32_fmc::{AddressPinSet, PinsSdram, Sdram, SdramChip, SdramPinSet, SdramTargetBank};
88

9-
use crate::embedded_time::rate::Hertz;
109
use crate::pac;
1110
use crate::rcc::{Clocks, Enable, Reset};
11+
use fugit::HertzU32 as Hertz;
1212

1313
use crate::gpio::{self, Alternate};
1414

@@ -75,7 +75,7 @@ unsafe impl FmcPeripheral for FMC {
7575

7676
fn source_clock_hz(&self) -> u32 {
7777
// FMC block is clocked by HCLK
78-
self.hclk.0
78+
self.hclk.raw()
7979
}
8080
}
8181

src/i2c.rs

Lines changed: 13 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,11 @@
33
44
// NB : this implementation started as a modified copy of https://github.com/stm32-rs/stm32f1xx-hal/blob/master/src/i2c.rs
55

6-
use crate::embedded_time::rate::Hertz;
76
use crate::gpio::{self, Alternate, OpenDrain};
87
use crate::hal::blocking::i2c::{Read, Write, WriteRead};
98
use crate::pac::{DWT, I2C1, I2C2, I2C3};
109
use crate::rcc::{Clocks, Enable, GetBusFreq, RccBus, Reset};
10+
use fugit::HertzU32 as Hertz;
1111
use nb::Error::{Other, WouldBlock};
1212
use nb::{Error as NbError, Result as NbResult};
1313

@@ -43,22 +43,16 @@ pub enum Mode {
4343
}
4444

4545
impl Mode {
46-
pub fn standard<F: Into<Hertz>>(frequency: F) -> Self {
47-
Mode::Standard {
48-
frequency: frequency.into(),
49-
}
46+
pub fn standard(frequency: Hertz) -> Self {
47+
Mode::Standard { frequency }
5048
}
5149

52-
pub fn fast<F: Into<Hertz>>(frequency: F) -> Self {
53-
Mode::Fast {
54-
frequency: frequency.into(),
55-
}
50+
pub fn fast(frequency: Hertz) -> Self {
51+
Mode::Fast { frequency }
5652
}
5753

58-
pub fn fast_plus<F: Into<Hertz>>(frequency: F) -> Self {
59-
Mode::FastPlus {
60-
frequency: frequency.into(),
61-
}
54+
pub fn fast_plus(frequency: Hertz) -> Self {
55+
Mode::FastPlus { frequency }
6256
}
6357
}
6458

@@ -89,7 +83,7 @@ pub struct I2c<I2C, SCL, SDA> {
8983
i2c: I2C,
9084
pins: (SCL, SDA),
9185
mode: Mode,
92-
pclk: u32,
86+
pclk: Hertz,
9387
}
9488

9589
/// embedded-hal compatible blocking I2C implementation
@@ -209,7 +203,7 @@ fn blocking_i2c<I2C, SCL, SDA>(
209203
clocks: Clocks,
210204
data_timeout_us: u32,
211205
) -> BlockingI2c<I2C, SCL, SDA> {
212-
let sysclk_mhz = clocks.sysclk().0 / 1_000_000;
206+
let sysclk_mhz = clocks.sysclk().to_MHz();
213207
BlockingI2c {
214208
nb: i2c,
215209
data_timeout: data_timeout_us * sysclk_mhz,
@@ -405,7 +399,7 @@ macro_rules! hal {
405399
$I2CX::enable(apb);
406400
$I2CX::reset(apb);
407401

408-
let pclk = <$I2CX as RccBus>::Bus::get_frequency(&clocks).0;
402+
let pclk = <$I2CX as RccBus>::Bus::get_frequency(&clocks);
409403

410404
let mut i2c = I2c { i2c, pins, mode, pclk };
411405
i2c.init();
@@ -428,9 +422,9 @@ macro_rules! hal {
428422
let dnf = self.i2c.cr1.read().dnf().bits();
429423

430424
let i2c_timingr: I2cTiming = match self.mode {
431-
Mode::Standard{ frequency } => calculate_timing(I2C_STANDARD_MODE_SPEC, self.pclk, frequency.0, an_filter, dnf ),
432-
Mode::Fast{ frequency } => calculate_timing(I2C_FAST_MODE_SPEC, self.pclk, frequency.0, an_filter, dnf),
433-
Mode::FastPlus{ frequency } => calculate_timing(I2C_FAST_PLUS_MODE_SPEC, self.pclk, frequency.0, an_filter, dnf ),
425+
Mode::Standard{ frequency } => calculate_timing(I2C_STANDARD_MODE_SPEC, self.pclk.raw(), frequency.raw(), an_filter, dnf ),
426+
Mode::Fast{ frequency } => calculate_timing(I2C_FAST_MODE_SPEC, self.pclk.raw(), frequency.raw(), an_filter, dnf),
427+
Mode::FastPlus{ frequency } => calculate_timing(I2C_FAST_PLUS_MODE_SPEC, self.pclk.raw(), frequency.raw(), an_filter, dnf ),
434428
Mode::Custom{ timing_r } => {
435429
I2cTiming{
436430
presc: ((timing_r & 0xf000_0000) >> 28 ) as u8,

src/lib.rs

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,6 @@ compile_error!(
2424
);
2525

2626
pub(crate) use embedded_hal as hal;
27-
pub use embedded_time;
2827

2928
#[cfg(feature = "stm32f722")]
3029
pub use stm32f7::stm32f7x2 as pac;
@@ -183,3 +182,18 @@ fn stripped_type_name<T>() -> &'static str {
183182
let p = s.split("::");
184183
p.last().unwrap()
185184
}
185+
186+
/// Bits per second
187+
pub type BitsPerSecond = fugit::HertzU32;
188+
189+
/// Extension trait that adds convenience methods to the `u32` type
190+
pub trait U32Ext {
191+
/// Wrap in `Bps`
192+
fn bps(self) -> BitsPerSecond;
193+
}
194+
195+
impl U32Ext for u32 {
196+
fn bps(self) -> BitsPerSecond {
197+
BitsPerSecond::from_raw(self)
198+
}
199+
}

src/ltdc.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,7 @@ impl<T: 'static + SupportedWord> DisplayController<T> {
8383
// Get base clock and PLLM divisor
8484
let base_clk: u32;
8585
match &hse {
86-
Some(hse) => base_clk = hse.freq.0,
86+
Some(hse) => base_clk = hse.freq.raw(),
8787
// If no HSE is provided, we use the HSI clock at 16 MHz
8888
None => base_clk = 16_000_000,
8989
}

src/otg_fs.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,12 @@
55
66
use crate::pac;
77

8-
use crate::embedded_time::rate::Hertz;
98
use crate::gpio::{
109
gpioa::{PA11, PA12},
1110
Alternate,
1211
};
1312
use crate::rcc::{Clocks, Enable, Reset};
13+
use fugit::HertzU32 as Hertz;
1414

1515
pub use synopsys_usb_otg::UsbBus;
1616
use synopsys_usb_otg::UsbPeripheral;
@@ -66,7 +66,7 @@ unsafe impl UsbPeripheral for USB {
6666
}
6767

6868
fn ahb_frequency_hz(&self) -> u32 {
69-
self.hclk.0
69+
self.hclk.raw()
7070
}
7171
}
7272

src/otg_hs.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ use crate::gpio::{
1010
Alternate,
1111
};
1212
use crate::rcc::{Clocks, Enable, Reset};
13-
use embedded_time::rate::Hertz;
13+
use fugit::{HertzU32 as Hertz, RateExtU32};
1414

1515
#[cfg(feature = "usb_hs_phy")]
1616
use synopsys_usb_otg::PhyType;
@@ -51,7 +51,7 @@ impl USB {
5151
pin_dp: pins.1,
5252
hclk: clocks.hclk(),
5353
#[cfg(feature = "usb_hs_phy")]
54-
hse: clocks.hse().unwrap_or_else(|| Hertz(0)),
54+
hse: clocks.hse().unwrap_or_else(|| 0.Hz()),
5555
}
5656
}
5757

@@ -109,7 +109,7 @@ unsafe impl UsbPeripheral for USB {
109109
}
110110

111111
fn ahb_frequency_hz(&self) -> u32 {
112-
self.hclk.0
112+
self.hclk.raw()
113113
}
114114

115115
#[cfg(feature = "usb_hs_phy")]

src/prelude.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
pub use embedded_time::{duration::Extensions as _, rate::Extensions as _};
1+
pub use fugit::{ExtU32 as _, RateExtU32 as _};
22

33
#[cfg(feature = "fmc")]
44
pub use crate::fmc::FmcExt as _stm327xx_hal_fmc_FmcExt;
@@ -8,3 +8,4 @@ pub use crate::hal::digital::v2::{InputPin, OutputPin};
88
pub use crate::hal::prelude::*;
99
pub use crate::rcc::RccExt as _stm32f7xx_hal_rcc_RccExt;
1010
pub use crate::rng::RngExt as _;
11+
pub use crate::U32Ext as _;

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