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ardnewardnew
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(#1649) Moved global UART field initialization for IOMUXC-related memory-mapped registers to occur at runtime in UART.Configure
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3 files changed

+52
-79
lines changed

3 files changed

+52
-79
lines changed

‎src/machine/board_teensy40.go

Lines changed: 12 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -139,62 +139,32 @@ var (
139139
UART1 = UART{
140140
Buffer: NewRingBuffer(),
141141
Bus: nxp.LPUART6,
142-
muxRX: muxSelect{ // D0 (PA3 [AD_B0_03])
143-
mux: nxp.IOMUXC_LPUART6_RX_SELECT_INPUT_DAISY_GPIO_AD_B0_03_ALT2,
144-
sel: &nxp.IOMUXC.LPUART6_RX_SELECT_INPUT,
145-
},
146-
muxTX: muxSelect{ // D1 (PA2 [AD_B0_02])
147-
mux: nxp.IOMUXC_LPUART6_TX_SELECT_INPUT_DAISY_GPIO_AD_B0_02_ALT2,
148-
sel: &nxp.IOMUXC.LPUART6_TX_SELECT_INPUT,
149-
},
142+
rxMux: nxp.IOMUXC_LPUART6_RX_SELECT_INPUT_DAISY_GPIO_AD_B0_03_ALT2, // D0 (PA3 [AD_B0_03])
143+
txMux: nxp.IOMUXC_LPUART6_TX_SELECT_INPUT_DAISY_GPIO_AD_B0_02_ALT2, // D1 (PA2 [AD_B0_02])
150144
}
151145
UART2 = UART{
152146
Buffer: NewRingBuffer(),
153147
Bus: nxp.LPUART4,
154-
muxRX: muxSelect{ // D7 (PB17 [B1_01])
155-
mux: nxp.IOMUXC_LPUART4_RX_SELECT_INPUT_DAISY_GPIO_B1_01_ALT2,
156-
sel: &nxp.IOMUXC.LPUART4_RX_SELECT_INPUT,
157-
},
158-
muxTX: muxSelect{ // D8 (PB16 [B1_00])
159-
mux: nxp.IOMUXC_LPUART4_TX_SELECT_INPUT_DAISY_GPIO_B1_00_ALT2,
160-
sel: &nxp.IOMUXC.LPUART4_TX_SELECT_INPUT,
161-
},
148+
rxMux: nxp.IOMUXC_LPUART4_RX_SELECT_INPUT_DAISY_GPIO_B1_01_ALT2, // D7 (PB17 [B1_01])
149+
txMux: nxp.IOMUXC_LPUART4_TX_SELECT_INPUT_DAISY_GPIO_B1_00_ALT2, // D8 (PB16 [B1_00])
162150
}
163151
UART3 = UART{
164152
Buffer: NewRingBuffer(),
165153
Bus: nxp.LPUART2,
166-
muxRX: muxSelect{ // D15 (PA19 [AD_B1_03])
167-
mux: nxp.IOMUXC_LPUART2_RX_SELECT_INPUT_DAISY_GPIO_AD_B1_03_ALT2,
168-
sel: &nxp.IOMUXC.LPUART2_RX_SELECT_INPUT,
169-
},
170-
muxTX: muxSelect{ // D14 (PA18 [AD_B1_02])
171-
mux: nxp.IOMUXC_LPUART2_TX_SELECT_INPUT_DAISY_GPIO_AD_B1_02_ALT2,
172-
sel: &nxp.IOMUXC.LPUART2_TX_SELECT_INPUT,
173-
},
154+
rxMux: nxp.IOMUXC_LPUART2_RX_SELECT_INPUT_DAISY_GPIO_AD_B1_03_ALT2, // D15 (PA19 [AD_B1_03])
155+
txMux: nxp.IOMUXC_LPUART2_TX_SELECT_INPUT_DAISY_GPIO_AD_B1_02_ALT2, // D14 (PA18 [AD_B1_02])
174156
}
175157
UART4 = UART{
176158
Buffer: NewRingBuffer(),
177159
Bus: nxp.LPUART3,
178-
muxRX: muxSelect{ // D16 (PA23 [AD_B1_07])
179-
mux: nxp.IOMUXC_LPUART3_RX_SELECT_INPUT_DAISY_GPIO_AD_B1_07_ALT2,
180-
sel: &nxp.IOMUXC.LPUART3_RX_SELECT_INPUT,
181-
},
182-
muxTX: muxSelect{ // D17 (PA22 [AD_B1_06])
183-
mux: nxp.IOMUXC_LPUART3_TX_SELECT_INPUT_DAISY_GPIO_AD_B1_06_ALT2,
184-
sel: &nxp.IOMUXC.LPUART3_TX_SELECT_INPUT,
185-
},
160+
rxMux: nxp.IOMUXC_LPUART3_RX_SELECT_INPUT_DAISY_GPIO_AD_B1_07_ALT2, // D16 (PA23 [AD_B1_07])
161+
txMux: nxp.IOMUXC_LPUART3_TX_SELECT_INPUT_DAISY_GPIO_AD_B1_06_ALT2, // D17 (PA22 [AD_B1_06])
186162
}
187163
UART5 = UART{
188164
Buffer: NewRingBuffer(),
189165
Bus: nxp.LPUART8,
190-
muxRX: muxSelect{ // D21 (PA27 [AD_B1_11])
191-
mux: nxp.IOMUXC_LPUART8_RX_SELECT_INPUT_DAISY_GPIO_AD_B1_11_ALT2,
192-
sel: &nxp.IOMUXC.LPUART8_RX_SELECT_INPUT,
193-
},
194-
muxTX: muxSelect{ // D20 (PA26 [AD_B1_10])
195-
mux: nxp.IOMUXC_LPUART8_TX_SELECT_INPUT_DAISY_GPIO_AD_B1_10_ALT2,
196-
sel: &nxp.IOMUXC.LPUART8_TX_SELECT_INPUT,
197-
},
166+
rxMux: nxp.IOMUXC_LPUART8_RX_SELECT_INPUT_DAISY_GPIO_AD_B1_11_ALT2, // D21 (PA27 [AD_B1_11])
167+
txMux: nxp.IOMUXC_LPUART8_TX_SELECT_INPUT_DAISY_GPIO_AD_B1_10_ALT2, // D20 (PA26 [AD_B1_10])
198168
}
199169
UART6 = UART{
200170
Buffer: NewRingBuffer(),
@@ -206,14 +176,8 @@ var (
206176
UART7 = UART{
207177
Buffer: NewRingBuffer(),
208178
Bus: nxp.LPUART7,
209-
muxRX: muxSelect{ // D28 (PC18 [EMC_32])
210-
mux: nxp.IOMUXC_LPUART7_RX_SELECT_INPUT_DAISY_GPIO_EMC_32_ALT2,
211-
sel: &nxp.IOMUXC.LPUART7_RX_SELECT_INPUT,
212-
},
213-
muxTX: muxSelect{ // D29 (PD31 [EMC_31])
214-
mux: nxp.IOMUXC_LPUART7_TX_SELECT_INPUT_DAISY_GPIO_EMC_31_ALT2,
215-
sel: &nxp.IOMUXC.LPUART7_TX_SELECT_INPUT,
216-
},
179+
rxMux: nxp.IOMUXC_LPUART7_RX_SELECT_INPUT_DAISY_GPIO_EMC_32_ALT2, // D28 (PC18 [EMC_32])
180+
txMux: nxp.IOMUXC_LPUART7_TX_SELECT_INPUT_DAISY_GPIO_EMC_31_ALT2, // D29 (PD31 [EMC_31])
217181
}
218182
)
219183

‎src/machine/machine_mimxrt1062.go

Lines changed: 0 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -715,28 +715,6 @@ func (p Pin) getPad() (pad *volatile.Register32, mux *volatile.Register32) {
715715
panic("machine: invalid pin")
716716
}
717717

718-
// muxSelect is yet another level of indirection required to connect pins in an
719-
// alternate function state to a desired peripheral (since more than one pin can
720-
// provide a given alternate function).
721-
//
722-
// Once a pin is configured with a given alternate function mode, the IOMUXC
723-
// device must then be configured to select which alternate function pin to
724-
// route to the desired peripheral.
725-
//
726-
// The reference manual refers to this functionality as a "Daisy Chain". The
727-
// associated docs are found in the i.MX RT1060 Processor Reference Manual:
728-
// "Chapter 11.3.3 Daisy chain - multi pads driving same module input pin"
729-
type muxSelect struct {
730-
mux uint8 // AF mux selection (NOT a Pin type)
731-
sel *volatile.Register32 // AF selection register
732-
}
733-
734-
// connect configures the IOMUXC controller to route a given pin with alternate
735-
// function to a desired peripheral (see godoc comments on type muxSelect).
736-
func (s muxSelect) connect() {
737-
s.sel.Set(uint32(s.mux))
738-
}
739-
740718
// getMuxMode acts as a callback from the `(Pin).Configure(PinMode)` routine to
741719
// determine the alternate function setting for a given Pin and PinConfig.
742720
// This value is used in the IOMUXC device's SW_MUX_CTL_PAD_GPIO_* registers.

‎src/machine/machine_mimxrt1062_uart.go

Lines changed: 40 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -15,13 +15,12 @@ type UART struct {
1515
Buffer *RingBuffer
1616
Interrupt interrupt.Interrupt
1717

18-
// these hold the input selector ("daisy chain") values that select which pins
19-
// are connected to the LPUART device, and should be defined where the UART
20-
// instance is declared. see the godoc comments on type muxSelect for more
21-
// details.
22-
muxRX, muxTX muxSelect
18+
// These hold the input selector ("daisy chain") values of the IOMUXC
19+
// controller that selects which pins are connected to the LPUART device;
20+
// define these where the UART instance is declared.
21+
rxMux, txMux uint8
2322

24-
// these are copied from UARTConfig, during (*UART).Configure(UARTConfig), and
23+
// These are copied from UARTConfig, during (*UART).Configure(UARTConfig), and
2524
// should be considered read-only for internal reference (i.e., modifying them
2625
// will have no desirable effect).
2726
rx, tx Pin
@@ -67,9 +66,8 @@ func (uart *UART) Configure(config UARTConfig) {
6766
uart.rx.Configure(PinConfig{Mode: PinModeUARTRX})
6867
uart.tx.Configure(PinConfig{Mode: PinModeUARTTX})
6968

70-
// configure the mux input selector
71-
uart.muxRX.connect()
72-
uart.muxTX.connect()
69+
// configure the mux input selector (IOMUXC)
70+
uart.configureMux()
7371

7472
// reset all internal logic and registers
7573
uart.resetTransmitting()
@@ -207,6 +205,39 @@ func (uart *UART) WriteByte(c byte) error {
207205
return nil
208206
}
209207

208+
// configureMux configures the IOMUXC controller by selecting which UART pins
209+
// are connected to the receiver's LPUART device.
210+
// The values (rxMux/txMux) that control which pins are used by the IOMUXC
211+
// controller are not themselves of Pin type, but rather they are arbitrary
212+
// enumerations defined by the IOMUXC interface.
213+
func (uart *UART) configureMux() {
214+
var rx, tx *volatile.Register32
215+
switch uart.Bus {
216+
case nxp.LPUART1:
217+
// LPUART1 not connected via IOMUXC (no input select registers)
218+
case nxp.LPUART2:
219+
rx, tx = &nxp.IOMUXC.LPUART2_RX_SELECT_INPUT, &nxp.IOMUXC.LPUART2_TX_SELECT_INPUT
220+
case nxp.LPUART3:
221+
rx, tx = &nxp.IOMUXC.LPUART3_RX_SELECT_INPUT, &nxp.IOMUXC.LPUART3_TX_SELECT_INPUT
222+
case nxp.LPUART4:
223+
rx, tx = &nxp.IOMUXC.LPUART4_RX_SELECT_INPUT, &nxp.IOMUXC.LPUART4_TX_SELECT_INPUT
224+
case nxp.LPUART5:
225+
rx, tx = &nxp.IOMUXC.LPUART5_RX_SELECT_INPUT, &nxp.IOMUXC.LPUART5_TX_SELECT_INPUT
226+
case nxp.LPUART6:
227+
rx, tx = &nxp.IOMUXC.LPUART6_RX_SELECT_INPUT, &nxp.IOMUXC.LPUART6_TX_SELECT_INPUT
228+
case nxp.LPUART7:
229+
rx, tx = &nxp.IOMUXC.LPUART7_RX_SELECT_INPUT, &nxp.IOMUXC.LPUART7_TX_SELECT_INPUT
230+
case nxp.LPUART8:
231+
rx, tx = &nxp.IOMUXC.LPUART8_RX_SELECT_INPUT, &nxp.IOMUXC.LPUART8_TX_SELECT_INPUT
232+
}
233+
if nil != rx {
234+
rx.Set(uint32(uart.rxMux))
235+
}
236+
if nil != tx {
237+
tx.Set(uint32(uart.txMux))
238+
}
239+
}
240+
210241
// getBaudRateDivisor finds the greatest over-sampling factor (4..32) and
211242
// corresponding baud rate divisor (1..8191) that best partition a given baud
212243
// rate into equal intervals.

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