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flyfish30 opened this issue Feb 29, 2024 · 8 comments
Open

Failed to call intrinsic function of Hexagon DSP #19129

flyfish30 opened this issue Feb 29, 2024 · 8 comments
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arch-hexagon Qualcomm Hexagon DSP enhancement Solving this issue will likely involve adding new logic or components to the codebase. translate-c C to Zig source translation feature (@cImport) use case Describes a real use case that is difficult or impossible, but does not propose a solution.
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@flyfish30
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Zig Version

0.11

Steps to Reproduce and Observed Behavior

Create a new hvx-fail directory, and then cd to this directory, run command "zig init-exe".
Delete the file src/main.zig, create a new main.zig with bellow source code:

const std = @import("std");

const c = @cImport({
    @cDefine("__HVX__", "1");
    @cDefine("__HVX_LENGTH__", "128");
    @cDefine("__HVX_ARCH__", "68");
    @cInclude("hexagon_types.h");
    @cInclude("hexagon_protos.h");
    @cInclude("hvx_hexagon_protos.h");
});

export fn start() void {
    _ = try main();
}

pub fn main() !void {
    const vec1: @Vector(128, u8) = @splat(42);
    const vec2: @Vector(128, u8) = @splat(55);
    const comb_vec = vcombine(vec1, vec2);

    std.debug.print("vcombine(vec1, vec2) is: {any}\n", .{comb_vec});
}

inline fn vcombine(a: @Vector(128, u8), b: @Vector(128, u8)) @Vector(256, u8) {
    return @bitCast(c.Q6_W_vcombine_VV(@bitCast(a), @bitCast(b)));
}

Run command "zig build -Dtarget=hexagon-freestanding -Dcpu=hexagonv68", the compiler output a error message in bellow:

zig build-exe hvx-fail Debug hexagon-freestanding: error: the following command failed with 1 compilation errors:
/usr/local/Cellar/zig/0.11.0/bin/zig build-exe /Users/liuchangsheng/myproject/Zig/hvx-fail/src/main.zig --cache-dir /Users/liuchangsheng/myproject/Zig/hvx-fail/zig-cache --global-cache-dir /Users/liuchangsheng/.cache/zig --name hvx-fail -target hexagon-freestanding -mcpu hexagonv68 --listen=-
Build Summary: 0/3 steps succeeded; 1 failed (disable with --summary none)
install transitive failure
└─ install hvx-fail transitive failure
└─ zig build-exe hvx-fail Debug hexagon-freestanding 1 errors
/Users/liuchangsheng/myproject/Zig/hvx-fail/zig-cache/o/cc391e685248596c46a99a0e3ce6d5c2/cimport.zig:1140:30: error: unable to translate macro: undefined identifier __builtin_HEXAGON_V6_vcombine
pub const Q6_W_vcombine_VV = @CompileError("unable to translate macro: undefined identifier __builtin_HEXAGON_V6_vcombine"); // /usr/local/Cellar/zig/0.11.0/lib/zig/include/hvx_hexagon_protos.h:932:9
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
referenced by:
vcombine: src/main.zig:25:22
main: src/main.zig:19:22
remaining reference traces hidden; use '-freference-trace' to see all reference traces

Expected Behavior

The zig should success to compile this main.zig file, the intrinsic function of Hexagon DSP should be inline call from zig source code.

@flyfish30 flyfish30 added the bug Observed behavior contradicts documented or intended behavior label Feb 29, 2024
@jacobly0 jacobly0 added enhancement Solving this issue will likely involve adding new logic or components to the codebase. translate-c C to Zig source translation feature (@cImport) use case Describes a real use case that is difficult or impossible, but does not propose a solution. and removed bug Observed behavior contradicts documented or intended behavior labels Feb 29, 2024
@jacobly0 jacobly0 added this to the 1.1.0 milestone Feb 29, 2024
@jacobly0
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jacobly0 commented Feb 29, 2024

Unless someone wants to work on this, I would not expect the large number of target specific C builtins to be implemented in translate-c anytime soon. Especially considering that using builtin zig functions or inline asm already lets you achieve the same result.

@flyfish30
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Thanks!, The inline assembly method solves my current problem very well.

@alexrp alexrp added the arch-hexagon Qualcomm Hexagon DSP label Oct 3, 2024
@androm3da
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Do other architectures define target-specific builtins? I can contribute changes to make Hexagon support whatever the idiomatic behavior is here.

@alexrp
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alexrp commented Mar 16, 2025

I don't believe we currently have any support for target-specific builtins like this in zig translate-c. So I wouldn't worry too much about it for now.

@androm3da
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support for target-specific builtins like this in zig translate-c

What about Zig-native target-specific intrinsics? Do those exist?

@alexrp
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alexrp commented Mar 16, 2025

With the exception of a few WASM ones, no. I actually don't know if we'll even need them if we proceed with the plan of implementing a fully Zig-integrated inline assembly syntax.

@androm3da
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With the exception of a few WASM ones, no. I actually don't know if we'll even need them if we proceed with the plan of implementing a fully Zig-integrated inline assembly syntax.

That doesn't sound like it could be as-capable as intrinsics, right? I suppose the compiler can't schedule the instructions with the same flexibility in this case?

However, I look forward to learning more about the Zig-integrated inline asm.

@alexrp
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alexrp commented Mar 16, 2025

I suppose it depends on how well the inline assembly is actually integrated. For LLVM, it would likely never be able to be as good as builtins, but I could imagine self-hosted Zig backends being able to do better.

#10761

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Labels
arch-hexagon Qualcomm Hexagon DSP enhancement Solving this issue will likely involve adding new logic or components to the codebase. translate-c C to Zig source translation feature (@cImport) use case Describes a real use case that is difficult or impossible, but does not propose a solution.
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