From ab154be7f0a89b271686d740f7e50545414a6024 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 17:10:10 +0200 Subject: [PATCH 01/14] std.Target: Fix ptrBitWidth_cpu_abi() for dxil (64-bit, not 32-bit). The DXIL documentation claims 32-bit pointers: https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#memory-accesses Despite this, Clang considers pointers 64-bit when targeting it. --- lib/std/Target.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 4e430558104c..e8df26f52e51 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1854,12 +1854,12 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { .wasm32, .spirv32, .loongarch32, - .dxil, .xtensa, => 32, .aarch64, .aarch64_be, + .dxil, .mips64, .mips64el, .powerpc64, From db8f00e277016e12495bcc5217090052eea69eb3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 15:51:40 +0200 Subject: [PATCH 02/14] std.Target: Fix ptrBitWidth_cpu_abi() for sparc32. CPU feature set has nothing to do with ABI choice; the pointer bit width is determined only by looking at the choice of sparc vs sparc64. --- lib/std/Target.zig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index e8df26f52e51..facdc1c01c1f 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1852,6 +1852,7 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { .kalimba, .lanai, .wasm32, + .sparc, .spirv32, .loongarch32, .xtensa, @@ -1878,8 +1879,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { .loongarch64, => 64, - .sparc => if (std.Target.sparc.featureSetHas(cpu.features, .v9)) 64 else 32, - .spirv => @panic("TODO what should this value be?"), }; } From e67388c2e538789aa3e46f625f6e08696093dcdb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 17:12:33 +0200 Subject: [PATCH 03/14] std.Target: Fix C type alignment calculation for dxil. --- lib/std/Target.zig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index facdc1c01c1f..c05c47cac073 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2343,7 +2343,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .csky, .x86, .xcore, - .dxil, .loongarch32, .spirv32, .kalimba, @@ -2355,6 +2354,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .amdgcn, .bpfel, .bpfeb, + .dxil, .hexagon, .loongarch64, .m68k, @@ -2448,7 +2448,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .csky, .xcore, - .dxil, .loongarch32, .spirv32, .kalimba, @@ -2466,6 +2465,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .amdgcn, .bpfel, .bpfeb, + .dxil, .hexagon, .x86, .loongarch64, From 29321ca4a2abc5c4c936840f2bc6002babbdbf3b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 18:43:29 +0200 Subject: [PATCH 04/14] std.Target: Fix C type alignment calculation for spirv32. --- lib/std/Target.zig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index c05c47cac073..e1a19d28cff2 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2344,7 +2344,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .x86, .xcore, .loongarch32, - .spirv32, .kalimba, .ve, .spu_2, @@ -2366,6 +2365,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .nvptx, .nvptx64, .s390x, + .spirv32, .spirv64, => 8, @@ -2449,7 +2449,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .csky, .xcore, .loongarch32, - .spirv32, .kalimba, .ve, .spu_2, @@ -2478,6 +2477,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .nvptx, .nvptx64, .s390x, + .spirv32, .spirv64, => 8, From 98153c8d816ec3cc1c68756d10689ee7be3e32f9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 16:01:57 +0200 Subject: [PATCH 05/14] std.Target: Fix C type alignment calculation for loongarch64. --- lib/std/Target.zig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index e1a19d28cff2..eb38c3980c97 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2355,7 +2355,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .bpfeb, .dxil, .hexagon, - .loongarch64, .m68k, .mips, .mipsel, @@ -2371,6 +2370,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .aarch64, .aarch64_be, + .loongarch64, .mips64, .mips64el, .powerpc, @@ -2467,7 +2467,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .dxil, .hexagon, .x86, - .loongarch64, .m68k, .mips, .mipsel, @@ -2483,6 +2482,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .aarch64, .aarch64_be, + .loongarch64, .mips64, .mips64el, .powerpc, From e6788625209adeeb06d0dde516f0cb8e25e338bf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 15:48:47 +0200 Subject: [PATCH 06/14] std.Target: Fix C type alignment calculation for sparc64. --- lib/std/Target.zig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index eb38c3980c97..d1351e7d41f5 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2359,7 +2359,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .mips, .mipsel, .sparc, - .sparc64, .lanai, .nvptx, .nvptx64, @@ -2379,6 +2378,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .powerpc64le, .riscv32, .riscv64, + .sparc64, .x86_64, .wasm32, .wasm64, @@ -2471,7 +2471,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .mips, .mipsel, .sparc, - .sparc64, .lanai, .nvptx, .nvptx64, @@ -2491,6 +2490,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .powerpc64le, .riscv32, .riscv64, + .sparc64, .x86_64, .wasm32, .wasm64, From 5dd66cd964dba48709a817e86dc004ed703e5ab1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 17:02:20 +0200 Subject: [PATCH 07/14] std.Target: Fix C type alignment calculation for ve. --- lib/std/Target.zig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index d1351e7d41f5..7248cce807e5 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2345,7 +2345,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .xcore, .loongarch32, .kalimba, - .ve, .spu_2, .xtensa, => 4, @@ -2380,6 +2379,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .riscv64, .sparc64, .x86_64, + .ve, .wasm32, .wasm64, => 16, @@ -2450,7 +2450,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .xcore, .loongarch32, .kalimba, - .ve, .spu_2, .xtensa, => 4, @@ -2492,6 +2491,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .riscv64, .sparc64, .x86_64, + .ve, .wasm32, .wasm64, => 16, From 606d011acf8c2a75ea1485174c2c1d24a612c86b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 18:29:47 +0200 Subject: [PATCH 08/14] std.Target: Fix C long long size for opencl (8, not 16). This value was correct for the old SPIR, but not for SPIR-V. --- lib/std/Target.zig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 7248cce807e5..067c3c66672d 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2263,8 +2263,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .char => return 8, .short, .ushort => return 16, .int, .uint, .float => return 32, - .long, .ulong, .double => return 64, - .longlong, .ulonglong => return 128, + .long, .ulong, .longlong, .ulonglong, .double => return 64, // Note: The OpenCL specification does not guarantee a particular size for long double, // but clang uses 128 bits. .longdouble => return 128, From a1d3e567635e79e0fbd8d56225d5098bc6cb8bbb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 19:37:49 +0200 Subject: [PATCH 09/14] std.Target: Fix C long double size for opencl (8, not 16). This value was correct for the old SPIR, but not for SPIR-V. --- lib/std/Target.zig | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 067c3c66672d..b616d34b4358 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2264,9 +2264,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .short, .ushort => return 16, .int, .uint, .float => return 32, .long, .ulong, .longlong, .ulonglong, .double => return 64, - // Note: The OpenCL specification does not guarantee a particular size for long double, - // but clang uses 128 bits. - .longdouble => return 128, + .longdouble => return 64, }, .ps4, .ps5 => switch (c_type) { From eef499812c37112f4b03bde73a632c23ca753d20 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 17:27:32 +0200 Subject: [PATCH 10/14] std.Target: Fix C long double size for amdhsa, amdpal, and mesa3d (8, not 16). --- lib/std/Target.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index b616d34b4358..20966a237bfc 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2256,7 +2256,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .short, .ushort => return 16, .int, .uint, .float => return 32, .long, .ulong, .longlong, .ulonglong, .double => return 64, - .longdouble => return 128, + .longdouble => return 64, }, .opencl, .vulkan => switch (c_type) { From 7b47ebe5766e3d4824bb05a9a06de543b3335375 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 16:34:55 +0200 Subject: [PATCH 11/14] std.Target: Fix C long double size for sparc32 (8, not 16). --- lib/std/Target.zig | 2 -- 1 file changed, 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 20966a237bfc..8c56fb4ce136 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2060,7 +2060,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .aarch64, .aarch64_be, .s390x, - .sparc, .sparc64, .wasm32, .wasm64, @@ -2166,7 +2165,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .s390x, .mips64, .mips64el, - .sparc, .sparc64, .wasm32, .wasm64, From 231f322a65acd353e4a88907cea7621b6adc2c4b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 17:01:45 +0200 Subject: [PATCH 12/14] std.Target: Fix C long double size for ve (16, not 8). --- lib/std/Target.zig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 8c56fb4ce136..dc20d6398853 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2065,6 +2065,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .wasm64, .loongarch32, .loongarch64, + .ve, => return 128, else => return 64, @@ -2170,6 +2171,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .wasm64, .loongarch32, .loongarch64, + .ve, => return 128, else => return 64, From 23b5a6c71eb3229e0456a6900f3672c77b91d1f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 19:48:01 +0200 Subject: [PATCH 13/14] std.Target: Treat spirv as identical to spirv64 for ABI size/alignment purposes. This is arbitrary since spirv (as opposed to spirv32/spirv64) refers to the version with logical memory layout, i.e. no 'real' pointers. This change at least matches what clang does. --- lib/std/Target.zig | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index dc20d6398853..a88e1613250f 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1875,11 +1875,10 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { .sparc64, .s390x, .ve, + .spirv, .spirv64, .loongarch64, => 64, - - .spirv => @panic("TODO what should this value be?"), }; } @@ -2359,6 +2358,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .nvptx, .nvptx64, .s390x, + .spirv, .spirv32, .spirv64, => 8, @@ -2380,8 +2380,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { .wasm32, .wasm64, => 16, - - .spirv => @panic("TODO what should this value be?"), }), ); } @@ -2471,6 +2469,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .nvptx, .nvptx64, .s390x, + .spirv, .spirv32, .spirv64, => 8, @@ -2492,8 +2491,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { .wasm32, .wasm64, => 16, - - .spirv => @panic("TODO what should this value be?"), }), ); } From ef502daafe2b4e216c68fe07ff05aa91d539b831 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 6 Aug 2024 17:27:07 +0200 Subject: [PATCH 14/14] std.Target: Handle mesa3d in c_type_bit_size(). --- lib/std/Target.zig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index a88e1613250f..d5bc61e66306 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2250,7 +2250,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .longdouble => return 64, }, - .amdhsa, .amdpal => switch (c_type) { + .amdhsa, .amdpal, .mesa3d => switch (c_type) { .char => return 8, .short, .ushort => return 16, .int, .uint, .float => return 32, @@ -2280,7 +2280,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { .rtems, .aix, .elfiamcu, - .mesa3d, .contiki, .hermit, .hurd,