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392 | 392 |
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393 | 393 | .attribute arch, "rv64i_xsfvfwmaccqqq"
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394 | 394 | # CHECK: attribute 5, "rv64i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvl32b1p0_xsfvfwmaccqqq1p0"
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| 395 | + |
| 396 | +.attribute arch, "rv32i_ssnpm0p8" |
| 397 | +# CHECK: attribute 5, "rv32i2p1_ssnpm0p8" |
| 398 | + |
| 399 | +.attribute arch, "rv32i_smnpm0p8" |
| 400 | +# CHECK: attribute 5, "rv32i2p1_smnpm0p8" |
| 401 | + |
| 402 | +.attribute arch, "rv32i_smmpm0p8" |
| 403 | +# CHECK: attribute 5, "rv32i2p1_smmpm0p8" |
| 404 | + |
| 405 | +.attribute arch, "rv32i_sspm0p8" |
| 406 | +# CHECK: attribute 5, "rv32i2p1_sspm0p8" |
| 407 | + |
| 408 | +.attribute arch, "rv32i_supm0p8" |
| 409 | +# CHECK: attribute 5, "rv32i2p1_supm0p8" |
| 410 | + |
| 411 | +.attribute arch, "rv64i_ssnpm0p8" |
| 412 | +# CHECK: attribute 5, "rv64i2p1_ssnpm0p8" |
| 413 | + |
| 414 | +.attribute arch, "rv64i_smnpm0p8" |
| 415 | +# CHECK: attribute 5, "rv64i2p1_smnpm0p8" |
| 416 | + |
| 417 | +.attribute arch, "rv64i_smmpm0p8" |
| 418 | +# CHECK: attribute 5, "rv64i2p1_smmpm0p8" |
| 419 | + |
| 420 | +.attribute arch, "rv64i_sspm0p8" |
| 421 | +# CHECK: attribute 5, "rv64i2p1_sspm0p8" |
| 422 | + |
| 423 | +.attribute arch, "rv64i_supm0p8" |
| 424 | +# CHECK: attribute 5, "rv64i2p1_supm0p8" |
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