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Add ability to drive async clks during simulation #51

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13b28aa
Added drive_clk method and infrastructure
ginty Dec 31, 2020
5299526
Added net arg to timeunit/precision methods and added docs
ginty Dec 31, 2020
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98 changes: 50 additions & 48 deletions Gemfile.lock
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,24 +9,24 @@ PATH
GEM
remote: https://rubygems.org/
specs:
activesupport (4.2.11.1)
activesupport (4.2.11.3)
i18n (~> 0.7)
minitest (~> 5.1)
thread_safe (~> 0.3, >= 0.3.4)
tzinfo (~> 1.1)
ast (2.4.0)
ast (2.4.1)
astrolabe (1.3.1)
parser (~> 2.2)
atp (1.1.3)
ast (~> 2)
origen (>= 0.2.3)
sexpistol (~> 0.0)
builder (3.2.3)
byebug (11.0.1)
coderay (1.1.2)
builder (3.2.4)
byebug (11.1.3)
coderay (1.1.3)
colored (1.2)
colorize (0.8.1)
concurrent-ruby (1.1.5)
concurrent-ruby (1.1.7)
coveralls (0.8.23)
json (>= 1.8, < 3)
simplecov (~> 0.16.1)
Expand All @@ -36,33 +36,33 @@ GEM
cri (2.10.1)
colored (~> 1.2)
dentaku (2.0.11)
diff-lcs (1.3)
docile (1.3.2)
dry-inflector (0.1.2)
diff-lcs (1.4.4)
docile (1.3.4)
dry-inflector (0.2.0)
gems (0.8.3)
highline (1.7.10)
httparty (0.17.0)
httparty (0.18.1)
mime-types (~> 3.0)
multi_xml (>= 0.5.2)
i18n (0.9.5)
concurrent-ruby (~> 1.0)
json (2.2.0)
json (2.5.1)
kramdown (1.17.0)
method_source (0.9.2)
mime-types (3.3)
method_source (1.0.0)
mime-types (3.3.1)
mime-types-data (~> 3.2015)
mime-types-data (3.2019.0904)
mime-types-data (3.2020.1104)
mini_portile2 (2.4.0)
minitest (5.11.3)
minitest (5.14.2)
multi_xml (0.6.0)
nanoc (3.7.5)
cri (~> 2.3)
net-ldap (0.16.1)
nokogiri (1.10.5)
net-ldap (0.17.0)
nokogiri (1.10.10)
mini_portile2 (~> 2.4.0)
origen (0.54.0)
origen (0.55.1)
activesupport (~> 4.1)
bundler (~> 1.7)
bundler (> 1.7)
coderay (~> 1.1)
colored (~> 1.2)
colorize (~> 0.8.1)
Expand All @@ -87,14 +87,14 @@ GEM
yard (~> 0.8)
origen_doc_helpers (0.8.2)
origen (>= 0.7.15)
origen_jtag (0.22.0)
origen_jtag (0.22.1)
origen (~> 0.7, >= 0.7.35)
origen_testers (>= 0.13.2)
origen_stil (0.2.1)
origen_stil (0.3.0)
ast (~> 2)
origen (>= 0.33.3)
treetop
origen_testers (0.42.0)
origen_testers (0.47.0)
ast (~> 2)
atp (~> 1.1, >= 1.1.3)
origen (>= 0.44.0)
Expand All @@ -106,61 +106,63 @@ GEM
ast (~> 2)
origen (>= 0.41.0)
treetop
parser (2.6.4.1)
ast (~> 2.4.0)
parser (2.7.2.0)
ast (~> 2.4.1)
polyglot (0.3.5)
powerpack (0.1.2)
pry (0.12.2)
coderay (~> 1.1.0)
method_source (~> 0.9.0)
powerpack (0.1.3)
pry (0.13.1)
coderay (~> 1.1)
method_source (~> 1.0)
rainbow (2.2.2)
rake
rake (10.5.0)
require_all (1.5.0)
rodf (1.1.0)
rodf (1.1.1)
builder (>= 3.0)
dry-inflector (~> 0.1)
rubyzip (>= 1.0)
rspec (3.8.0)
rspec-core (~> 3.8.0)
rspec-expectations (~> 3.8.0)
rspec-mocks (~> 3.8.0)
rspec-core (3.8.2)
rspec-support (~> 3.8.0)
rspec-expectations (3.8.4)
rspec (3.10.0)
rspec-core (~> 3.10.0)
rspec-expectations (~> 3.10.0)
rspec-mocks (~> 3.10.0)
rspec-core (3.10.1)
rspec-support (~> 3.10.0)
rspec-expectations (3.10.1)
diff-lcs (>= 1.2.0, < 2.0)
rspec-support (~> 3.8.0)
rspec-legacy_formatters (1.0.1)
rspec-support (~> 3.10.0)
rspec-legacy_formatters (1.0.2)
rspec (~> 3.0)
rspec-mocks (3.8.1)
rspec-mocks (3.10.1)
diff-lcs (>= 1.2.0, < 2.0)
rspec-support (~> 3.8.0)
rspec-support (3.8.2)
rspec-support (~> 3.10.0)
rspec-support (3.10.1)
rubocop (0.30.0)
astrolabe (~> 1.3)
parser (>= 2.2.0.1, < 3.0)
powerpack (~> 0.1)
rainbow (>= 1.99.1, < 3.0)
ruby-progressbar (~> 1.4)
ruby-progressbar (1.10.1)
rubyzip (1.2.4)
ruby-progressbar (1.11.0)
rubyzip (2.3.0)
scrub_rb (1.0.1)
sexpistol (0.0.7)
simplecov (0.16.1)
docile (~> 1.1)
json (>= 1.8, < 3)
simplecov-html (~> 0.10.0)
simplecov-html (0.10.2)
sync (0.5.0)
term-ansicolor (1.7.1)
tins (~> 1.0)
thor (0.20.3)
thread_safe (0.3.6)
tins (1.21.1)
treetop (1.6.10)
tins (1.26.0)
sync
treetop (1.6.11)
polyglot (~> 0.3)
tzinfo (1.2.5)
tzinfo (1.2.9)
thread_safe (~> 0.1)
yard (0.9.20)
yard (0.9.26)

PLATFORMS
ruby
Expand All @@ -173,4 +175,4 @@ DEPENDENCIES
origen_sim!

BUNDLED WITH
1.17.1
1.17.2
147 changes: 144 additions & 3 deletions ext/bridge.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -81,6 +81,7 @@ static void define_pin(char*, char*, char*, char*);
static void define_wave(char*, char*, char*);
static void cycle(void);
static void drive_pin(char*, char*);
static void drive_clk(char*, char*, char*);
static void compare_pin(char*, char*);
static void capture_pin(char*);
static void stop_capture_pin(char*);
Expand Down Expand Up @@ -303,8 +304,22 @@ static void clear_waves_and_pins() {

static void set_period(char * p_in_simtime_units_str) {
uint64_t p = (uint64_t) strtol(p_in_simtime_units_str, NULL, 10);

period_in_simtime_units = p;
clear_waves_and_pins();

//vpiHandle handle;
//s_vpi_value v;

//handle = vpi_handle_by_name(ORIGEN_SIM_TESTBENCH_CAT("timing.cycle_period"), NULL);
//v.format = vpiDecStrVal;
//v.value.str = p_in_simtime_units_str;
//vpi_put_value(handle, &v, NULL, vpiNoDelay);

//handle = vpi_handle_by_name(ORIGEN_SIM_TESTBENCH_CAT("timing.period_set"), NULL);
//v.format = vpiIntVal;
//v.value.integer = 1;
//vpi_put_value(handle, &v, NULL, vpiNoDelay);
}


Expand Down Expand Up @@ -363,6 +378,94 @@ static void drive_pin(char * index, char * val) {
}


/// Drive a clk with the given timing on the given pin
static void drive_clk(char * index, char * on_str, char * off_str) {
Pin *pin = &pins[atoi(index)];
double on = strtod(on_str, NULL);
double off = strtod(off_str, NULL);
vpiHandle handle;
s_vpi_value v = {vpiIntVal, {0}};

if ((*pin).present) {
// Make sure the pin is in drive mode
drive_pin(index, "0");

// Connect the async driver
char * driver = (char *) malloc(strlen((*pin).name) + 30);
strcpy(driver, ORIGEN_SIM_TESTBENCH_CAT("pins."));
strcat(driver, (*pin).name);

char * async_enable = (char *) malloc(strlen(driver) + 30);
strcpy(async_enable, driver);
strcat(async_enable, ".async_enable");
handle = vpi_handle_by_name(async_enable, NULL);
free(async_enable);
v.value.integer = 1;
vpi_put_value(handle, &v, NULL, vpiNoDelay);

// Now configure it for the requested clk wave
char * async_driver = (char *) malloc(strlen(driver) + 18);
strcpy(async_driver, driver);
strcat(async_driver, ".async_wave_driver");
free(driver);

char * edge_enable = (char *) malloc(strlen(async_driver) + 20);
strcpy(edge_enable, async_driver);
strcat(edge_enable, ".edge_enable");
handle = vpi_handle_by_name(edge_enable, NULL);
free(edge_enable);
v.value.integer = 3;
vpi_put_value(handle, &v, NULL, vpiNoDelay);

char * edge_drive_data = (char *) malloc(strlen(async_driver) + 20);
strcpy(edge_drive_data, async_driver);
strcat(edge_drive_data, ".edge_drive_data");
handle = vpi_handle_by_name(edge_drive_data, NULL);
free(edge_drive_data);
v.value.integer = 2;
vpi_put_value(handle, &v, NULL, vpiNoDelay);

char * drive_data_select = (char *) malloc(strlen(async_driver) + 20);
strcpy(drive_data_select, async_driver);
strcat(drive_data_select, ".drive_data_select");
handle = vpi_handle_by_name(drive_data_select, NULL);
free(drive_data_select);
v.value.integer = 3;
vpi_put_value(handle, &v, NULL, vpiNoDelay);

char * t0 = (char *) malloc(strlen(async_driver) + 3);
strcpy(t0, async_driver);
strcat(t0, ".t0");
handle = vpi_handle_by_name(t0, NULL);
free(t0);
v.format = vpiRealVal;
v.value.real = on;
vpi_put_value(handle, &v, NULL, vpiNoDelay);

char * t1 = (char *) malloc(strlen(async_driver) + 3);
strcpy(t1, async_driver);
strcat(t1, ".t1");
handle = vpi_handle_by_name(t1, NULL);
free(t1);
v.format = vpiRealVal;
v.value.real = off;
vpi_put_value(handle, &v, NULL, vpiNoDelay);

// Write to go bit to start the driver
char * go = (char *) malloc(strlen(async_driver) + 3);
strcpy(go, async_driver);
strcat(go, ".go");
handle = vpi_handle_by_name(go, NULL);
free(go);
v.format = vpiIntVal;
v.value.integer = 1;
vpi_put_value(handle, &v, NULL, vpiNoDelay);

free(async_driver);
}
}


/// Immediately sets the given pin to compare against the given value
static void compare_pin(char * index, char * val) {
Pin *pin = &pins[atoi(index)];
Expand Down Expand Up @@ -863,7 +966,7 @@ PLI_INT32 bridge_wait_for_msg(p_cb_data data) {
type = atoi(arg1);
origen_log(type, arg2);
break;
// Get timescale, returns a number that maps as follows:
// Get timeunit, returns a number that maps as follows:
// -15 - fs
// -14 - 10fs
// -13 - 100fs
Expand All @@ -882,9 +985,11 @@ PLI_INT32 bridge_wait_for_msg(p_cb_data data) {
// 0 - s
// 1 - 10s
// 2 - 100s
// l^
// l^origen.dut.some.net
case 'l' :
timescale = vpi_get(vpiTimeUnit, 0);
arg1 = strtok(NULL, "^");
handle = vpi_handle_by_name(arg1, NULL);
timescale = vpi_get(vpiTimeUnit, handle);
sprintf(msg, "%d\n", timescale);
client_put(msg);
break;
Expand Down Expand Up @@ -981,6 +1086,42 @@ PLI_INT32 bridge_wait_for_msg(p_cb_data data) {
vpi_put_value(handle, &v, NULL, vpiReleaseFlag);
}
break;
// Drive clock on pin
// t^pin_index^on_time^off_time
case 't' :
arg1 = strtok(NULL, "^");
arg2 = strtok(NULL, "^");
arg3 = strtok(NULL, "^");
//DEBUG("Define Wave: %s, %s, %s\n", arg1, arg2, arg3);
drive_clk(arg1, arg2, arg3);
break;
// Get timeprecision, returns a number that maps as follows:
// -15 - fs
// -14 - 10fs
// -13 - 100fs
// -12 - ps
// -11 - 10ps
// -10 - 100ps
// -9 - ns
// -8 - 10ns
// -7 - 100ns
// -6 - us
// -5 - 10us
// -4 - 100us
// -3 - ms
// -2 - 10ms
// -1 - 100ms
// 0 - s
// 1 - 10s
// 2 - 100s
// u^origen.dut.some.net
case 'u' :
arg1 = strtok(NULL, "^");
handle = vpi_handle_by_name(arg1, NULL);
timescale = vpi_get(vpiTimePrecision, handle);
sprintf(msg, "%d\n", timescale);
client_put(msg);
break;
default :
origen_log(LOG_ERROR, "Illegal message received from Origen: %s", orig_msg);
runtime_errors += 1;
Expand Down
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