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eda: introduce board type #50

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1,525 changes: 1,525 additions & 0 deletions eda/board.go

Large diffs are not rendered by default.

6 changes: 1 addition & 5 deletions eda/cfg.go
Original file line number Diff line number Diff line change
Expand Up @@ -87,9 +87,6 @@ type config struct {
cshaper uint32 // capacity shaper

db dbConfig // configuration from tmv-db

buf [szCfgHR]byte
data []byte
}

daq struct {
Expand Down Expand Up @@ -126,7 +123,6 @@ func newConfig() config {
cfg.hr.db = newDbConfig()
cfg.hr.cshaper = 3
cfg.daq.mode = "dcc"
cfg.hr.data = cfg.hr.buf[4:]
return cfg
}

Expand Down Expand Up @@ -161,7 +157,7 @@ func (dev *Device) configASICs(dif uint8) error {
n = len(cfg)
)
for i, v := range cfg {
dev.hrscSetBit(ihr, uint32(n-1-i), uint32(v))
dev.brd.hrscSetBit(ihr, uint32(n-1-i), uint32(v))
}
}
return nil
Expand Down
74 changes: 37 additions & 37 deletions eda/cfg_test.go
Original file line number Diff line number Diff line change
Expand Up @@ -68,8 +68,8 @@ func TestCompareConfig(t *testing.T) {
for i := range asics {
var (
ihr = (nHR - 1 - i) * nBytesCfgHR
buf1 = devDB.cfg.hr.data[ihr : ihr+nBytesCfgHR]
buf2 = devCSV.cfg.hr.data[ihr : ihr+nBytesCfgHR]
buf1 = devDB.brd.sli[ihr : ihr+nBytesCfgHR]
buf2 = devCSV.brd.sli[ihr : ihr+nBytesCfgHR]
)
if !bytes.Equal(buf1, buf2) {
t.Errorf("asic-%d: hr-data NOT OK", i)
Expand All @@ -83,9 +83,9 @@ func TestCompareConfig(t *testing.T) {
func testCfgWithDB(dev *Device, asics []conddb.ASIC, rshaper uint32, rfms []int) error {
WithRShaper(rshaper)(&dev.cfg)
dev.cfg.hr.cshaper = 3
dev.cfg.hr.data = dev.cfg.hr.buf[4:]
dev.cfg.hr.db = newDbConfig()
dev.rfms = rfms
dev.brd = newBoard(dev.msg)

{
rfmID := asics[0].DIFID
Expand All @@ -95,22 +95,22 @@ func testCfgWithDB(dev *Device, asics []conddb.ASIC, rshaper uint32, rfms []int)
return fmt.Errorf("could not configure ASICs for rfm=%d: %w", rfmID, err)
}
}
dev.hrscSetBit(0, 854, 0)
dev.brd.hrscSetBit(0, 854, 0)

dev.hrscSetRShaper(0, dev.cfg.hr.rshaper)
dev.hrscSetCShaper(0, dev.cfg.hr.cshaper)
dev.brd.hrscSetRShaper(0, dev.cfg.hr.rshaper)
dev.brd.hrscSetCShaper(0, dev.cfg.hr.cshaper)

dev.hrscCopyConf(1, 0)
dev.hrscCopyConf(2, 0)
dev.hrscCopyConf(3, 0)
dev.hrscCopyConf(4, 0)
dev.hrscCopyConf(5, 0)
dev.hrscCopyConf(6, 0)
dev.hrscCopyConf(7, 0)
dev.brd.hrscCopyConf(1, 0)
dev.brd.hrscCopyConf(2, 0)
dev.brd.hrscCopyConf(3, 0)
dev.brd.hrscCopyConf(4, 0)
dev.brd.hrscCopyConf(5, 0)
dev.brd.hrscCopyConf(6, 0)
dev.brd.hrscCopyConf(7, 0)

// set chip IDs
for hr := uint32(0); hr < nHR; hr++ {
dev.hrscSetChipID(hr, hr+1)
dev.brd.hrscSetChipID(hr, hr+1)
}

for i := range dev.rfms {
Expand All @@ -122,12 +122,12 @@ func testCfgWithDB(dev *Device, asics []conddb.ASIC, rshaper uint32, rfms []int)
m2 := bitU64(asics[hr].Mask2, ch)

mask := uint32(m0 | m1<<1 | m2<<2)
dev.hrscSetMask(hr, ch, mask)
dev.brd.hrscSetMask(hr, ch, mask)
}

dev.hrscSetDAC0(hr, uint32(asics[hr].B0))
dev.hrscSetDAC1(hr, uint32(asics[hr].B1))
dev.hrscSetDAC2(hr, uint32(asics[hr].B2))
dev.brd.hrscSetDAC0(hr, uint32(asics[hr].B0))
dev.brd.hrscSetDAC1(hr, uint32(asics[hr].B1))
dev.brd.hrscSetDAC2(hr, uint32(asics[hr].B2))

for ch := uint32(0); ch < nChans; ch++ {
v, err := strconv.ParseUint(string(asics[hr].PreAmpGain[2*ch:2*ch+2]), 16, 8)
Expand All @@ -136,7 +136,7 @@ func testCfgWithDB(dev *Device, asics []conddb.ASIC, rshaper uint32, rfms []int)
}
gain := uint32(v)
dev.cfg.preamp.gains[nChans*(nHR*rfm+hr)+ch] = gain
dev.hrscSetPreAmp(hr, ch, gain)
dev.brd.hrscSetPreAmp(hr, ch, gain)
}
}
}
Expand All @@ -149,10 +149,10 @@ func testCfgWithCSV(dev *Device, thresh, rshaper uint32, rfms []int) error {
WithRShaper(rshaper)(&dev.cfg)
dev.cfg.hr.db = newDbConfig()
dev.cfg.hr.cshaper = 3
dev.cfg.hr.data = dev.cfg.hr.buf[4:]
dev.rfms = rfms
dev.brd = newBoard(dev.msg)

err := dev.hrscReadConf(dev.cfg.hr.fname, 0)
err := dev.brd.hrscReadConf(dev.cfg.hr.fname, 0)
if err != nil {
return fmt.Errorf("eda: could load single-HR configuration file: %w", err)
}
Expand All @@ -173,22 +173,22 @@ func testCfgWithCSV(dev *Device, thresh, rshaper uint32, rfms []int) error {
}

// disable trig_out output pin (RFM v1 coupling problem)
dev.hrscSetBit(0, 854, 0)
dev.brd.hrscSetBit(0, 854, 0)

dev.hrscSetRShaper(0, dev.cfg.hr.rshaper)
dev.hrscSetCShaper(0, dev.cfg.hr.cshaper)
dev.brd.hrscSetRShaper(0, dev.cfg.hr.rshaper)
dev.brd.hrscSetCShaper(0, dev.cfg.hr.cshaper)

dev.hrscCopyConf(1, 0)
dev.hrscCopyConf(2, 0)
dev.hrscCopyConf(3, 0)
dev.hrscCopyConf(4, 0)
dev.hrscCopyConf(5, 0)
dev.hrscCopyConf(6, 0)
dev.hrscCopyConf(7, 0)
dev.brd.hrscCopyConf(1, 0)
dev.brd.hrscCopyConf(2, 0)
dev.brd.hrscCopyConf(3, 0)
dev.brd.hrscCopyConf(4, 0)
dev.brd.hrscCopyConf(5, 0)
dev.brd.hrscCopyConf(6, 0)
dev.brd.hrscCopyConf(7, 0)

// set chip IDs
for hr := uint32(0); hr < nHR; hr++ {
dev.hrscSetChipID(hr, hr+1)
dev.brd.hrscSetChipID(hr, hr+1)
}

// for each active RFM, tune the configuration and send it.
Expand All @@ -197,7 +197,7 @@ func testCfgWithCSV(dev *Device, thresh, rshaper uint32, rfms []int) error {
for hr := uint32(0); hr < nHR; hr++ {
for ch := uint32(0); ch < nChans; ch++ {
mask := dev.cfg.mask.table[nChans*(nHR*uint32(rfm)+hr)+ch]
dev.hrscSetMask(hr, ch, mask)
dev.brd.hrscSetMask(hr, ch, mask)
}
}

Expand All @@ -210,15 +210,15 @@ func testCfgWithCSV(dev *Device, thresh, rshaper uint32, rfms []int) error {
th0 := dev.cfg.daq.floor[3*(nHR*uint32(rfm)+hr)+0]
th1 := dev.cfg.daq.floor[3*(nHR*uint32(rfm)+hr)+1]
th2 := dev.cfg.daq.floor[3*(nHR*uint32(rfm)+hr)+2]
dev.hrscSetDAC0(hr, th0)
dev.hrscSetDAC1(hr, th1)
dev.hrscSetDAC2(hr, th2)
dev.brd.hrscSetDAC0(hr, th0)
dev.brd.hrscSetDAC1(hr, th1)
dev.brd.hrscSetDAC2(hr, th2)
}

for hr := uint32(0); hr < nHR; hr++ {
for ch := uint32(0); ch < nChans; ch++ {
gain := dev.cfg.preamp.gains[nChans*hr+ch]
dev.hrscSetPreAmp(hr, ch, gain)
dev.brd.hrscSetPreAmp(hr, ch, gain)
}
}

Expand Down
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