8359435: AArch64: add support for 8.5 SB instruction

[eastig]

Speculation Barrier (SB) instruction can be used instead of a pair of DSB, ISB if supported. It should have better performance than DSB+ISB (https://developer.arm.com/documentation/102825/0100):

... a DSB+ISB sequence is expected to have a significantly greater impact on performance than an SB ...

CPUs supporting it:

• Apple M2+
• Neoverse-N2
• Neoverse-V2

Tested:

• Gtests passed

---

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Issue

• JDK-8359435: AArch64: add support for 8.5 SB instruction (Enhancement - P4)

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[eastig]

Hi @theRealAph ,
Could you please take a look?

[mlbridge]

Webrevs

• 00: Full (74c37f19)

[theRealAph]

I think this can wait until we have a use for SB.

[eastig]

The case is to use it for spin pauses instead of ISB on Neoverse-N2/V2.
There is data SB-based spin pauses are less disruptive then ISB-based one on them, so performance is better:

• Adding 'sb' instruction to spin_delay() for ARM v8.5 onward mysql/mysql-server#611
• Switch aarch64 pause to sb on armv9a+ facebook/folly#2390

There are discussions regarding using it for spin pauses:

• Adding 'sb' instruction to spin_delay() for ARM v8.5 onward gperftools/gperftools#1594
• Adding 'sb' instruction for spin_delay for ARM v8.5 onward haproxy/haproxy#2974

Do you think it is better to have a PR combining this PR and use of SB for spin pauses?

[eastig]

BTW Arm published a post in their blog about different implementations of spin pauses: https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/multi-threaded-applications-arm
A high accuracy delay requires FEAT_SB (Armv8.5-A), FEAT_ECV (Armv8.6-A) and FEAT_WFxT (Armv8.7-A).

[shipilev]

FWIW, I don't mind the SB assembler support to go under this, separate PR. We sometimes do it to split the work in the series of atomic commits, where the commit like this should certainly be non-regressing. The actual use of SB (spin-pauses) can then come under separate RFE, and would require much more work (and have associated risk).

So, it would be tad less confusing if we had a dependent RFE for using SB in spin pauses, so it was obvious why do we need it.

[theRealAph]

Do you think it is better to have a PR combining this PR and use of SB for spin pauses?

Yes, definitely, otherwise we're pushing dead code. Thanks.

[theRealAph]

So, it would be tad less confusing if we had a dependent RFE for using SB in spin pauses, so it was obvious why do we need it.

Huh? The least confusing is when the SB support goes in the PR where it is used. That really is obvious, without any dependency chain.