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asterix: scrub watchdog and PMIC settings [FIRM-82] #182
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asterix: scrub watchdog and PMIC settings [FIRM-82] #182
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{ BUCK_BASE, BUCKENCTRL, 0 }, | ||
{ BUCK_BASE, BUCKVRETCTRL, 0 }, | ||
{ BUCK_BASE, BUCKPWMCTRL, 0 }, | ||
{ BUCK_BASE, BUCKSWCTRLSET, BUCKSWCTRLSET_BUCK1SWCTRLSET | BUCKSWCTRLSET_BUCK2SWCTRLSET /* use registers rather than resistor settings */ }, |
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note: vset resistors will always force nominal voltages (1.8 and 3.0V), so it may be unsafe to allow sw controlled values here.
Also, as a general comment: holding the back button for 10s will reset the PMIC, so we have a known path to go back to a safe state in case things go terribly wrong.
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Well, it will reset the PMIC as long as LPRESETCFG is set properly!
But I would like to explicitly set these values, because 1) analog straps always kind of scare me, and 2) when we set them explicitly, the behavior changes in at least some way (!) vs. when we leave them implicitly set from Rset.
{ ADC_BASE, ADCNTCRSEL, ADCNTCRSEL_10K }, | ||
{ CHARGER_BASE, BCHGVTERM, BCHGVTERMNORM_4V20 }, | ||
{ CHARGER_BASE, BCHGVTERMR, BCHGVTERMREDUCED_4V00 }, | ||
{ CHARGER_BASE, BCHGISETMSB, 38 }, |
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0.5C may still be a safer limit here, considering discharge can be adjusted independently
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Really, 1C will be fine. (Actually, 1C will be too slow for most users and we will want to turn it up even further in firmware.) But 1C is definitely safe for the bootloader to do.
// GPIO0 is nPM_RST input (from debug header). Sadly for us, that's not | ||
// how nPM1300 works: you can't wire GPIO0 to be a reset, you can only | ||
// wire it to be part of a two-finger reset. So we just set it up to | ||
// generate an event on falling edge, and I guess nRF can poll for it, | ||
// assuming it doesn't otherwise get reset on its own. | ||
{ GPIOS_BASE, GPIOMODE0, GPIOMODE_GPIEVENTFALL }, | ||
{ GPIOS_BASE, GPIOPUEN0, 1 }, | ||
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// GPIO1 is nPM interrupt output to nRF (but nRF must enable PU if it wants it, to save on Iddq) | ||
{ GPIOS_BASE, GPIOMODE1, GPIOMODE_GPOIRQ }, | ||
{ GPIOS_BASE, GPIOOPENDRAIN0, 1 }, |
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probably irrelevant as bootloader does not handle any PMIC event. firmware can take care of this
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Agreed, left everything as an input.
{ BUCK_BASE, BUCK1NORMVOUT, BUCKVOUT_1V8 }, | ||
{ BUCK_BASE, BUCK1RETVOUT, BUCKVOUT_1V8 }, | ||
{ BUCK_BASE, BUCK2NORMVOUT, BUCKVOUT_3V0 }, | ||
{ BUCK_BASE, BUCK2RETVOUT, BUCKVOUT_3V0 }, |
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see previous comment
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@gmarull Updated some -- have a look? |
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blurgh that gitlint is really cramping my style. Updated again to make it happier. |
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can you rebase and re-bump bootloader bins?
Yep I will do that in the morning, if everything else is ok with you you can approve-pending and I won't merge until I do |
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lgtm, pending rebase and bin bump
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Signed-off-by: Joshua Wise <[email protected]>
Signed-off-by: Joshua Wise <[email protected]>
Signed-off-by: Joshua Wise <[email protected]>
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