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6 changes: 6 additions & 0 deletions src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -585,6 +585,12 @@ where
.modify(|_, w| unsafe { w.lse().bits(EXTENDED_FILTER_MAX) });
}

// Set all of the per-mailbox/per-buffer transmission interrupt flags,
// so that Interrupt::TxComplete and Interrupt::TxCancel will fire if
// enabled
can.txbtie.write(|w| unsafe { w.tie().bits(u32::MAX) });
can.txbcie.write(|w| unsafe { w.cf().bits(u32::MAX) });

for fid in 0..STANDARD_FILTER_MAX {
self.set_standard_filter((fid as u8).into(), StandardFilter::disable());
}
Expand Down
15 changes: 13 additions & 2 deletions src/pac/fdcan.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,11 @@ pub use ir_g0_g4_l5 as ir;
pub use rxgfc_g0_g4_l5 as rxgfc;
#[cfg(feature = "fdcan_g0_g4_l5")]
pub use txbc_g0_g4_l5 as txbc;
#[cfg(feature = "fdcan_g0_g4_l5")]
pub use txbcie_g0_g4_l5 as txbcie;
#[cfg(feature = "fdcan_g0_g4_l5")]
pub use txbtie_g0_g4_l5 as txbtie;


#[cfg(feature = "fdcan_h7")]
pub use ie_h7 as ie;
Expand All @@ -24,6 +29,10 @@ pub use ir_h7 as ir;
pub use rxgfc_h7 as rxgfc;
#[cfg(feature = "fdcan_h7")]
pub use txbc_h7 as txbc;
#[cfg(feature = "fdcan_h7")]
pub use txbcie_h7 as txbcie;
#[cfg(feature = "fdcan_h7")]
pub use txbtie_h7 as txbtie;

///Register block
#[repr(C)]
Expand Down Expand Up @@ -390,11 +399,13 @@ pub mod txbcf;
///TXBTIE register accessor: an alias for `Reg<TXBTIE_SPEC>`
pub type TXBTIE = crate::Reg<txbtie::TXBTIE_SPEC>;
///FDCAN Tx Buffer Transmission Interrupt Enable Register
pub mod txbtie;
pub mod txbtie_g0_g4_l5;
pub mod txbtie_h7;
///TXBCIE register accessor: an alias for `Reg<TXBCIE_SPEC>`
pub type TXBCIE = crate::Reg<txbcie::TXBCIE_SPEC>;
///FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register
pub mod txbcie;
pub mod txbcie_g0_g4_l5;
pub mod txbcie_h7;
///TXEFC register accessor: an alias for `Reg<TXEFC_SPEC>`
pub type TXEFC = crate::Reg<txefc::TXEFC_SPEC>;
///FDCAN Tx Event FIFO Configuration Register
Expand Down
106 changes: 106 additions & 0 deletions src/pac/fdcan/txbcie_g0_g4_l5.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,106 @@
///Register `TXBCIE` reader
pub struct R(crate::R<TXBCIE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TXBCIE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TXBCIE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TXBCIE_SPEC>) -> Self {
R(reader)
}
}
///Register `TXBCIE` writer
pub struct W(crate::W<TXBCIE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TXBCIE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TXBCIE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TXBCIE_SPEC>) -> Self {
W(writer)
}
}
///Field `CF` reader - Cancellation Finished Interrupt Enable
pub struct CF_R(crate::FieldReader<u32, u32>);
impl CF_R {
pub(crate) fn new(bits: u32) -> Self {
CF_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for CF_R {
type Target = crate::FieldReader<u32, u32>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
///Field `CF` writer - Cancellation Finished Interrupt Enable
pub struct CF_W<'a> {
w: &'a mut W,
}
impl<'a> CF_W<'a> {
///Writes raw bits to the field
#[inline(always)]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
self.w.bits = (self.w.bits & !0x7) | (value as u32 & 0x7);
self.w
}
}
impl R {
///Bits 0:2 - Cancellation Finished Interrupt Enable
#[inline(always)]
pub fn cf(&self) -> CF_R {
CF_R::new((self.bits & 0x7) as u32)
}
}
impl W {
///Bits 0:2- Cancellation Finished Interrupt Enable
#[inline(always)]
pub fn cf(&mut self) -> CF_W {
CF_W { w: self }
}
///Writes raw bits to the register.
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
///FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register
///
///This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
///
///For information about available fields see [txbcie](index.html) module
pub struct TXBCIE_SPEC;
impl crate::RegisterSpec for TXBCIE_SPEC {
type Ux = u32;
}
///`read()` method returns [txbcie::R](R) reader structure
impl crate::Readable for TXBCIE_SPEC {
type Reader = R;
}
///`write(|w| ..)` method takes [txbcie::W](W) writer structure
impl crate::Writable for TXBCIE_SPEC {
type Writer = W;
}
///`reset()` method sets TXBCIE to value 0
impl crate::Resettable for TXBCIE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
File renamed without changes.
106 changes: 106 additions & 0 deletions src/pac/fdcan/txbtie_g0_g4_l5.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,106 @@
///Register `TXBTIE` reader
pub struct R(crate::R<TXBTIE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TXBTIE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TXBTIE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TXBTIE_SPEC>) -> Self {
R(reader)
}
}
///Register `TXBTIE` writer
pub struct W(crate::W<TXBTIE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TXBTIE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TXBTIE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TXBTIE_SPEC>) -> Self {
W(writer)
}
}
///Field `TIE` reader - Transmission Interrupt Enable
pub struct TIE_R(crate::FieldReader<u32, u32>);
impl TIE_R {
pub(crate) fn new(bits: u32) -> Self {
TIE_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TIE_R {
type Target = crate::FieldReader<u32, u32>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
///Field `TIE` writer - Transmission Interrupt Enable
pub struct TIE_W<'a> {
w: &'a mut W,
}
impl<'a> TIE_W<'a> {
///Writes raw bits to the field
#[inline(always)]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
self.w.bits = (self.w.bits & !0x7) | (value as u32 & 0x7);
self.w
}
}
impl R {
///Bits 0:2 - Transmission Interrupt Enable
#[inline(always)]
pub fn tie(&self) -> TIE_R {
TIE_R::new((self.bits & 0x7) as u32)
}
}
impl W {
///Bits 0:2 - Transmission Interrupt Enable
#[inline(always)]
pub fn tie(&mut self) -> TIE_W {
TIE_W { w: self }
}
///Writes raw bits to the register.
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
///FDCAN Tx Buffer Transmission Interrupt Enable Register
///
///This register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
///
///For information about available fields see [txbtie](index.html) module
pub struct TXBTIE_SPEC;
impl crate::RegisterSpec for TXBTIE_SPEC {
type Ux = u32;
}
///`read()` method returns [txbtie::R](R) reader structure
impl crate::Readable for TXBTIE_SPEC {
type Reader = R;
}
///`write(|w| ..)` method takes [txbtie::W](W) writer structure
impl crate::Writable for TXBTIE_SPEC {
type Writer = W;
}
///`reset()` method sets TXBTIE to value 0
impl crate::Resettable for TXBTIE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
File renamed without changes.