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Move pin af definitions to a universal pin_mappings file #29

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fde2dba
Move pin af definitions to a universal pin_mappings file
david-sawatzke Jan 1, 2019
221ef90
Move i2c mappings to pin_mappings
david-sawatzke Jan 1, 2019
be3604f
Fix the mappings a bit
david-sawatzke Jan 1, 2019
70121a4
Implement specific pin bindings as subsets of families
david-sawatzke Jan 1, 2019
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128 changes: 0 additions & 128 deletions src/i2c.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,134 +17,6 @@ pub struct I2c<I2C, SCLPIN, SDAPIN> {
pub trait SclPin<I2C> {}
pub trait SdaPin<I2C> {}

macro_rules! i2c_pins {
($($I2C:ident => {
scl => [$($scl:ty),+ $(,)*],
sda => [$($sda:ty),+ $(,)*],
})+) => {
$(
$(
impl SclPin<crate::stm32::$I2C> for $scl {}
)+
$(
impl SdaPin<crate::stm32::$I2C> for $sda {}
)+
)+
}
}

#[cfg(any(
feature = "stm32f030",
feature = "stm32f031",
feature = "stm32f038",
feature = "stm32f042",
feature = "stm32f048",
feature = "stm32f051",
feature = "stm32f058",
feature = "stm32f070",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f078",
feature = "stm32f091",
feature = "stm32f098",
))]
i2c_pins! {
I2C1 => {
scl => [gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
sda => [gpiob::PB7<Alternate<AF1>>, gpiob::PB9<Alternate<AF1>>],
}
}
#[cfg(any(
feature = "stm32f030x4",
feature = "stm32f030x6",
feature = "stm32f030xc",
feature = "stm32f031",
feature = "stm32f038",
feature = "stm32f042",
feature = "stm32f048",
feature = "stm32f070x6",
feature = "stm32f091",
feature = "stm32f098",
))]
i2c_pins! {
I2C1 => {
scl => [gpioa::PA9<Alternate<AF4>>],
sda => [gpioa::PA10<Alternate<AF4>>],
}
}
#[cfg(any(feature = "stm32f030", feature = "stm32f042", feature = "stm32f048"))]
i2c_pins! {
I2C1 => {
scl => [gpioa::PA11<Alternate<AF5>>],
sda => [gpioa::PA12<Alternate<AF5>>],
}
}
#[cfg(any(
feature = "stm32f030x4",
feature = "stm32f030x6",
feature = "stm32f031",
feature = "stm32f038",
feature = "stm32f042",
feature = "stm32f048",
))]
i2c_pins! {
I2C1 => {
scl => [gpiob::PB10<Alternate<AF1>>],
sda => [gpiob::PB11<Alternate<AF1>>],
}
}
#[cfg(any(feature = "stm32f030xc", feature = "stm32f042", feature = "stm32f048"))]
i2c_pins! {
I2C1 => {
scl => [gpiob::PB13<Alternate<AF5>>],
sda => [gpiob::PB14<Alternate<AF5>>],
}
}
#[cfg(any(
feature = "stm32f030xc",
feature = "stm32f042",
feature = "stm32f048",
feature = "stm32f070x6",
feature = "stm32f091",
feature = "stm32f098",
))]
i2c_pins! {
I2C1 => {
scl => [gpiof::PF1<Alternate<AF1>>],
sda => [gpiof::PF0<Alternate<AF1>>],
}
}

#[cfg(any(feature = "stm32f030x8", feature = "stm32f051", feature = "stm32f058"))]
i2c_pins! {
I2C2 => {
scl => [gpiob::PB10<Alternate<AF1>>],
sda => [gpiob::PB11<Alternate<AF1>>],
}
}
#[cfg(any(
feature = "stm32f030xc",
feature = "stm32f070xb",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f078",
feature = "stm32f091",
feature = "stm32f098",
))]
i2c_pins! {
I2C2 => {
scl => [gpiob::PB10<Alternate<AF1>>, gpiob::PB13<Alternate<AF5>>],
sda => [gpiob::PB11<Alternate<AF1>>, gpiob::PB14<Alternate<AF5>>],
}
}
#[cfg(any(feature = "stm32f091", feature = "stm32f098"))]
i2c_pins! {
I2C2 => {
scl => [gpioa::PA11<Alternate<AF5>>],
sda => [gpioa::PA12<Alternate<AF5>>],
}
}

#[derive(Debug)]
pub enum Error {
OVERRUN,
Expand Down
2 changes: 2 additions & 0 deletions src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,8 @@ pub mod gpio;
#[cfg(feature = "device-selected")]
pub mod i2c;
#[cfg(feature = "device-selected")]
pub mod pin_mappings;
#[cfg(feature = "device-selected")]
pub mod prelude;
#[cfg(feature = "device-selected")]
pub mod rcc;
Expand Down
187 changes: 187 additions & 0 deletions src/pin_mappings.rs
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Original file line number Diff line number Diff line change
@@ -0,0 +1,187 @@
#[cfg(feature = "device-selected")]
use crate::gpio::gpioa::*;
#[cfg(feature = "device-selected")]
use crate::gpio::gpiob::*;
#[allow(unused)]
#[cfg(feature = "device-selected")]
use crate::gpio::gpioc::*;
#[cfg(feature = "stm32f030")]
use crate::gpio::gpiod::*;
#[allow(unused)]
#[cfg(feature = "device-selected")]
use crate::gpio::gpiof::*;
#[allow(unused)]
use crate::gpio::{Alternate, AF0, AF1, AF2, AF4, AF5};
use crate::i2c::*;
use crate::serial::*;
use crate::spi::*;
#[cfg(feature = "device-selected")]
use crate::stm32::*;

macro_rules! pins {
($($PIN:ident => {
$($AF:ty: $TRAIT:ty),+
}),+) => {
$(
$(
impl $TRAIT for $PIN<Alternate<$AF>> {}
)+
)+
}
}

#[cfg(feature = "device-selected")]
pins! {
PA5 => {AF0: SckPin<SPI1>},
PA6 => {AF0: MisoPin<SPI1>},
PA7 => {AF0: MosiPin<SPI1>},
PA9 => {AF1: TxPin<USART1>},
PA10 => {AF1: RxPin<USART1>},
PB3 => {AF0: SckPin<SPI1>},
PB4 => {AF0: MisoPin<SPI1>},
PB5 => {AF0: MosiPin<SPI1>},
PB6 => {
AF0: TxPin<USART1>,
AF1: SclPin<I2C1>
},
PB7 => {
AF0: RxPin<USART1>,
AF1: SdaPin<I2C1>
},
PB8 => {AF1: SclPin<I2C1>},
PB9 => {AF1: SdaPin<I2C1>}
}

#[cfg(feature = "stm32f030")]
pins! {
PA0 => {AF4: TxPin<USART4>},
PA1 => {AF4: RxPin<USART4>},
PA4 => {AF5: TxPin<USART6>},
PA5 => {AF5: RxPin<USART6>},
PA11 => {AF5: SclPin<I2C1>},
PA12 => {AF5: SdaPin<I2C1>},
PB3 => {AF4: TxPin<USART5>},
PB4 => {AF4: RxPin<USART5>},
PB10 => {
AF4: TxPin<USART3>,
AF5: SckPin<SPI2>
},
PB11 => {AF4: RxPin<USART3>},
PC2 => {AF1: MisoPin<SPI2>},
PC3 => {AF1: MosiPin<SPI2>},
PC4 => {AF1: TxPin<USART3>},
PC5 => {AF1: RxPin<USART3>},
PC10 => {
AF0: TxPin<USART4>,
AF1: TxPin<USART3>
},
PC11 => {
AF0: RxPin<USART4>,
AF1: RxPin<USART3>
},
PC0 => {AF2: TxPin<USART6>},
PC1 => {AF2: RxPin<USART6>},
PC12 => {AF2: RxPin<USART5>},
PD2 => {AF2: TxPin<USART5>}
}

#[cfg(feature = "stm32f030x6")]
pins! {
PA2 => {AF1: TxPin<USART1>},
PA3 => {AF1: RxPin<USART1>},
PA9 => {AF4: SclPin<I2C1>},
PA10 => {AF4: SdaPin<I2C1>},
PA14 => {AF1: TxPin<USART1>},
PA15 => {AF1: RxPin<USART1>},
PB10 => {AF1: SclPin<I2C1>},
PB11 => {AF1: SdaPin<I2C1>},
PB13 => {AF0: SckPin<SPI1>},
PB14 => {AF0: MisoPin<SPI1>},
PB15 => {AF0: MosiPin<SPI1>}
}

#[cfg(any(feature = "stm32f030x8", feature = "stm32f030xc"))]
pins! {
PA2 => {AF1: TxPin<USART2>},
PA3 => {AF1: RxPin<USART2>},
PA14 => {AF1: TxPin<USART2>},
PA15 => {AF1: RxPin<USART2>},
PB10 => {AF1: SclPin<I2C2>},
PB11 => {AF1: SdaPin<I2C1>},
PB13 => {AF0: SckPin<SPI2>},
PB14 => {AF0: MisoPin<SPI2>},
PB15 => {AF0: MosiPin<SPI2>}
}

#[cfg(any(feature = "stm32f030xc",))]
pins! {
PA9 => {AF4: SclPin<I2C1>},
PA10 => {AF4: SdaPin<I2C1>},
PB13 => {AF5: SclPin<I2C1>},
PB14 => {AF5: SdaPin<I2C1>},
PF0 => {AF1: SdaPin<I2C1>},
PF1 => {AF1: SclPin<I2C1>}
}

#[cfg(feature = "stm32f042")]
pins! {
PA11 => {AF5: SclPin<I2C1>},
PA12 => {AF5: SdaPin<I2C1>},
PA2 => {AF1: TxPin<USART2>},
PA3 => {AF1: RxPin<USART2>},
PA9 => {AF4: SclPin<I2C1>},
PA10 => {AF4: SdaPin<I2C1>},
PA14 => {AF1: TxPin<USART2>},
PA15 => {AF1: RxPin<USART2>},
PB10 => {AF1: SclPin<I2C1>},
PB11 => {AF1: SdaPin<I2C1>},
PB13 => {AF5: SclPin<I2C1>},
PB14 => {AF5: SdaPin<I2C1>},
PF0 => {AF1: SdaPin<I2C1>},
PF1 => {AF1: SclPin<I2C1>}
}

#[cfg(feature = "stm32f070")]
pins! {
PA0 => {AF4: TxPin<USART4>},
PA1 => {AF4: RxPin<USART4>},
PA2 => {AF1: TxPin<USART2>},
PA3 => {AF1: RxPin<USART2>},
PA14 => {AF1: TxPin<USART2>},
PA15 => {AF1: RxPin<USART2>},
PB10 => {
AF4: TxPin<USART3>,
AF5: SckPin<SPI2>
},
PB11 => {AF4: RxPin<USART3>},
PC2 => {AF1: MisoPin<SPI2>},
PC3 => {AF1: MosiPin<SPI2>},
PC4 => {AF1: TxPin<USART3>},
PC5 => {AF1: RxPin<USART3>},
PC10 => {
AF0: TxPin<USART4>,
AF1: TxPin<USART3>
},
PC11 => {
AF0: RxPin<USART4>,
AF1: RxPin<USART3>
}
}

#[cfg(feature = "stm32f070xb")]
pins! {
PB10 => {AF1: SclPin<I2C1>},
PB11 => {AF1: SdaPin<I2C1>},
PB13 => {AF0: SckPin<SPI2>},
PB14 => {AF0: MisoPin<SPI2>},
PB13 => {AF5: SclPin<I2C1>},
PB14 => {AF5: SdaPin<I2C1>},
PB15 => {AF0: MosiPin<SPI2>}
}
#[cfg(feature = "stm32f070x6")]
pins! {
PA9 => {AF4: SclPin<I2C1>},
PA10 => {AF4: SdaPin<I2C1>},
PF0 => {AF1: SdaPin<I2C1>},
PF1 => {AF1: SclPin<I2C1>}
}
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