@@ -59,7 +59,9 @@ impl<B, C: Channel, T: Target> Transfer<B, C, T> {
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let ( ptr, len) = unsafe { buffer. write_buffer ( ) } ;
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let len = u16 ( len) . expect ( "buffer is too large" ) ;
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- channel. set_memory_address ( ptr as u32 , Increment :: Enable ) ;
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+ // NOTE(unsafe) We are using the address of a 'static WriteBuffer here,
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+ // which is guaranteed to be safe for DMA.
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+ unsafe { channel. set_memory_address ( ptr as u32 , Increment :: Enable ) } ;
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channel. set_transfer_length ( len) ;
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channel. set_word_size :: < B :: Word > ( ) ;
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channel. set_direction ( Direction :: FromPeripheral ) ;
@@ -84,7 +86,9 @@ impl<B, C: Channel, T: Target> Transfer<B, C, T> {
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let ( ptr, len) = unsafe { buffer. read_buffer ( ) } ;
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let len = u16 ( len) . expect ( "buffer is too large" ) ;
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- channel. set_memory_address ( ptr as u32 , Increment :: Enable ) ;
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+ // NOTE(unsafe) We are using the address of a 'static ReadBuffer here,
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+ // which is guaranteed to be safe for DMA.
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+ unsafe { channel. set_memory_address ( ptr as u32 , Increment :: Enable ) } ;
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channel. set_transfer_length ( len) ;
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channel. set_word_size :: < B :: Word > ( ) ;
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channel. set_direction ( Direction :: FromMemory ) ;
@@ -477,7 +481,12 @@ pub trait Channel: private::Channel {
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/// # Panics
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///
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/// Panics if this channel is enabled.
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- fn set_peripheral_address ( & mut self , address : u32 , inc : Increment ) {
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+ ///
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+ /// # Safety
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+ ///
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+ /// Callers must ensure the given address is the address of a peripheral
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+ /// register that supports DMA.
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+ unsafe fn set_peripheral_address ( & mut self , address : u32 , inc : Increment ) {
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assert ! ( !self . is_enabled( ) ) ;
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self . ch ( ) . par . write ( |w| w. pa ( ) . bits ( address) ) ;
@@ -492,7 +501,12 @@ pub trait Channel: private::Channel {
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/// # Panics
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///
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/// Panics if this channel is enabled.
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- fn set_memory_address ( & mut self , address : u32 , inc : Increment ) {
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+ ///
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+ /// # Safety
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+ ///
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+ /// Callers must ensure the given address is a valid memory address
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+ /// that will remain valid as long as at is used by DMA.
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+ unsafe fn set_memory_address ( & mut self , address : u32 , inc : Increment ) {
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assert ! ( !self . is_enabled( ) ) ;
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self . ch ( ) . mar . write ( |w| w. ma ( ) . bits ( address) ) ;
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