Rtc v2

CHANGELOG.md

@@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Support for 16-bit words with SPI ([#107](https://github.com/stm32-rs/stm32f3xx-hal/pull/107))
 - SPI support for reclock after initialization ([#98](https://github.com/stm32-rs/stm32f3xx-hal/pull/98))
 - Support for `stm32f302x6` and `stm32f302x8` devices ([#132](https://github.com/stm32-rs/stm32f3xx-hal/pull/132))
+- Support for the onboard real-time clock (RTC) ([#136](https://github.com/stm32-rs/stm32f3xx-hal/pull/136))
 
 ## [v0.5.0] - 2020-07-21
 

Cargo.toml

@@ -22,6 +22,7 @@ embedded-dma = "0.1"
 embedded-hal = "0.2"
 nb = "0.1"
 stm32f3 = "0.11"
+rtcc = "0.2"
 
 [dependencies.bare-metal]
 version = "0.2"

src/lib.rs

@@ -131,6 +131,8 @@ pub mod pwm;
 #[cfg(feature = "device-selected")]
 pub mod rcc;
 #[cfg(feature = "device-selected")]
+pub mod rtc;
+#[cfg(feature = "device-selected")]
 pub mod serial;
 #[cfg(feature = "device-selected")]
 pub mod spi;

src/rcc.rs

@@ -20,6 +20,7 @@ impl RccExt for RCC {
             ahb: AHB { _0: () },
             apb1: APB1 { _0: () },
             apb2: APB2 { _0: () },
+            bdcr: BDCR { _0: () },
             cfgr: CFGR {
                 hse: None,
                 hclk: None,
@@ -48,6 +49,8 @@ pub struct Rcc {
     pub apb1: APB1,
     /// Advanced Peripheral Bus 2 (APB2) registers
     pub apb2: APB2,
+    /// RCC Backup Domain
+    pub bdcr: BDCR,
     /// Clock configuration
     pub cfgr: CFGR,
 }
@@ -190,6 +193,18 @@ mod usb_clocking {
     }
 }
 
+/// Backup Domain Control register (RCC_BDCR)
+pub struct BDCR {
+    _0: (),
+}
+
+impl BDCR {
+    pub(crate) fn bdcr(&mut self) -> &rcc::BDCR {
+        // NOTE(unsafe) this proxy grants exclusive access to this register
+        unsafe { &(*RCC::ptr()).bdcr }
+    }
+}
+
 /// Clock configuration
 ///
 /// An instance of this struct is aquired from the [Rcc](../struct.Rcc.html) struct.