The code

.github/workflows/ci.yml

@@ -0,0 +1,48 @@
+on:
+  pull_request:
+
+name: Continuous integration
+
+# Make sure CI fails on all warnings, including Clippy lints
+env:
+  RUSTFLAGS: "-Dwarnings"
+
+jobs:
+  ci:
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        rust:
+          - stable
+        device:
+          - stm32f334
+
+          - stm32h742
+          - stm32h743
+          #- stm32h745
+          - stm32h747cm7
+          - stm32h750
+          - stm32h753
+          #- stm32h755
+          #- stm32h757
+
+          - stm32g474
+          - stm32g484
+        features:
+          - defmt
+
+    steps:
+      - uses: actions/checkout@v2
+      - uses: actions-rs/toolchain@v1
+        with:
+          profile: minimal
+          toolchain: ${{ matrix.rust }}
+          target: thumbv7em-none-eabihf
+          override: true
+
+      - name: Regular build
+        run: cargo check --features ${{ matrix.device }} --features ${{ matrix.features }}
+      - name: Build examples
+        run: cargo check --examples --features ${{ matrix.device }} --features ${{ matrix.features }}
+      - name: Clippy
+        run: cargo clippy --examples --features ${{ matrix.device }} --features ${{ matrix.features }}

Cargo.toml

@@ -3,14 +3,26 @@ name = "stm32-hrtim"
 version = "0.1.0"
 edition = "2021"
 
+[patch.crates-io]
+stm32-hrtim = { path = "." }
+
+[patch."https://github.com/usbalbin/stm32-hrtim"]
+stm32-hrtim = { path = "." }
+
 [dependencies]
-stm32f3 = { version = "0.15.1", optional = true }
-stm32h7 = { version = "0.15.1", optional = true }
-stm32g4 = { version = "0.19.0", package = "stm32g4-staging", optional = true }
+stm32f3 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies", optional = true }
+stm32h7 = { git = "https://github.com/stm32-rs/stm32-rs-nightlies", features = ["critical-section"], optional = true }
+stm32g4 = { version = "0.22.0", package = "stm32g4-staging", optional = true }
 
-stm32f3xx-hal = { version = "0.10.0", optional = true }
-stm32h7xx-hal = { version = "0.16.0", optional = true }
-stm32g4xx-hal = { version = "0.0.1", optional = true }
+defmt = { version = "0.3.10", optional = true }
+fugit = "0.3.7"
+
+[dev-dependencies]
+cortex-m = { version = "0.7.7", features = ["critical-section-single-core"] }
+defmt-rtt = "0.4.0"
+cortex-m-rt = "0.7.2"
+panic-probe = { version = "0.3.0", features = ["print-defmt"] }
+stm32g4xx-hal = { git = "https://github.com/usbalbin/stm32g4xx-hal", branch = "hrtim", features = ["defmt", "hrtim"] }
 
 [features]
 default = []
@@ -19,18 +31,68 @@ hrtim_v1 = []
 hrtim_v1_1 = []
 hrtim_v2 = []
 
-stm32f334x4 = ["stm32f3", "stm32f3xx-hal/stm32f334x4", "hrtim_v1"]
-stm32f334x6 = ["stm32f3", "stm32f3xx-hal/stm32f334x6", "hrtim_v1"]
-stm32f334x8 = ["stm32f3", "stm32f3xx-hal/stm32f334x8", "hrtim_v1"]
-
-stm32h742 = ["stm32h7", "stm32h7xx-hal/stm32h742", "hrtim_v1_1"]
-stm32h743 = ["stm32h7", "stm32h7xx-hal/stm32h743", "hrtim_v1_1"]
-#stm32h745 = ["stm32h7", "stm32h7xx-hal/stm32h745", "hrtim_v1_1"]
-#stm32h747 = ["stm32h7", "stm32h7xx-hal/stm32h747", "hrtim_v1_1"]
-stm32h750 = ["stm32h7", "stm32h7xx-hal/stm32h750", "hrtim_v1_1"]
-stm32h753 = ["stm32h7", "stm32h7xx-hal/stm32h753", "hrtim_v1_1"]
-#stm32h755 = ["stm32h7", "stm32h7xx-hal/stm32h755", "hrtim_v1_1"]
-#stm32h757 = ["stm32h7", "stm32h7xx-hal/stm32h757", "hrtim_v1_1"]
-
-stm32g474 = ["stm32g4", "stm32g4xx-hal/stm32g474", "hrtim_v2"]
-stm32g484 = ["stm32g4", "stm32g4xx-hal/stm32g484", "hrtim_v2"]
+stm32f3 = ["stm32f3/stm32f3x4"]
+stm32h7 = ["dep:stm32h7"]
+stm32g4 = []
+
+stm32f334 = ["stm32f3/stm32f3x4", "hrtim_v1"]
+
+stm32h742 = ["stm32h7/stm32h742", "hrtim_v1_1"]
+stm32h743 = ["stm32h7/stm32h743", "hrtim_v1_1"]
+#stm32h745 = ["stm32h7/stm32h745", "hrtim_v1_1"]
+stm32h747cm7 = ["stm32h7/stm32h747cm7", "hrtim_v1_1"]
+stm32h750 = ["stm32h7/stm32h750", "hrtim_v1_1"]
+stm32h753 = ["stm32h7/stm32h753", "hrtim_v1_1"]
+#stm32h755 = ["stm32h7/stm32h755", "hrtim_v1_1"]
+#stm32h757 = ["stm32h7/stm32h757", "hrtim_v1_1"]
+
+stm32g474 = ["stm32g4/stm32g474", "stm32g4xx-hal/stm32g474", "hrtim_v2"]
+stm32g484 = ["stm32g4/stm32g484", "stm32g4xx-hal/stm32g484", "hrtim_v2"]
+defmt = ["dep:defmt", "fugit/defmt"]
+
+# G4
+
+[[example]]
+name = "stm32g4-adc-trigger"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/adc-trigger.rs"
+
+[[example]]
+name = "stm32g4-capture"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/capture.rs"
+
+[[example]]
+name = "stm32g4-capture-dma"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/capture-dma.rs"
+
+[[example]]
+name = "stm32g4-eev-comp"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/eev-comp.rs"
+
+[[example]]
+name = "stm32g4-eev"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/eev.rs"
+
+[[example]]
+name = "stm32g4-flt-comp"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/flt-comp.rs"
+
+[[example]]
+name = "stm32g4-flt"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/flt.rs"
+
+[[example]]
+name = "stm32g4"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/hrtim.rs"
+
+[[example]]
+name = "stm32g4-master"
+required-features = ["stm32g4"]
+path = "examples/stm32g4/master.rs"

examples/stm32g4/adc-trigger.rs

@@ -0,0 +1,160 @@
+#![no_std]
+#![no_main]
+
+/// Example showcasing the use of the HRTIM peripheral to trigger the ADC at various points of the switch cycle off HRTIM_TIMA
+use cortex_m_rt::entry;
+use panic_probe as _;
+use stm32_hrtim::{
+    compare_register::HrCompareRegister, output::HrOutput, timer::HrTimer, HrParts, HrPwmAdvExt,
+    Pscl4,
+};
+use stm32g4xx_hal::{
+    adc::{self, AdcClaim, ClockSource, Temperature, Vref},
+    delay::SYSTDelayExt,
+    dma::{self, channel::DMAExt, config::DmaConfig, TransferExt},
+    gpio::GpioExt,
+    hrtim::{HrControltExt, HrPwmBuilderExt},
+    pwr::PwrExt,
+    rcc::{self, RccExt},
+    stm32::{CorePeripherals, Peripherals},
+};
+
+#[entry]
+fn main() -> ! {
+    const VREF: f32 = 3.3;
+
+    defmt::info!("start");
+
+    let dp = Peripherals::take().unwrap();
+    let cp = CorePeripherals::take().expect("cannot take core peripherals");
+
+    // Set system frequency to 16MHz * 15/1/2 = 120MHz
+    // This would lead to HrTim running at 120MHz * 32 = 3.84...
+    defmt::info!("rcc");
+    let pwr = dp.PWR.constrain().freeze();
+    let mut rcc = dp.RCC.freeze(
+        rcc::Config::pll().pll_cfg(rcc::PllConfig {
+            mux: rcc::PllSrc::HSI,
+            n: rcc::PllNMul::MUL_15,
+            m: rcc::PllMDiv::DIV_1,
+            r: Some(rcc::PllRDiv::DIV_2),
+
+            ..Default::default()
+        }),
+        pwr,
+    );
+
+    let mut delay = cp.SYST.delay(&rcc.clocks);
+
+    let dma::channel::Channels { ch1: dma1ch1, .. } = dp.DMA1.split(&rcc);
+    let config = DmaConfig::default()
+        .transfer_complete_interrupt(true)
+        .circular_buffer(true)
+        .memory_increment(true);
+
+    defmt::info!("Setup Gpio");
+    let gpioa = dp.GPIOA.split(&mut rcc);
+    let pa0 = gpioa.pa0.into_analog();
+
+    let pin_a = gpioa.pa8;
+    let pin_b = gpioa.pa9;
+
+    // ...with a prescaler of 4 this gives us a HrTimer with a tick rate of 960MHz
+    // With max the max period set, this would be 960MHz/2^16 ~= 15kHz...
+    let prescaler = Pscl4;
+
+    //        .               .
+    //        .  50%          .
+    //         ------          ------
+    //out1    |      |        |      |
+    //        |      |        |      |
+    // --------      ----------      --------
+    //        .    ^     ^
+    //        .    |     |
+    //AD samlp    pa0   temp
+    let period = 0xFFFF;
+    let (hr_control, ..) = dp.HRTIM_COMMON.hr_control(&mut rcc).wait_for_calibration();
+    let mut hr_control = hr_control.constrain();
+    let HrParts {
+        mut timer,
+        mut cr1,
+        mut cr3,
+        mut cr4,
+        out: (mut out1, mut out2),
+        ..
+    } = dp
+        .HRTIM_TIMA
+        .pwm_advanced((pin_a, pin_b))
+        .prescaler(prescaler)
+        .period(period)
+        .finalize(&mut hr_control);
+
+    cr1.set_duty(period / 2);
+    cr3.set_duty(period / 3);
+    cr4.set_duty((2 * u32::from(period) / 3) as u16);
+
+    hr_control.adc_trigger1.enable_source(&cr3);
+    hr_control.adc_trigger1.enable_source(&cr4);
+
+    out1.enable_rst_event(&cr1); // Set low on compare match with cr1
+    out2.enable_rst_event(&cr1);
+
+    out1.enable_set_event(&timer); // Set high at new period
+    out2.enable_set_event(&timer);
+
+    defmt::info!("Setup Adc1");
+    let mut adc = dp
+        .ADC1
+        .claim(ClockSource::SystemClock, &rcc, &mut delay, true);
+
+    adc.set_external_trigger((
+        adc::config::TriggerMode::RisingEdge,
+        (&hr_control.adc_trigger1).into(),
+    ));
+    adc.enable_temperature(&dp.ADC12_COMMON);
+    adc.set_continuous(adc::config::Continuous::Discontinuous);
+    adc.reset_sequence();
+    adc.configure_channel(
+        &pa0,
+        adc::config::Sequence::One,
+        adc::config::SampleTime::Cycles_640_5,
+    );
+    adc.configure_channel(
+        &Temperature,
+        adc::config::Sequence::Two,
+        adc::config::SampleTime::Cycles_640_5,
+    );
+
+    defmt::info!("Setup DMA");
+    let first_buffer = cortex_m::singleton!(: [u16; 10] = [0; 10]).unwrap();
+
+    let mut transfer = dma1ch1.into_circ_peripheral_to_memory_transfer(
+        adc.enable_dma(adc::config::Dma::Continuous),
+        &mut first_buffer[..],
+        config,
+    );
+
+    transfer.start(|adc| adc.start_conversion());
+
+    out1.enable();
+    out2.enable();
+
+    timer.start(&mut hr_control.control);
+
+    loop {
+        let mut b = [0_u16; 4];
+        let r = transfer.read_exact(&mut b);
+
+        defmt::info!("read: {}", r);
+        assert!(r == b.len());
+
+        let millivolts = Vref::sample_to_millivolts((b[0] + b[2]) / 2);
+        defmt::info!("pa3: {}mV", millivolts);
+        let temp = Temperature::temperature_to_degrees_centigrade(
+            (b[1] + b[3]) / 2,
+            VREF,
+            adc::config::Resolution::Twelve,
+        );
+        defmt::info!("temp: {}℃C", temp);
+    }
+}