Fix soft float support, split musl triples by float ABI, and enable CI #21269

alexrp · 2024-08-31T22:21:16Z

This is the first round of soft float work that I'm doing.

There are 3 goals of this PR:

Get soft float actually working without generating unexpected FPU code.
Split musl target triples into soft float and hard float where relevant.
Start testing soft float targets in CI.

I'm completely ignoring -mfloat-abi=softfp support (soft float ABI with FPU computations) and in fact intentionally suppressing it in the LLVM backend as a result of the use-soft-float change. The only thing that matters for this first patch set is correctness; the next round of patches will re-enable support for this optimization in a way that actually functions correctly.

Note that a core premise of my work in this area is that, if the user specifies a soft float target triple, the default assumption should be that no FPU code is generated, even if the target CPU model happens to have FPU features. There's a very strong established precedent for this in the C/C++ world where you have to explicitly opt into this behavior by using -mfloat-abi=softfp instead of -mfloat-abi=soft (the latter being implied by the soft float triple). But even without that, everyone understands e.g. arm-linux-gnueabi to mean soft float, and it's just astonishing as a user if the resulting binary from zig build -Dtarget=arm-linux-gnueabi has FPU instructions in it and can't run on a fully soft float system.

I initially thought that adding soft float targets to CI wasn't necessary, but the state of our soft float support was broken enough that I've changed my mind on this, so this PR also includes those test additions. Let's see if it causes a noticeable slowdown, and if so, we can maybe limit it to Arm or something. (As usual, the MIPS O32 targets are gated by -Dtest-slow-targets which is off by default both locally and in CI.) This branch passes zig build test -fqemu -fwasmtime --glibc-runtimes <...> -Dtest-slow-targets locally for me with all the added targets. Finally, I also changed the Arm target triples for tests to use v7 instead of v8 because a) v7 is much more common for 32-bit Arm, and b) v8 adds floating point features that don't exist in v7 so things were broken for v7 and it went unnoticed.

Closes #10961.
Closes #21184.

alexrp · 2024-08-31T22:22:13Z

test/behavior/vector.zig

@@ -1442,19 +1442,22 @@ test "store vector with memset" {
    if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;

    if (builtin.zig_backend == .stage2_llvm) {
+        // LLVM 16 ERROR: "Converting bits to bytes lost precision"


Note that this test is being re-enabled for all targets in #21183.

alexrp · 2024-08-31T22:41:07Z

Just to give an idea of the direction I'm working towards, the next PR will include:

A proper mechanism for separating out certain "CPU" features from std.Target that really represent ABI, codegen, or internal LLVM features that the user shouldn't be able to modify since there are proper frontend flags for them. This would include soft_float, hard_float, and hard_float_abi, among other things.
- This also implies that we wouldn't default these options to off as we do for every CPU feature today. See the special case for soft_float I added in this PR for why status quo can get a bit awkward for these.
Frontend flags for controlling FPU codegen, roughly equivalent to -mfloat-abi and -mno-implicit-float. Maybe we can combine these into one flag? Not sure yet.
Re-enablement of softfp support in the LLVM backend based on the above.

alexrp · 2024-09-01T15:41:26Z

Seems like the CI impact here is within reason.

…nux-musleabi(hf)`. Closes ziglang#21184.

…-musleabi(hf)`.

Also rename Target.getFloatAbi() to floatAbi().

…oat. Closes ziglang#10961.

…ros. llvm/llvm-project#105972

llvm/llvm-project#105978

https://www.openwall.com/lists/musl/2024/08/28/1

ziglang#16177

…l)eabi`. ziglang#21234

Prefer `eabi` and `eabihf` over the ambiguous `none` when not using libc.

Broadly speaking, versions 6, 7, and 8 are the ones that are in common use. Of these, v7 is what you'll typically see for 32-bit Arm today. So let's actually make sure that that's what we're testing.

Similar to __truncsfhf2() and __extendhfsf2().

andrewrk · 2024-09-12T00:37:28Z

src/codegen/llvm.zig

+            // `use-soft-float` means "use software routines for floating point computations". In
+            // other words, it configures how LLVM lowers basic float instructions like `fcmp`,
+            // `fadd`, etc. The float calling convention is configured on `TargetMachine` and is
+            // mostly an orthogonal concept, although obviously we do need hardware float operations
+            // to actually be able to pass float values in float registers.
+            //
+            // Ideally, we would support something akin to the `-mfloat-abi=softfp` option that GCC
+            // and Clang support for Arm32 and CSKY. We don't currently expose such an option in
+            // Zig, and using CPU features as the source of truth for this makes for a miserable
+            // user experience since people expect e.g. `arm-linux-gnueabi` to mean full soft float
+            // unless the compiler has explicitly been told otherwise. (And note that our baseline
+            // CPU models almost all include FPU features!)
+            //
+            // Revisit this at some point.


What makes sense to me is:

float ABI in the target triple

whether hard float instructions can be used in the CPU featureset

Furthermore, baseline for soft float ABI target triples can default to not using float instructions in the CPU features.

it's unclear to me if this comment is in agreement with this or not.

andrewrk · 2024-09-12T00:42:41Z

Thanks for working on this. So far I'm unconvinced that Zig needs another option for controlling the ABI or CPU features. Based on your description it seems to me like this use case can be fully addressed by adjusting the baseline CPU featureset that is selected for soft float ABI targets.

Fix soft float support, split musl triples by float ABI, and enable CI

alexrp changed the title ~~Soft float~~ Fix soft float support, split musl triples by float ABI, and enable CI Aug 31, 2024

alexrp commented Aug 31, 2024

View reviewed changes

alexrp added 4 commits September 6, 2024 20:11

std.zig.target: Split mips(el)-linux-musl triples into `mips(el)-li…

c1a70ac

…nux-musleabi(hf)`. Closes ziglang#21184.

std.zig.target: Split powerpc-linux-musl triple into `powerpc-linux…

17f54e8

…-musleabi(hf)`.

std.Target: Make Abi.floatAbi() more accurate.

af370a6

Also rename Target.getFloatAbi() to floatAbi().

llvm: Set float ABI based on std.Target.floatAbi().

92517fb

alexrp force-pushed the soft-float branch from 4280535 to e523e36 Compare September 6, 2024 18:13

alexrp added 11 commits September 10, 2024 08:53

llvm: Set use-soft-float and noimplicitfloat on functions for soft fl…

6836799

…oat. Closes ziglang#10961.

llvm: Limit f16/f128 lowering on arm to fp_armv8 and soft float.

70c9233

Compilation: Pass hard/soft float flags to Clang as appropriate.

77c8f4b

Compilation: Work around llvm/llvm-project#105972 by defining the mac…

f945551

…ros. llvm/llvm-project#105972

std.zig.system: Work around llvm/llvm-project#105978 by disabling vfp2.

65d36be

llvm/llvm-project#105978

musl: Build with -ffp-contract=off.

4fcd3e0

https://www.openwall.com/lists/musl/2024/08/28/1

test: Disable store vector with memset on soft float arm.

5285f41

ziglang#16177

test: Skip some floating point tests that fail on `arm-linux-(gnu,mus…

26119bd

…l)eabi`. ziglang#21234

test: Add arm, mips, and powerpc soft float targets to module tests.

a872b61

Prefer `eabi` and `eabihf` over the ambiguous `none` when not using libc.

test: Switch all arm-linux-* triples for module tests from v8a to v7a.

75983c6

Broadly speaking, versions 6, 7, and 8 are the ones that are in common use. Of these, v7 is what you'll typically see for 32-bit Arm today. So let's actually make sure that that's what we're testing.

compiler_rt: Export __truncdfhf2() for AEABI too.

f164577

Similar to __truncsfhf2() and __extendhfsf2().

alexrp force-pushed the soft-float branch from e523e36 to f164577 Compare September 10, 2024 07:27

alexrp mentioned this pull request Sep 11, 2024

recent bootstrap regression: arm-linux-musleabihf: LLVM ERROR: Do not know how to promote this operator's result! #21378

Closed

andrewrk reviewed Sep 12, 2024

View reviewed changes

andrewrk merged commit 4fba733 into ziglang:master Sep 12, 2024
10 checks passed

alexrp deleted the soft-float branch September 12, 2024 18:00

alexrp mentioned this pull request Sep 22, 2024

hard float ABI passed to arm32 android compilations, which require softfp ABI #21488

Closed

DivergentClouds pushed a commit to DivergentClouds/zig that referenced this pull request Sep 24, 2024

Merge pull request ziglang#21269 from alexrp/soft-float

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Fix soft float support, split musl triples by float ABI, and enable CI

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Fix soft float support, split musl triples by float ABI, and enable CI #21269

Fix soft float support, split musl triples by float ABI, and enable CI #21269

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andrewrk commented Sep 12, 2024

Fix soft float support, split musl triples by float ABI, and enable CI #21269

Fix soft float support, split musl triples by float ABI, and enable CI #21269

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