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[CIR][ThroughMLIR] Add support for almabench and fbench from SingleSource test suite. #1562

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[CIR][ThroughMLIR] Add support for almabench and fbench from SingleSource test suite. #1562

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2 changes: 2 additions & 0 deletions clang/include/clang/CIR/Dialect/IR/CIROps.td
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Original file line number Diff line number Diff line change
Expand Up @@ -4794,6 +4794,7 @@ class BinaryFPToFPBuiltinOp<string mnemonic, string llvmOpName>
let llvmOp = llvmOpName;
}

def ATan2Op: BinaryFPToFPBuiltinOp<"atan2", "ATan2Op">;
def CopysignOp : BinaryFPToFPBuiltinOp<"copysign", "CopySignOp">;
def FMaxNumOp : BinaryFPToFPBuiltinOp<"fmaxnum", "MaxNumOp">;
def FMinNumOp : BinaryFPToFPBuiltinOp<"fminnum", "MinNumOp">;
Expand All @@ -4802,6 +4803,7 @@ def FMinimumOp : BinaryFPToFPBuiltinOp<"fminimum", "MinimumOp">;
def FModOp : BinaryFPToFPBuiltinOp<"fmod", "FRemOp">;
def PowOp : BinaryFPToFPBuiltinOp<"pow", "PowOp">;


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No need for an extra newline here

def IsFPClassOp : CIR_Op<"is_fp_class"> {
let summary = "Corresponding to the `__builtin_fpclassify` builtin function in clang";

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8 changes: 5 additions & 3 deletions clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
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Expand Up @@ -661,7 +661,8 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
case Builtin::BI__builtin_asinf16:
case Builtin::BI__builtin_asinl:
case Builtin::BI__builtin_asinf128:
llvm_unreachable("Builtin::BIasin like NYI");
assert(!cir::MissingFeatures::fastMathFlags());
return emitUnaryMaybeConstrainedFPBuiltin<cir::ASinOp>(*this, *E);

case Builtin::BIatan:
case Builtin::BIatanf:
Expand All @@ -671,7 +672,8 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
case Builtin::BI__builtin_atanf16:
case Builtin::BI__builtin_atanl:
case Builtin::BI__builtin_atanf128:
llvm_unreachable("Builtin::BIatan like NYI");
assert(!cir::MissingFeatures::fastMathFlags());
return emitUnaryMaybeConstrainedFPBuiltin<cir::ATanOp>(*this, *E);

case Builtin::BIatan2:
case Builtin::BIatan2f:
Expand All @@ -681,7 +683,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
case Builtin::BI__builtin_atan2f16:
case Builtin::BI__builtin_atan2l:
case Builtin::BI__builtin_atan2f128:
llvm_unreachable("Builtin::BIatan2 like NYI");
return emitBinaryFPBuiltin<cir::ATan2Op>(*this, *E);

case Builtin::BIceil:
case Builtin::BIceilf:
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52 changes: 34 additions & 18 deletions clang/lib/CIR/Lowering/ThroughMLIR/LowerCIRToMLIR.cpp
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Expand Up @@ -293,6 +293,22 @@ class CIRUnaryMathOpLowering : public mlir::OpConversionPattern<CIROp> {
}
};

class CIRATan2OpLowering : public mlir::OpConversionPattern<cir::ATan2Op> {
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While here, please add lowering and a test for direct LLVM lowering.

public:
using mlir::OpConversionPattern<cir::ATan2Op>::OpConversionPattern;

mlir::LogicalResult
matchAndRewrite(cir::ATan2Op op, OpAdaptor adaptor,
mlir::ConversionPatternRewriter &rewriter) const override {
mlir::Location loc = op.getLoc();
auto resultType = op.getResult().getType();

rewriter.replaceOpWithNewOp<mlir::math::Atan2Op>(
op, resultType, adaptor.getLhs(), adaptor.getRhs());
return mlir::success();
}
};

using CIRASinOpLowering =
CIRUnaryMathOpLowering<cir::ASinOp, mlir::math::AsinOp>;
using CIRSinOpLowering = CIRUnaryMathOpLowering<cir::SinOp, mlir::math::SinOp>;
Expand Down Expand Up @@ -1258,24 +1274,24 @@ void populateCIRToMLIRConversionPatterns(mlir::RewritePatternSet &patterns,
mlir::TypeConverter &converter) {
patterns.add<CIRReturnLowering, CIRBrOpLowering>(patterns.getContext());

patterns
.add<CIRATanOpLowering, CIRCmpOpLowering, CIRCallOpLowering,
CIRUnaryOpLowering, CIRBinOpLowering, CIRLoadOpLowering,
CIRConstantOpLowering, CIRStoreOpLowering, CIRAllocaOpLowering,
CIRFuncOpLowering, CIRScopeOpLowering, CIRBrCondOpLowering,
CIRTernaryOpLowering, CIRYieldOpLowering, CIRCosOpLowering,
CIRGlobalOpLowering, CIRGetGlobalOpLowering, CIRCastOpLowering,
CIRPtrStrideOpLowering, CIRSqrtOpLowering, CIRCeilOpLowering,
CIRExp2OpLowering, CIRExpOpLowering, CIRFAbsOpLowering,
CIRAbsOpLowering, CIRFloorOpLowering, CIRLog10OpLowering,
CIRLog2OpLowering, CIRLogOpLowering, CIRRoundOpLowering,
CIRPtrStrideOpLowering, CIRSinOpLowering, CIRShiftOpLowering,
CIRBitClzOpLowering, CIRBitCtzOpLowering, CIRBitPopcountOpLowering,
CIRBitClrsbOpLowering, CIRBitFfsOpLowering, CIRBitParityOpLowering,
CIRIfOpLowering, CIRVectorCreateLowering, CIRVectorInsertLowering,
CIRVectorExtractLowering, CIRVectorCmpOpLowering, CIRACosOpLowering,
CIRASinOpLowering, CIRUnreachableOpLowering, CIRTanOpLowering>(
converter, patterns.getContext());
patterns.add<
CIRATanOpLowering, CIRATan2OpLowering, CIRCmpOpLowering,
CIRCallOpLowering, CIRUnaryOpLowering, CIRBinOpLowering,
CIRLoadOpLowering, CIRConstantOpLowering, CIRStoreOpLowering,
CIRAllocaOpLowering, CIRFuncOpLowering, CIRScopeOpLowering,
CIRBrCondOpLowering, CIRTernaryOpLowering, CIRYieldOpLowering,
CIRCosOpLowering, CIRGlobalOpLowering, CIRGetGlobalOpLowering,
CIRCastOpLowering, CIRPtrStrideOpLowering, CIRSqrtOpLowering,
CIRCeilOpLowering, CIRExp2OpLowering, CIRExpOpLowering, CIRFAbsOpLowering,
CIRAbsOpLowering, CIRFloorOpLowering, CIRLog10OpLowering,
CIRLog2OpLowering, CIRLogOpLowering, CIRRoundOpLowering,
CIRPtrStrideOpLowering, CIRSinOpLowering, CIRShiftOpLowering,
CIRBitClzOpLowering, CIRBitCtzOpLowering, CIRBitPopcountOpLowering,
CIRBitClrsbOpLowering, CIRBitFfsOpLowering, CIRBitParityOpLowering,
CIRIfOpLowering, CIRVectorCreateLowering, CIRVectorInsertLowering,
CIRVectorExtractLowering, CIRVectorCmpOpLowering, CIRACosOpLowering,
CIRASinOpLowering, CIRUnreachableOpLowering, CIRTanOpLowering>(
converter, patterns.getContext());
}

static mlir::TypeConverter prepareTypeConverter() {
Expand Down
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